Serial hardware abstraction layer interfaces. See Serial UART Communication for documentation.

License#

Copyright 2018 Silicon Laboratories Inc. www.silabs.com

The licensor of this software is Silicon Laboratories Inc. Your use of this software is governed by the terms of Silicon Labs Master Software License Agreement (MSLA) available at www.silabs.com/about-us/legal/master-software-license-agreement. This software is distributed to you in Source Code format and is governed by the sections of the MSLA applicable to Source Code.

/***************************************************************************/
#ifndef __HAL_SERIAL_H__
#define __HAL_SERIAL_H__

#include STACK_TYPES_HEADER

#ifdef CORTEXM3_EFM32_MICRO
  #include "em_usart.h"

// Connect uses a different header, the ifndef check can be removed once
// they're unified.
  #ifndef MAC_TEST_STACK
    #include "plugin/serial/com.h"
  #endif
#endif

#ifndef CORTEXM3_EFM32_MICRO
// EM_NUM_SERIAL_PORTS is inherited from the micro specifc micro.h
#if (EM_NUM_SERIAL_PORTS == 1)
  #define FOR_EACH_PORT(cast, prefix, suffix) \
  cast(prefix##0##suffix)
#elif (EM_NUM_SERIAL_PORTS == 2)
  #define FOR_EACH_PORT(cast, prefix, suffix) \
  cast(prefix##0##suffix),                    \
  cast(prefix##1##suffix)
#elif (EM_NUM_SERIAL_PORTS == 3)
  #define FOR_EACH_PORT(cast, prefix, suffix) \
  cast(prefix##0##suffix),                    \
  cast(prefix##1##suffix),                    \
  cast(prefix##2##suffix)
#elif (EM_NUM_SERIAL_PORTS == 4)
  #define FOR_EACH_PORT(cast, prefix, suffix) \
  cast(prefix##0##suffix),                    \
  cast(prefix##1##suffix),                    \
  cast(prefix##2##suffix),                    \
  cast(prefix##3##suffix),
#elif (EM_NUM_SERIAL_PORTS == 5)
  #define FOR_EACH_PORT(cast, prefix, suffix) \
  cast(prefix##0##suffix),                    \
  cast(prefix##1##suffix),                    \
  cast(prefix##2##suffix),                    \
  cast(prefix##3##suffix),                    \
  cast(prefix##4##suffix),
#else
  #error unsupported number of serial ports
#endif
#endif //CORTEXM3_EFM32_MICRO

#define SL_LEGACY_SERIAL_UNUSED 0
#define SL_LEGACY_SERIAL_FIFO   1
#define SL_LEGACY_SERIAL_LOWLEVEL 2

#ifndef DOXYGEN_SHOULD_SKIP_THIS

// The following tests for setting of an invalid mode
#ifdef SL_LEGACY_SERIAL0_MODE
#if (SL_LEGACY_SERIAL0_MODE != SL_LEGACY_SERIAL_FIFO)      \
  && (SL_LEGACY_SERIAL0_MODE != SL_LEGACY_SERIAL_LOWLEVEL) \
  && (SL_LEGACY_SERIAL0_MODE != SL_LEGACY_SERIAL_UNUSED)
  #error Invalid Serial 0 Mode
#endif
#else
  #define SL_LEGACY_SERIAL0_MODE SL_LEGACY_SERIAL_UNUSED
#endif
#ifdef SL_LEGACY_SERIAL1_MODE
#if (SL_LEGACY_SERIAL1_MODE != SL_LEGACY_SERIAL_FIFO)      \
  && (SL_LEGACY_SERIAL1_MODE != SL_LEGACY_SERIAL_LOWLEVEL) \
  && (SL_LEGACY_SERIAL1_MODE != SL_LEGACY_SERIAL_UNUSED)
  #error Invalid Serial 1 Mode
#endif
#else
  #define SL_LEGACY_SERIAL1_MODE SL_LEGACY_SERIAL_UNUSED
#endif
#ifdef SL_LEGACY_SERIAL2_MODE
#if (SL_LEGACY_SERIAL2_MODE != SL_LEGACY_SERIAL_FIFO)      \
  && (SL_LEGACY_SERIAL2_MODE != SL_LEGACY_SERIAL_LOWLEVEL) \
  && (SL_LEGACY_SERIAL2_MODE != SL_LEGACY_SERIAL_UNUSED)
  #error Invalid Serial 2 Mode
#endif
#else
  #define SL_LEGACY_SERIAL2_MODE SL_LEGACY_SERIAL_UNUSED
#endif
#ifdef SL_LEGACY_SERIAL3_MODE
#if (SL_LEGACY_SERIAL3_MODE != SL_LEGACY_SERIAL_FIFO)      \
  && (SL_LEGACY_SERIAL3_MODE != SL_LEGACY_SERIAL_LOWLEVEL) \
  && (SL_LEGACY_SERIAL3_MODE != SL_LEGACY_SERIAL_UNUSED)
  #error Invalid Serial 3 Mode
#endif
#else
  #define SL_LEGACY_SERIAL3_MODE SL_LEGACY_SERIAL_UNUSED
#endif
#ifdef SL_LEGACY_SERIAL4_MODE
#if (SL_LEGACY_SERIAL4_MODE != SL_LEGACY_SERIAL_FIFO)      \
  && (SL_LEGACY_SERIAL4_MODE != SL_LEGACY_SERIAL_LOWLEVEL) \
  && (SL_LEGACY_SERIAL4_MODE != SL_LEGACY_SERIAL_UNUSED)
  #error Invalid Serial 4 Mode
#endif
#else
  #define SL_LEGACY_SERIAL4_MODE SL_LEGACY_SERIAL_UNUSED
#endif

// Determine if FIFO and/or Buffer modes are being used, so those sections of
//  code may be disabled if not

// EMHAL-2285: buffer mode is now FIFO mode with DMA, as is any app with hardware flow control
#if defined(EMBER_MICRO_HAS_SC1) && ((SL_LEGACY_SERIAL1_MODE == SL_LEGACY_SERIAL_BUFFER) || defined(EMBER_SERIAL1_RTSCTS))
  #undef SL_LEGACY_SERIAL1_MODE
  #define SL_LEGACY_SERIAL1_MODE SL_LEGACY_SERIAL_FIFO
  #define EM_SER1_FIFO_DMA_USED
  #ifndef SL_LEGACY_SERIAL1_TX_QUEUE_SIZE
    #define SL_LEGACY_SERIAL1_TX_QUEUE_SIZE 128
    #define SL_LEGACY_SERIAL1_RX_QUEUE_SIZE 128
  #endif
#endif
#if defined(EMBER_MICRO_HAS_SC3) && ((SL_LEGACY_SERIAL2_MODE == SL_LEGACY_SERIAL_BUFFER) || defined(EMBER_SERIAL2_RTSCTS))
  #undef SL_LEGACY_SERIAL2_MODE
  #define SL_LEGACY_SERIAL2_MODE SL_LEGACY_SERIAL_FIFO
  #define EM_SER2_FIFO_DMA_USED
  #ifndef SL_LEGACY_SERIAL2_TX_QUEUE_SIZE
    #define SL_LEGACY_SERIAL2_TX_QUEUE_SIZE 128
    #define SL_LEGACY_SERIAL2_RX_QUEUE_SIZE 128
  #endif
#endif

#if (SL_LEGACY_SERIAL0_MODE == SL_LEGACY_SERIAL_FIFO)  \
  || (SL_LEGACY_SERIAL1_MODE == SL_LEGACY_SERIAL_FIFO) \
  || (SL_LEGACY_SERIAL2_MODE == SL_LEGACY_SERIAL_FIFO) \
  || (SL_LEGACY_SERIAL3_MODE == SL_LEGACY_SERIAL_FIFO) \
  || (SL_LEGACY_SERIAL4_MODE == SL_LEGACY_SERIAL_FIFO)
  #define EM_ENABLE_SERIAL_FIFO
#endif

#if (SL_LEGACY_SERIAL0_MODE == SL_LEGACY_SERIAL_BUFFER)  \
  || (SL_LEGACY_SERIAL3_MODE == SL_LEGACY_SERIAL_BUFFER) \
  || (SL_LEGACY_SERIAL4_MODE == SL_LEGACY_SERIAL_BUFFER)
  #define EM_ENABLE_SERIAL_BUFFER
#endif

typedef struct {
  uint16_t head;

  uint16_t tail;

  volatile uint16_t used;

  uint8_t fifo[];
} EmSerialFifoQueue;

#ifndef CORTEXM3_EFM32_MICRO

extern void *emSerialTxQueues[EM_NUM_SERIAL_PORTS];

extern EmSerialFifoQueue *emSerialRxQueues[EM_NUM_SERIAL_PORTS];

extern uint16_t const emSerialTxQueueMasks[EM_NUM_SERIAL_PORTS];

extern uint16_t const emSerialTxQueueSizes[EM_NUM_SERIAL_PORTS];

extern uint16_t const emSerialRxQueueSizes[EM_NUM_SERIAL_PORTS];

extern sl_status_t emSerialRxError[EM_NUM_SERIAL_PORTS];

extern uint16_t emSerialRxErrorIndex[EM_NUM_SERIAL_PORTS];

extern uint8_t const emSerialPortModes[EM_NUM_SERIAL_PORTS];

extern uint16_t const emSerialTxQueueWraps[EM_NUM_SERIAL_PORTS];
extern uint16_t const emSerialRxQueueWraps[EM_NUM_SERIAL_PORTS];

#endif // CORTEXM3_EFM32_MICRO

#ifdef EZSP_UART
void sli_zigbee_stack_call_populate_counters(sl_zigbee_counter_type_t type, uint8_t data);

  #define HANDLE_ASH_ERROR(type) sli_zigbee_stack_call_populate_counters(type, 0)
#else
  #define HANDLE_ASH_ERROR(type)
#endif

#endif //DOXYGEN_SHOULD_SKIP_THIS

#undef  FIFO_ENQUEUE // Avoid possible warning, replace other definition
#define FIFO_ENQUEUE(queue, data, size)             \
  do {                                              \
    (queue)->fifo[(queue)->head] = (data);          \
    (queue)->head = (((queue)->head + 1) % (size)); \
    (queue)->used++;                                \
  } while (0)

#undef  FIFO_DEQUEUE // Avoid possible warning, replace other definition
#define FIFO_DEQUEUE(queue, size)                 \
  (queue)->fifo[(queue)->tail];                   \
  (queue)->tail = (((queue)->tail + 1) % (size)); \
  (queue)->used--

#ifdef DOXYGEN_SHOULD_SKIP_THIS

enum SerialBaudRate
#else
  #ifndef DEFINE_BAUD
  #define DEFINE_BAUD(num) BAUD_##num
  #endif
  #ifdef CORTEXM3_EFM32_MICRO
typedef uint32_t SerialBaudRate;
  #else
typedef uint8_t SerialBaudRate;
  #endif
enum
#endif //DOXYGEN_SHOULD_SKIP_THIS
#ifdef CORTEXM3_EFM32_MICRO
{
  DEFINE_BAUD(300) = 300,  // BAUD_300
  DEFINE_BAUD(600) = 600,  // BAUD_600
  DEFINE_BAUD(900) = 900,  // etc...
  DEFINE_BAUD(1200) = 1200,
  DEFINE_BAUD(2400) = 2400,
  DEFINE_BAUD(4800) = 4800,
  DEFINE_BAUD(9600) = 9600,
  DEFINE_BAUD(14400) = 14400,
  DEFINE_BAUD(19200) = 19200,
  DEFINE_BAUD(28800) = 28800,
  DEFINE_BAUD(38400) = 38400,
  DEFINE_BAUD(50000) = 50000,
  DEFINE_BAUD(57600) = 57600,
  DEFINE_BAUD(76800) = 76800,
  DEFINE_BAUD(100000) = 100000,
  DEFINE_BAUD(115200) = 115200
};
#else //CORTEXM3_EFM32_MICRO
{
  DEFINE_BAUD(300) = 0,  // BAUD_300
  DEFINE_BAUD(600) = 1,  // BAUD_600
  DEFINE_BAUD(900) = 2,  // etc...
  DEFINE_BAUD(1200) = 3,
  DEFINE_BAUD(2400) = 4,
  DEFINE_BAUD(4800) = 5,
  DEFINE_BAUD(9600) = 6,
  DEFINE_BAUD(14400) = 7,
  DEFINE_BAUD(19200) = 8,
  DEFINE_BAUD(28800) = 9,
  DEFINE_BAUD(38400) = 10,
  DEFINE_BAUD(50000) = 11,
  DEFINE_BAUD(57600) = 12,
  DEFINE_BAUD(76800) = 13,
  DEFINE_BAUD(100000) = 14,
  DEFINE_BAUD(115200) = 15,
  DEFINE_BAUD(230400) = 16,   /*<! define higher baud rates for the EM2XX and EM3XX */
  DEFINE_BAUD(460800) = 17,   /*<! Note: receiving data at baud rates > 115200 */
  DEFINE_BAUD(CUSTOM) = 18    /*<! may not be reliable due to interrupt latency */
};
#endif //CORTEXM3_EFM32_MICRO

#ifdef  CORTEXM3_EFM32_MICRO

typedef USART_Parity_TypeDef SerialParity;
  #define PARITY_NONE usartNoParity
  #define PARITY_ODD  usartOddParity
  #define PARITY_EVEN usartEvenParity

#else

#ifdef DOXYGEN_SHOULD_SKIP_THIS

enum SerialParity
#else
  #ifndef DEFINE_PARITY
  #define DEFINE_PARITY(val) PARITY_##val
  #endif
typedef uint8_t SerialParity;
enum
#endif //DOXYGEN_SHOULD_SKIP_THIS
{
  DEFINE_PARITY(NONE) = 0U,  // PARITY_NONE
  DEFINE_PARITY(ODD) = 1U,   // PARITY_ODD
  DEFINE_PARITY(EVEN) = 2U   // PARITY_EVEN
};

#endif//CORTEXM3_EFM32_MICRO

sl_status_t halInternalUartInit(uint8_t port,
                                SerialBaudRate rate,
                                SerialParity parity,
                                uint8_t stopBits);

void halInternalPowerDownUart(void);

void halInternalPowerUpUart(void);

void halInternalStartUartTx(uint8_t port);

void halInternalStopUartTx(uint8_t port);

sl_status_t halInternalForceWriteUartData(uint8_t port, uint8_t *data, uint8_t length);

EmberStatus halInternalForceReadUartByte(uint8_t port, uint8_t *dataByte);

void halInternalWaitUartTxComplete(uint8_t port);

#if (SL_LEGACY_SERIAL1_MODE == SL_LEGACY_SERIAL_FIFO) \
  && (defined(SL_LEGACY_SERIAL1_XONXOFF))
void halInternalUartFlowControl(uint8_t port);

#else
#define halInternalUartFlowControl(port) do {} while (false)
#endif

#if defined(CORTEXM3)
void halInternalUartRxPump(uint8_t port);

#else
#define halInternalUartRxPump(port) do {} while (false)
#endif

void halInternalRestartUart(void);

bool halInternalUartFlowControlRxIsEnabled(uint8_t port);

// define the old name for backwards compatibility
#define halInternalUart1FlowControlRxIsEnabled() halInternalUartFlowControlRxIsEnabled(1)

#ifdef CORTEXM3_EFM32_MICRO
#define halInternalUartXonRefreshDone(port) !(COM_InternalRxIsPaused((COM_Port_t) port))
#else
bool halInternalUartXonRefreshDone(uint8_t port);

#endif
#define halInternalUart1XonRefreshDone() halInternalUartXonRefreshDone(1)

#ifdef CORTEXM3_EFM32_MICRO
  #define halInternalUartTxIsIdle(port) COM_InternalTxIsIdle((COM_Port_t) port)
#else
bool halInternalUartTxIsIdle(uint8_t port);

#endif
// define the old name for backwards compatibility
#define halInternalUart1TxIsIdle() halInternalUartTxIsIdle(1)

bool serialDropPacket(void);

#if defined(CORTEXM3_EFM32_MICRO)
// Connect is not currently ready to support VUART on EFR32.
  #if defined(MAC_TEST_STACK)
// This stub should be removed when Connect is ready.
    #define halStackReceiveVuartMessage(data, length)
  #else
    #define halStackReceiveVuartMessage(data, length) COM_InternalReceiveData(COM_VCP, data, length)
  #endif
#else
void halStackReceiveVuartMessage(uint8_t* data, uint8_t length);

#endif

#if defined(MAC_TEST_STACK)
// This stub should be removed when Connect is ready.
  #define emDebugReceiveData()
#endif

void halHostFlushBuffers(void);
uint16_t halHostEnqueueTx(const uint8_t *data, uint16_t length);
void halHostFlushTx(void);

// 'data' points to the next 'length' bytes of input.
uint16_t serialCopyFromRx(const uint8_t *data, uint16_t length);

// tell the upper layer to load serial data
void emLoadSerialTx(void);

#endif //__HAL_SERIAL_H__

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