Modules#

RTCCRamData

Minimal Hal functions common across all microcontroller-specific files. See Common Microcontroller Functions for documentation.

License#

Copyright 2018 Silicon Laboratories Inc. www.silabs.com

The licensor of this software is Silicon Laboratories Inc. Your use of this software is governed by the terms of Silicon Labs Master Software License Agreement (MSLA) available at www.silabs.com/about-us/legal/master-software-license-agreement. This software is distributed to you in Source Code format and is governed by the sections of the MSLA applicable to Source Code.

/***************************************************************************/
#ifndef __MICRO_COMMON_H__
#define __MICRO_COMMON_H__

void halInit(void);

void halReboot(void);

void halPowerUp(void);

void halPowerDown(void);

void halResume(void);

void halSuspend(void);

#define MICRO_DISABLE_WATCH_DOG_KEY 0xA5U

void halInternalEnableWatchDog(void);

void halInternalDisableWatchDog(uint8_t magicKey);

bool halInternalWatchDogEnabled(void);

#ifdef DOXYGEN_SHOULD_SKIP_THIS

enum SleepModes
#else
typedef uint8_t SleepModes;
enum
#endif
{
  SLEEPMODE_RUNNING = 0U,
  SLEEPMODE_IDLE = 1U,
  SLEEPMODE_WAKETIMER = 2U,
  SLEEPMODE_MAINTAINTIMER = 3U,
  SLEEPMODE_NOTIMER = 4U,
  SLEEPMODE_HIBERNATE = 5U,

  //The following SleepModes are deprecated on EM2xx and EM3xx chips.  Each
  //micro's halSleep() function will remap these modes to the appropriate
  //replacement, as necessary.
  SLEEPMODE_RESERVED = 6U,
  SLEEPMODE_POWERDOWN = 7U,
  SLEEPMODE_POWERSAVE = 8U,
};

#ifdef CORTEXM3_EMBER_MICRO
  #ifdef EMBER_MICRO_PORT_F_GPIO
    #define WAKEPORTD         uint8_t portD;
    #define WAKEPORTE         uint8_t portE;
    #define WAKEPORTF         uint8_t portF;
    #define GPIO_MASK_SIZE    48
    #define GPIO_MASK         0xFFFFFFFFFFFF
typedef uint64_t GpioMaskType;
typedef uint64_t WakeMask;
  #elif defined (EMBER_MICRO_PORT_E_GPIO)
    #define WAKEPORTD         uint8_t portD;
    #define WAKEPORTE         uint8_t portE;
    #define WAKEPORTF
    #define GPIO_MASK_SIZE    40
    #define GPIO_MASK         0xFFFFFFFFFF
typedef uint64_t GpioMaskType;
typedef uint64_t WakeMask;
  #elif defined (EMBER_MICRO_PORT_D_GPIO)
    #define WAKEPORTD       uint8_t portD;
    #define WAKEPORTE
    #define WAKEPORTF
    #define GPIO_MASK_SIZE  32
    #define GPIO_MASK       0xFFFFFFFF
typedef uint32_t GpioMaskType;
typedef uint64_t WakeMask;
  #else
    #define WAKEPORTD
    #define WAKEPORTE
    #define WAKEPORTF
    #define GPIO_MASK_SIZE    24
    #define GPIO_MASK         0xFFFFFF
typedef uint32_t GpioMaskType;
typedef uint32_t WakeMask;
  #endif

  #define WAKE_GPIO_MASK      GPIO_MASK
  #define WAKE_GPIO_SIZE      GPIO_MASK_SIZE

//We don't have a real register to hold this composite information.
//Pretend we do so halGetWakeInfo can operate like halGetResetInfo.
//This "register" is only ever set by halSleep.
// [31] = WakeInfoValid
// [30] = SleepSkipped
// [29] = CSYSPWRUPREQ
// [28] = CDBGPWRUPREQ
// [27] = WAKE_CORE
// [26] = TIMER_WAKE_WRAP
// [25] = TIMER_WAKE_COMPB
// [24] = TIMER_WAKE_COMPA
// [23:0] = corresponding GPIO activity
  #define WAKEINFOVALID_INTERNAL_WAKE_EVENT_BIT (GPIO_MASK_SIZE + 7)
  #define SLEEPSKIPPED_INTERNAL_WAKE_EVENT_BIT  (GPIO_MASK_SIZE + 6)
  #define CSYSPWRUPREQ_INTERNAL_WAKE_EVENT_BIT  (GPIO_MASK_SIZE + 5)
  #define CDBGPWRUPREQ_INTERNAL_WAKE_EVENT_BIT  (GPIO_MASK_SIZE + 4)
  #define WAKE_CORE_INTERNAL_WAKE_EVENT_BIT     (GPIO_MASK_SIZE + 3)
  #define WRAP_INTERNAL_WAKE_EVENT_BIT          (GPIO_MASK_SIZE + 2)
  #define CMPB_INTERNAL_WAKE_EVENT_BIT          (GPIO_MASK_SIZE + 1)
  #define CMPA_INTERNAL_WAKE_EVENT_BIT          (GPIO_MASK_SIZE + 0)
//This define shifts events from the PWRUP_EVENT register into the proper
//place in the halInternalWakeEvent variable
  #define INTERNAL_WAKE_EVENT_BIT_SHIFT         (GPIO_MASK_SIZE - 4)
typedef union {
  struct {
    uint8_t portA;
    uint8_t portB;
    uint8_t portC;
    WAKEPORTD
    WAKEPORTE
      WAKEPORTF
    union {
      struct {
        uint8_t TIMER_WAKE_COMPA : 1;
        uint8_t TIMER_WAKE_COMPB : 1;
        uint8_t TIMER_WAKE_WRAP  : 1;
        uint8_t WAKE_CORE_B      : 1;
        uint8_t CDBGPWRUPREQ     : 1;
        uint8_t CSYSPWRUPREQ     : 1;
        uint8_t SleepSkipped     : 1;
        uint8_t WakeInfoValid    : 1;
      }bits;

      uint8_t byte;
    } internal;
  } events;

  WakeMask eventflags;
} WakeEvents;
  #undef WAKEPORTD
  #undef WAKEPORTE
  #undef WAKEPORTF
#elif defined (CORTEXM3_EFM32_MICRO)
  #define WAKE_GPIO_SIZE    16
  #define WAKE_GPIO_MASK    0x0000FFFF
  #define WAKE_IRQ_GPIO     (1 << 16)
  #define WAKE_IRQ_SYSTIMER (1 << 17)
  #define WAKE_IRQ_RFSENSE  (1 << 18)

typedef uint32_t WakeEvents;
typedef uint32_t WakeMask;
#else // to cover simulation targets
  #define GPIO_MASK_SIZE    24
  #define GPIO_MASK         0xFFFFFF
  #define WAKE_GPIO_MASK    GPIO_MASK
  #define WAKE_GPIO_SIZE    GPIO_MASK_SIZE
typedef uint32_t WakeEvents;
typedef uint32_t WakeMask;
#endif // CORTEXM3_EMBER_MICRO

#define WAKE_MASK_INVALID (-1)

#define WAKE_EVENT_SIZE   WakeMask

void halSleep(SleepModes sleepMode);

void halSleepPreserveInts(SleepModes sleepMode);

void halCommonDelayMicroseconds(uint16_t us);

#define DEBUG_TOGGLE(n)

extern volatile int8_t halCommonVreg1v8EnableCount;

void halCommonDisableVreg1v8(void);

void halCommonEnableVreg1v8(void);

/*
 * This function should set CRYOTimer for EFR32 wakeup from em4 sleep, and also write the counters to RTCC RAM
 */
typedef struct {//Saved in RTCCRAM starting from index 0
  uint32_t outgoingNwkFrameCounter;   //saved in index 0 of RTCCRAM
  uint32_t incomingParentNwkFrameCounter;
  uint32_t outgoingLinkKeyFrameCounter;  //NextApsFrameCounter
  uint32_t incomingLinkKeyFrameCounter;  //incomingTCLinkKeyFrameCounter saved in index 3 of RTCCRAM
} RTCCRamData;
void halBeforeEM4(uint32_t duration, RTCCRamData input);
RTCCRamData halAfterEM4(void);

#endif //__MICRO_COMMON_H__

0xA5U

24

0xFFFFFF

GPIO_MASK

GPIO_MASK_SIZE

(-1)

WakeMask