OPAMP - Operational Amplifier

Description

Operational Amplifier (OPAMP) peripheral API.

This module contains functions to:

All OPAMP functions assume that the VDAC clock is running. If VDAC is not used, the clock can be turned off when the OPAMPs are configured.

If the available gain values don't suit the application at hand, the resistor ladders can be disabled and external gain programming resistors used.

A number of predefined OPAMP setup macros are available for configuration of the most common OPAMP topologies (see figures below).

Note
The terms POSPAD and NEGPAD in the figures are used to indicate that these pads should be connected to a suitable signal ground.


Unity gain voltage follower.
Use predefined macro OPA_INIT_UNITY_GAIN. 

                    |\
         ___________|+\
                    |  \_______
                 ___|_ /    |
                |   | /     |
                |   |/      |
                |___________|


Non-inverting amplifier.
Use predefined macro OPA_INIT_NON_INVERTING. 

                    |\
         ___________|+\
                    |  \_______
                 ___|_ /    |
                |   | /     |
                |   |/      |
                |_____R2____|
                |
                R1
                |
              NEGPAD


Inverting amplifier.
Use predefined macro OPA_INIT_INVERTING. 

                 _____R2____
                |           |
                |   |\      |
         ____R1_|___|_\     |
                    |  \____|___
                 ___|  /
                |   |+/
                |   |/
                |
              POSPAD


Cascaded non-inverting amplifiers.
Use predefined macros OPA_INIT_CASCADED_NON_INVERTING_OPA0, OPA_INIT_CASCADED_NON_INVERTING_OPA1 and OPA_INIT_CASCADED_NON_INVERTING_OPA2. 

                    |\                       |\                       |\
         ___________|+\ OPA0      ___________|+\ OPA1      ___________|+\ OPA2
                    |  \_________|           |  \_________|           |  \_______
                 ___|_ /    |             ___|_ /    |             ___|_ /    |
                |   | /     |            |   | /     |            |   | /     |
                |   |/      |            |   |/      |            |   |/      |
                |_____R2____|            |_____R2____|            |_____R2____|
                |                        |                        |
                R1                       R1                       R1
                |                        |                        |
              NEGPAD                   NEGPAD                   NEGPAD


Cascaded inverting amplifiers.
Use predefined macros OPA_INIT_CASCADED_INVERTING_OPA0, OPA_INIT_CASCADED_INVERTING_OPA1 and OPA_INIT_CASCADED_INVERTING_OPA2. 

                 _____R2____              _____R2____              _____R2____
                |           |            |           |            |           |
                |   |\      |            |   |\      |            |   |\      |
         ____R1_|___|_\     |     ____R1_|___|_\     |     ____R1_|___|_\     |
                    |  \____|____|           |  \____|___|            |  \____|__
                 ___|  /                  ___|  /                  ___|  /
                |   |+/ OPA0             |   |+/ OPA1             |   |+/ OPA2
                |   |/                   |   |/                   |   |/
                |                        |                        |
              POSPAD                   POSPAD                   POSPAD


Differential driver with two opamp's.
Use predefined macros OPA_INIT_DIFF_DRIVER_OPA0 and OPA_INIT_DIFF_DRIVER_OPA1. 

                                  __________________________
                                 |                          +
                                 |        _____R2____
                    |\           |       |           |
         ___________|+\ OPA0     |       |   |\ OPA1 |
                    |  \_________|____R1_|___|_\     |      _
                 ___|_ /         |           |  \____|______
                |   | /          |        ___|  /
                |   |/           |       |   |+/
                |________________|       |   |/
                                         |
                                       POSPAD


Differential receiver with three opamp's.
Use predefined macros OPA_INIT_DIFF_RECEIVER_OPA0, OPA_INIT_DIFF_RECEIVER_OPA1 and OPA_INIT_DIFF_RECEIVER_OPA2. 

                    |\
          __________|+\ OPA1
         _          |  \_________
                 ___|_ /    |    |        _____R2____
                |   | /     |    |       |           |
                |   |/      |    |       |   |\      |
                |___________|    |____R1_|___|_\     |
                                             |  \____|___
                    |\            ____R1_ ___|  /
         +__________|+\ OPA0     |       |   |+/ OPA2
                    |  \_________|       |   |/
                 ___|_ /    |            R2
                |   | /     |            |
                |   |/      |          NEGPAD OPA0
                |___________|


Instrumentation amplifier.
Use predefined macros OPA_INIT_INSTR_AMP_OPA0 and OPA_INIT_INSTR_AMP_OPA1. 

                    |\
          __________|+\ OPA1
                    |  \______________
                 ___|_ /     |
                |   | /      |
                |   |/       R2
                |____________|
                             |
                             R1
                             |
                             R1
                 ____________|
                |            |
                |            R2
                |   |\       |
                |___|+\ OPA0 |
                    |  \_____|________
          __________|_ /
                    | /
                    |/

Data Structures

struct  OPAMP_Init_TypeDef
 OPAMP init structure.
 

Functions

void OPAMP_Disable (VDAC_TypeDef *dac, OPAMP_TypeDef opa)
 Disable an Operational Amplifier.
 
void OPAMP_Enable (VDAC_TypeDef *dac, OPAMP_TypeDef opa, const OPAMP_Init_TypeDef *init)
 Configure and enable an Operational Amplifier.
 

Macros

#define OPA_INIT_UNITY_GAIN
 Configuration of OPA in unity gain voltage follower mode.
 
#define OPA_INIT_NON_INVERTING
 Configuration of OPA in non-inverting amplifier mode.
 
#define OPA_INIT_INVERTING
 Configuration of OPA in inverting amplifier mode.
 
#define OPA_INIT_CASCADED_NON_INVERTING_OPA0
 Configuration of OPA0 in cascaded non-inverting amplifier mode.
 
#define OPA_INIT_CASCADED_NON_INVERTING_OPA1
 Configuration of OPA1 in cascaded non-inverting amplifier mode.
 
#define OPA_INIT_CASCADED_NON_INVERTING_OPA2
 Configuration of OPA2 in cascaded non-inverting amplifier mode.
 
#define OPA_INIT_CASCADED_NON_INVERTING_OPA3
 Configuration of OPA3 in cascaded non-inverting amplifier mode.
 
#define OPA_INIT_CASCADED_INVERTING_OPA0
 Configuration of OPA0 in cascaded inverting amplifier mode.
 
#define OPA_INIT_CASCADED_INVERTING_OPA1
 Configuration of OPA1 in cascaded inverting amplifier mode.
 
#define OPA_INIT_CASCADED_INVERTING_OPA2
 Configuration of OPA2 in cascaded inverting amplifier mode.
 
#define OPA_INIT_CASCADED_INVERTING_OPA3
 Configuration of OPA3 in cascaded inverting amplifier mode.
 
#define OPA_INIT_DIFF_DRIVER_OPA0
 Configuration of OPA0 in two-opamp differential driver mode.
 
#define OPA_INIT_DIFF_DRIVER_OPA1
 Configuration of OPA1 in two-opamp differential driver mode.
 
#define OPA_INIT_DIFF_RECEIVER_OPA0
 Configuration of OPA0 in three-opamp differential receiver mode.
 
#define OPA_INIT_DIFF_RECEIVER_OPA1
 Configuration of OPA1 in three-opamp differential receiver mode.
 
#define OPA_INIT_DIFF_RECEIVER_OPA2
 Configuration of OPA2 in three-opamp differential receiver mode.
 
#define OPA_INIT_DIFF_RECEIVER_OPA3
 Configuration of OPA3 in three+one opamp differential receiver mode.
 
#define OPA_INIT_INSTR_AMP_OPA0
 Configuration of OPA0 in two-opamp instrumentation amplifier mode.
 
#define OPA_INIT_INSTR_AMP_OPA1
 Configuration of OPA1 in two-opamp instrumentation amplifier mode.
 

Enumerations

enum  OPAMP_TypeDef {
  OPA0 = 0,
  OPA1 = 1,
  OPA2 = 2,
  OPA3 = 3
}
 OPAMP selector values.
 
enum  OPAMP_NegSel_TypeDef {
  opaNegSelAPORT1YCH1 = VDAC_OPA_MUX_NEGSEL_APORT1YCH1,
  opaNegSelAPORT1YCH3 = VDAC_OPA_MUX_NEGSEL_APORT1YCH3,
  opaNegSelAPORT1YCH5 = VDAC_OPA_MUX_NEGSEL_APORT1YCH5,
  opaNegSelAPORT1YCH7 = VDAC_OPA_MUX_NEGSEL_APORT1YCH7,
  opaNegSelAPORT1YCH9 = VDAC_OPA_MUX_NEGSEL_APORT1YCH9,
  opaNegSelAPORT1YCH11 = VDAC_OPA_MUX_NEGSEL_APORT1YCH11,
  opaNegSelAPORT1YCH13 = VDAC_OPA_MUX_NEGSEL_APORT1YCH13,
  opaNegSelAPORT1YCH15 = VDAC_OPA_MUX_NEGSEL_APORT1YCH15,
  opaNegSelAPORT1YCH17 = VDAC_OPA_MUX_NEGSEL_APORT1YCH17,
  opaNegSelAPORT1YCH19 = VDAC_OPA_MUX_NEGSEL_APORT1YCH19,
  opaNegSelAPORT1YCH21 = VDAC_OPA_MUX_NEGSEL_APORT1YCH21,
  opaNegSelAPORT1YCH23 = VDAC_OPA_MUX_NEGSEL_APORT1YCH23,
  opaNegSelAPORT1YCH25 = VDAC_OPA_MUX_NEGSEL_APORT1YCH25,
  opaNegSelAPORT1YCH27 = VDAC_OPA_MUX_NEGSEL_APORT1YCH27,
  opaNegSelAPORT1YCH29 = VDAC_OPA_MUX_NEGSEL_APORT1YCH29,
  opaNegSelAPORT1YCH31 = VDAC_OPA_MUX_NEGSEL_APORT1YCH31,
  opaNegSelAPORT2YCH0 = VDAC_OPA_MUX_NEGSEL_APORT2YCH0,
  opaNegSelAPORT2YCH2 = VDAC_OPA_MUX_NEGSEL_APORT2YCH2,
  opaNegSelAPORT2YCH4 = VDAC_OPA_MUX_NEGSEL_APORT2YCH4,
  opaNegSelAPORT2YCH6 = VDAC_OPA_MUX_NEGSEL_APORT2YCH6,
  opaNegSelAPORT2YCH8 = VDAC_OPA_MUX_NEGSEL_APORT2YCH8,
  opaNegSelAPORT2YCH10 = VDAC_OPA_MUX_NEGSEL_APORT2YCH10,
  opaNegSelAPORT2YCH12 = VDAC_OPA_MUX_NEGSEL_APORT2YCH12,
  opaNegSelAPORT2YCH14 = VDAC_OPA_MUX_NEGSEL_APORT2YCH14,
  opaNegSelAPORT2YCH16 = VDAC_OPA_MUX_NEGSEL_APORT2YCH16,
  opaNegSelAPORT2YCH18 = VDAC_OPA_MUX_NEGSEL_APORT2YCH18,
  opaNegSelAPORT2YCH20 = VDAC_OPA_MUX_NEGSEL_APORT2YCH20,
  opaNegSelAPORT2YCH22 = VDAC_OPA_MUX_NEGSEL_APORT2YCH22,
  opaNegSelAPORT2YCH24 = VDAC_OPA_MUX_NEGSEL_APORT2YCH24,
  opaNegSelAPORT2YCH26 = VDAC_OPA_MUX_NEGSEL_APORT2YCH26,
  opaNegSelAPORT2YCH28 = VDAC_OPA_MUX_NEGSEL_APORT2YCH28,
  opaNegSelAPORT2YCH30 = VDAC_OPA_MUX_NEGSEL_APORT2YCH30,
  opaNegSelAPORT3YCH1 = VDAC_OPA_MUX_NEGSEL_APORT3YCH1,
  opaNegSelAPORT3YCH3 = VDAC_OPA_MUX_NEGSEL_APORT3YCH3,
  opaNegSelAPORT3YCH5 = VDAC_OPA_MUX_NEGSEL_APORT3YCH5,
  opaNegSelAPORT3YCH7 = VDAC_OPA_MUX_NEGSEL_APORT3YCH7,
  opaNegSelAPORT3YCH9 = VDAC_OPA_MUX_NEGSEL_APORT3YCH9,
  opaNegSelAPORT3YCH11 = VDAC_OPA_MUX_NEGSEL_APORT3YCH11,
  opaNegSelAPORT3YCH13 = VDAC_OPA_MUX_NEGSEL_APORT3YCH13,
  opaNegSelAPORT3YCH15 = VDAC_OPA_MUX_NEGSEL_APORT3YCH15,
  opaNegSelAPORT3YCH17 = VDAC_OPA_MUX_NEGSEL_APORT3YCH17,
  opaNegSelAPORT3YCH19 = VDAC_OPA_MUX_NEGSEL_APORT3YCH19,
  opaNegSelAPORT3YCH21 = VDAC_OPA_MUX_NEGSEL_APORT3YCH21,
  opaNegSelAPORT3YCH23 = VDAC_OPA_MUX_NEGSEL_APORT3YCH23,
  opaNegSelAPORT3YCH25 = VDAC_OPA_MUX_NEGSEL_APORT3YCH25,
  opaNegSelAPORT3YCH27 = VDAC_OPA_MUX_NEGSEL_APORT3YCH27,
  opaNegSelAPORT3YCH29 = VDAC_OPA_MUX_NEGSEL_APORT3YCH29,
  opaNegSelAPORT3YCH31 = VDAC_OPA_MUX_NEGSEL_APORT3YCH31,
  opaNegSelAPORT4YCH0 = VDAC_OPA_MUX_NEGSEL_APORT4YCH0,
  opaNegSelAPORT4YCH2 = VDAC_OPA_MUX_NEGSEL_APORT4YCH2,
  opaNegSelAPORT4YCH4 = VDAC_OPA_MUX_NEGSEL_APORT4YCH4,
  opaNegSelAPORT4YCH6 = VDAC_OPA_MUX_NEGSEL_APORT4YCH6,
  opaNegSelAPORT4YCH8 = VDAC_OPA_MUX_NEGSEL_APORT4YCH8,
  opaNegSelAPORT4YCH10 = VDAC_OPA_MUX_NEGSEL_APORT4YCH10,
  opaNegSelAPORT4YCH12 = VDAC_OPA_MUX_NEGSEL_APORT4YCH12,
  opaNegSelAPORT4YCH14 = VDAC_OPA_MUX_NEGSEL_APORT4YCH14,
  opaNegSelAPORT4YCH16 = VDAC_OPA_MUX_NEGSEL_APORT4YCH16,
  opaNegSelAPORT4YCH18 = VDAC_OPA_MUX_NEGSEL_APORT4YCH18,
  opaNegSelAPORT4YCH20 = VDAC_OPA_MUX_NEGSEL_APORT4YCH20,
  opaNegSelAPORT4YCH22 = VDAC_OPA_MUX_NEGSEL_APORT4YCH22,
  opaNegSelAPORT4YCH24 = VDAC_OPA_MUX_NEGSEL_APORT4YCH24,
  opaNegSelAPORT4YCH26 = VDAC_OPA_MUX_NEGSEL_APORT4YCH26,
  opaNegSelAPORT4YCH28 = VDAC_OPA_MUX_NEGSEL_APORT4YCH28,
  opaNegSelAPORT4YCH30 = VDAC_OPA_MUX_NEGSEL_APORT4YCH30,
  opaNegSelDisable = VDAC_OPA_MUX_NEGSEL_DISABLE,
  opaNegSelUnityGain = VDAC_OPA_MUX_NEGSEL_UG,
  opaNegSelResTap = VDAC_OPA_MUX_NEGSEL_OPATAP,
  opaNegSelNegPad = VDAC_OPA_MUX_NEGSEL_NEGPAD
}
 OPAMP negative terminal input selection values.
 
enum  OPAMP_PosSel_TypeDef {
  opaPosSelAPORT1XCH0 = VDAC_OPA_MUX_POSSEL_APORT1XCH0,
  opaPosSelAPORT1XCH2 = VDAC_OPA_MUX_POSSEL_APORT1XCH2,
  opaPosSelAPORT1XCH4 = VDAC_OPA_MUX_POSSEL_APORT1XCH4,
  opaPosSelAPORT1XCH6 = VDAC_OPA_MUX_POSSEL_APORT1XCH6,
  opaPosSelAPORT1XCH8 = VDAC_OPA_MUX_POSSEL_APORT1XCH8,
  opaPosSelAPORT1XCH10 = VDAC_OPA_MUX_POSSEL_APORT1XCH10,
  opaPosSelAPORT1XCH12 = VDAC_OPA_MUX_POSSEL_APORT1XCH12,
  opaPosSelAPORT1XCH14 = VDAC_OPA_MUX_POSSEL_APORT1XCH14,
  opaPosSelAPORT1XCH16 = VDAC_OPA_MUX_POSSEL_APORT1XCH16,
  opaPosSelAPORT1XCH18 = VDAC_OPA_MUX_POSSEL_APORT1XCH18,
  opaPosSelAPORT1XCH20 = VDAC_OPA_MUX_POSSEL_APORT1XCH20,
  opaPosSelAPORT1XCH22 = VDAC_OPA_MUX_POSSEL_APORT1XCH22,
  opaPosSelAPORT1XCH24 = VDAC_OPA_MUX_POSSEL_APORT1XCH24,
  opaPosSelAPORT1XCH26 = VDAC_OPA_MUX_POSSEL_APORT1XCH26,
  opaPosSelAPORT1XCH28 = VDAC_OPA_MUX_POSSEL_APORT1XCH28,
  opaPosSelAPORT1XCH30 = VDAC_OPA_MUX_POSSEL_APORT1XCH30,
  opaPosSelAPORT2XCH1 = VDAC_OPA_MUX_POSSEL_APORT2XCH1,
  opaPosSelAPORT2XCH3 = VDAC_OPA_MUX_POSSEL_APORT2XCH3,
  opaPosSelAPORT2XCH5 = VDAC_OPA_MUX_POSSEL_APORT2XCH5,
  opaPosSelAPORT2XCH7 = VDAC_OPA_MUX_POSSEL_APORT2XCH7,
  opaPosSelAPORT2XCH9 = VDAC_OPA_MUX_POSSEL_APORT2XCH9,
  opaPosSelAPORT2XCH11 = VDAC_OPA_MUX_POSSEL_APORT2XCH11,
  opaPosSelAPORT2XCH13 = VDAC_OPA_MUX_POSSEL_APORT2XCH13,
  opaPosSelAPORT2XCH15 = VDAC_OPA_MUX_POSSEL_APORT2XCH15,
  opaPosSelAPORT2XCH17 = VDAC_OPA_MUX_POSSEL_APORT2XCH17,
  opaPosSelAPORT2XCH19 = VDAC_OPA_MUX_POSSEL_APORT2XCH19,
  opaPosSelAPORT2XCH21 = VDAC_OPA_MUX_POSSEL_APORT2XCH21,
  opaPosSelAPORT2XCH23 = VDAC_OPA_MUX_POSSEL_APORT2XCH23,
  opaPosSelAPORT2XCH25 = VDAC_OPA_MUX_POSSEL_APORT2XCH25,
  opaPosSelAPORT2XCH27 = VDAC_OPA_MUX_POSSEL_APORT2XCH27,
  opaPosSelAPORT2XCH29 = VDAC_OPA_MUX_POSSEL_APORT2XCH29,
  opaPosSelAPORT2XCH31 = VDAC_OPA_MUX_POSSEL_APORT2XCH31,
  opaPosSelAPORT3XCH0 = VDAC_OPA_MUX_POSSEL_APORT3XCH0,
  opaPosSelAPORT3XCH2 = VDAC_OPA_MUX_POSSEL_APORT3XCH2,
  opaPosSelAPORT3XCH4 = VDAC_OPA_MUX_POSSEL_APORT3XCH4,
  opaPosSelAPORT3XCH6 = VDAC_OPA_MUX_POSSEL_APORT3XCH6,
  opaPosSelAPORT3XCH8 = VDAC_OPA_MUX_POSSEL_APORT3XCH8,
  opaPosSelAPORT3XCH10 = VDAC_OPA_MUX_POSSEL_APORT3XCH10,
  opaPosSelAPORT3XCH12 = VDAC_OPA_MUX_POSSEL_APORT3XCH12,
  opaPosSelAPORT3XCH14 = VDAC_OPA_MUX_POSSEL_APORT3XCH14,
  opaPosSelAPORT3XCH16 = VDAC_OPA_MUX_POSSEL_APORT3XCH16,
  opaPosSelAPORT3XCH18 = VDAC_OPA_MUX_POSSEL_APORT3XCH18,
  opaPosSelAPORT3XCH20 = VDAC_OPA_MUX_POSSEL_APORT3XCH20,
  opaPosSelAPORT3XCH22 = VDAC_OPA_MUX_POSSEL_APORT3XCH22,
  opaPosSelAPORT3XCH24 = VDAC_OPA_MUX_POSSEL_APORT3XCH24,
  opaPosSelAPORT3XCH26 = VDAC_OPA_MUX_POSSEL_APORT3XCH26,
  opaPosSelAPORT3XCH28 = VDAC_OPA_MUX_POSSEL_APORT3XCH28,
  opaPosSelAPORT3XCH30 = VDAC_OPA_MUX_POSSEL_APORT3XCH30,
  opaPosSelAPORT4XCH1 = VDAC_OPA_MUX_POSSEL_APORT4XCH1,
  opaPosSelAPORT4XCH3 = VDAC_OPA_MUX_POSSEL_APORT4XCH3,
  opaPosSelAPORT4XCH5 = VDAC_OPA_MUX_POSSEL_APORT4XCH5,
  opaPosSelAPORT4XCH7 = VDAC_OPA_MUX_POSSEL_APORT4XCH7,
  opaPosSelAPORT4XCH9 = VDAC_OPA_MUX_POSSEL_APORT4XCH9,
  opaPosSelAPORT4XCH11 = VDAC_OPA_MUX_POSSEL_APORT4XCH11,
  opaPosSelAPORT4XCH13 = VDAC_OPA_MUX_POSSEL_APORT4XCH13,
  opaPosSelAPORT4XCH15 = VDAC_OPA_MUX_POSSEL_APORT4XCH15,
  opaPosSelAPORT4XCH17 = VDAC_OPA_MUX_POSSEL_APORT4XCH17,
  opaPosSelAPORT4XCH19 = VDAC_OPA_MUX_POSSEL_APORT4XCH19,
  opaPosSelAPORT4XCH21 = VDAC_OPA_MUX_POSSEL_APORT4XCH21,
  opaPosSelAPORT4XCH23 = VDAC_OPA_MUX_POSSEL_APORT4XCH23,
  opaPosSelAPORT4XCH25 = VDAC_OPA_MUX_POSSEL_APORT4XCH25,
  opaPosSelAPORT4XCH27 = VDAC_OPA_MUX_POSSEL_APORT4XCH27,
  opaPosSelAPORT4XCH29 = VDAC_OPA_MUX_POSSEL_APORT4XCH29,
  opaPosSelAPORT4XCH31 = VDAC_OPA_MUX_POSSEL_APORT4XCH31,
  opaPosSelDisable = VDAC_OPA_MUX_POSSEL_DISABLE,
  opaPosSelDac = VDAC_OPA_MUX_POSSEL_DAC,
  opaPosSelPosPad = VDAC_OPA_MUX_POSSEL_POSPAD,
  opaPosSelOpaIn = VDAC_OPA_MUX_POSSEL_OPANEXT,
  opaPosSelResTap = VDAC_OPA_MUX_POSSEL_OPATAP
}
 OPAMP positive terminal input selection values.
 
enum  OPAMP_OutMode_TypeDef {
  opaOutModeDisable = 0,
  opaOutModeMain = VDAC_OPA_OUT_MAINOUTEN,
  opaOutModeAlt = VDAC_OPA_OUT_ALTOUTEN,
  opaOutModeAll = VDAC_OPA_OUT_SHORT,
  opaOutModeAPORT1YCH1 = (VDAC_OPA_OUT_APORTOUTEN | VDAC_OPA_OUT_APORTOUTSEL_APORT1YCH1),
  opaOutModeAPORT1YCH3 = (VDAC_OPA_OUT_APORTOUTEN | VDAC_OPA_OUT_APORTOUTSEL_APORT1YCH3),
  opaOutModeAPORT1YCH5 = (VDAC_OPA_OUT_APORTOUTEN | VDAC_OPA_OUT_APORTOUTSEL_APORT1YCH5),
  opaOutModeAPORT1YCH7 = (VDAC_OPA_OUT_APORTOUTEN | VDAC_OPA_OUT_APORTOUTSEL_APORT1YCH7),
  opaOutModeAPORT1YCH9 = (VDAC_OPA_OUT_APORTOUTEN | VDAC_OPA_OUT_APORTOUTSEL_APORT1YCH9),
  opaOutModeAPORT1YCH11 = (VDAC_OPA_OUT_APORTOUTEN | VDAC_OPA_OUT_APORTOUTSEL_APORT1YCH11),
  opaOutModeAPORT1YCH13 = (VDAC_OPA_OUT_APORTOUTEN | VDAC_OPA_OUT_APORTOUTSEL_APORT1YCH13),
  opaOutModeAPORT1YCH15 = (VDAC_OPA_OUT_APORTOUTEN | VDAC_OPA_OUT_APORTOUTSEL_APORT1YCH15),
  opaOutModeAPORT1YCH17 = (VDAC_OPA_OUT_APORTOUTEN | VDAC_OPA_OUT_APORTOUTSEL_APORT1YCH17),
  opaOutModeAPORT1YCH19 = (VDAC_OPA_OUT_APORTOUTEN | VDAC_OPA_OUT_APORTOUTSEL_APORT1YCH19),
  opaOutModeAPORT1YCH21 = (VDAC_OPA_OUT_APORTOUTEN | VDAC_OPA_OUT_APORTOUTSEL_APORT1YCH21),
  opaOutModeAPORT1YCH23 = (VDAC_OPA_OUT_APORTOUTEN | VDAC_OPA_OUT_APORTOUTSEL_APORT1YCH23),
  opaOutModeAPORT1YCH25 = (VDAC_OPA_OUT_APORTOUTEN | VDAC_OPA_OUT_APORTOUTSEL_APORT1YCH25),
  opaOutModeAPORT1YCH27 = (VDAC_OPA_OUT_APORTOUTEN | VDAC_OPA_OUT_APORTOUTSEL_APORT1YCH27),
  opaOutModeAPORT1YCH29 = (VDAC_OPA_OUT_APORTOUTEN | VDAC_OPA_OUT_APORTOUTSEL_APORT1YCH29),
  opaOutModeAPORT1YCH31 = (VDAC_OPA_OUT_APORTOUTEN | VDAC_OPA_OUT_APORTOUTSEL_APORT1YCH31),
  opaOutModeAPORT2YCH0 = (VDAC_OPA_OUT_APORTOUTEN | VDAC_OPA_OUT_APORTOUTSEL_APORT2YCH0),
  opaOutModeAPORT2YCH2 = (VDAC_OPA_OUT_APORTOUTEN | VDAC_OPA_OUT_APORTOUTSEL_APORT2YCH2),
  opaOutModeAPORT2YCH4 = (VDAC_OPA_OUT_APORTOUTEN | VDAC_OPA_OUT_APORTOUTSEL_APORT2YCH4),
  opaOutModeAPORT2YCH6 = (VDAC_OPA_OUT_APORTOUTEN | VDAC_OPA_OUT_APORTOUTSEL_APORT2YCH6),
  opaOutModeAPORT2YCH8 = (VDAC_OPA_OUT_APORTOUTEN | VDAC_OPA_OUT_APORTOUTSEL_APORT2YCH8),
  opaOutModeAPORT2YCH10 = (VDAC_OPA_OUT_APORTOUTEN | VDAC_OPA_OUT_APORTOUTSEL_APORT2YCH10),
  opaOutModeAPORT2YCH12 = (VDAC_OPA_OUT_APORTOUTEN | VDAC_OPA_OUT_APORTOUTSEL_APORT2YCH12),
  opaOutModeAPORT2YCH14 = (VDAC_OPA_OUT_APORTOUTEN | VDAC_OPA_OUT_APORTOUTSEL_APORT2YCH14),
  opaOutModeAPORT2YCH16 = (VDAC_OPA_OUT_APORTOUTEN | VDAC_OPA_OUT_APORTOUTSEL_APORT2YCH16),
  opaOutModeAPORT2YCH18 = (VDAC_OPA_OUT_APORTOUTEN | VDAC_OPA_OUT_APORTOUTSEL_APORT2YCH18),
  opaOutModeAPORT2YCH20 = (VDAC_OPA_OUT_APORTOUTEN | VDAC_OPA_OUT_APORTOUTSEL_APORT2YCH20),
  opaOutModeAPORT2YCH22 = (VDAC_OPA_OUT_APORTOUTEN | VDAC_OPA_OUT_APORTOUTSEL_APORT2YCH22),
  opaOutModeAPORT2YCH24 = (VDAC_OPA_OUT_APORTOUTEN | VDAC_OPA_OUT_APORTOUTSEL_APORT2YCH24),
  opaOutModeAPORT2YCH26 = (VDAC_OPA_OUT_APORTOUTEN | VDAC_OPA_OUT_APORTOUTSEL_APORT2YCH26),
  opaOutModeAPORT2YCH28 = (VDAC_OPA_OUT_APORTOUTEN | VDAC_OPA_OUT_APORTOUTSEL_APORT2YCH28),
  opaOutModeAPORT2YCH30 = (VDAC_OPA_OUT_APORTOUTEN | VDAC_OPA_OUT_APORTOUTSEL_APORT2YCH30),
  opaOutModeAPORT3YCH1 = (VDAC_OPA_OUT_APORTOUTEN | VDAC_OPA_OUT_APORTOUTSEL_APORT3YCH1),
  opaOutModeAPORT3YCH3 = (VDAC_OPA_OUT_APORTOUTEN | VDAC_OPA_OUT_APORTOUTSEL_APORT3YCH3),
  opaOutModeAPORT3YCH5 = (VDAC_OPA_OUT_APORTOUTEN | VDAC_OPA_OUT_APORTOUTSEL_APORT3YCH5),
  opaOutModeAPORT3YCH7 = (VDAC_OPA_OUT_APORTOUTEN | VDAC_OPA_OUT_APORTOUTSEL_APORT3YCH7),
  opaOutModeAPORT3YCH9 = (VDAC_OPA_OUT_APORTOUTEN | VDAC_OPA_OUT_APORTOUTSEL_APORT3YCH9),
  opaOutModeAPORT3YCH11 = (VDAC_OPA_OUT_APORTOUTEN | VDAC_OPA_OUT_APORTOUTSEL_APORT3YCH11),
  opaOutModeAPORT3YCH13 = (VDAC_OPA_OUT_APORTOUTEN | VDAC_OPA_OUT_APORTOUTSEL_APORT3YCH13),
  opaOutModeAPORT3YCH15 = (VDAC_OPA_OUT_APORTOUTEN | VDAC_OPA_OUT_APORTOUTSEL_APORT3YCH15),
  opaOutModeAPORT3YCH17 = (VDAC_OPA_OUT_APORTOUTEN | VDAC_OPA_OUT_APORTOUTSEL_APORT3YCH17),
  opaOutModeAPORT3YCH19 = (VDAC_OPA_OUT_APORTOUTEN | VDAC_OPA_OUT_APORTOUTSEL_APORT3YCH19),
  opaOutModeAPORT3YCH21 = (VDAC_OPA_OUT_APORTOUTEN | VDAC_OPA_OUT_APORTOUTSEL_APORT3YCH21),
  opaOutModeAPORT3YCH23 = (VDAC_OPA_OUT_APORTOUTEN | VDAC_OPA_OUT_APORTOUTSEL_APORT3YCH23),
  opaOutModeAPORT3YCH25 = (VDAC_OPA_OUT_APORTOUTEN | VDAC_OPA_OUT_APORTOUTSEL_APORT3YCH25),
  opaOutModeAPORT3YCH27 = (VDAC_OPA_OUT_APORTOUTEN | VDAC_OPA_OUT_APORTOUTSEL_APORT3YCH27),
  opaOutModeAPORT3YCH29 = (VDAC_OPA_OUT_APORTOUTEN | VDAC_OPA_OUT_APORTOUTSEL_APORT3YCH29),
  opaOutModeAPORT3YCH31 = (VDAC_OPA_OUT_APORTOUTEN | VDAC_OPA_OUT_APORTOUTSEL_APORT3YCH31),
  opaOutModeAPORT4YCH0 = (VDAC_OPA_OUT_APORTOUTEN | VDAC_OPA_OUT_APORTOUTSEL_APORT4YCH0),
  opaOutModeAPORT4YCH2 = (VDAC_OPA_OUT_APORTOUTEN | VDAC_OPA_OUT_APORTOUTSEL_APORT4YCH2),
  opaOutModeAPORT4YCH4 = (VDAC_OPA_OUT_APORTOUTEN | VDAC_OPA_OUT_APORTOUTSEL_APORT4YCH4),
  opaOutModeAPORT4YCH6 = (VDAC_OPA_OUT_APORTOUTEN | VDAC_OPA_OUT_APORTOUTSEL_APORT4YCH6),
  opaOutModeAPORT4YCH8 = (VDAC_OPA_OUT_APORTOUTEN | VDAC_OPA_OUT_APORTOUTSEL_APORT4YCH8),
  opaOutModeAPORT4YCH10 = (VDAC_OPA_OUT_APORTOUTEN | VDAC_OPA_OUT_APORTOUTSEL_APORT4YCH10),
  opaOutModeAPORT4YCH12 = (VDAC_OPA_OUT_APORTOUTEN | VDAC_OPA_OUT_APORTOUTSEL_APORT4YCH12),
  opaOutModeAPORT4YCH14 = (VDAC_OPA_OUT_APORTOUTEN | VDAC_OPA_OUT_APORTOUTSEL_APORT4YCH14),
  opaOutModeAPORT4YCH16 = (VDAC_OPA_OUT_APORTOUTEN | VDAC_OPA_OUT_APORTOUTSEL_APORT4YCH16),
  opaOutModeAPORT4YCH18 = (VDAC_OPA_OUT_APORTOUTEN | VDAC_OPA_OUT_APORTOUTSEL_APORT4YCH18),
  opaOutModeAPORT4YCH20 = (VDAC_OPA_OUT_APORTOUTEN | VDAC_OPA_OUT_APORTOUTSEL_APORT4YCH20),
  opaOutModeAPORT4YCH22 = (VDAC_OPA_OUT_APORTOUTEN | VDAC_OPA_OUT_APORTOUTSEL_APORT4YCH22),
  opaOutModeAPORT4YCH24 = (VDAC_OPA_OUT_APORTOUTEN | VDAC_OPA_OUT_APORTOUTSEL_APORT4YCH24),
  opaOutModeAPORT4YCH26 = (VDAC_OPA_OUT_APORTOUTEN | VDAC_OPA_OUT_APORTOUTSEL_APORT4YCH26),
  opaOutModeAPORT4YCH28 = (VDAC_OPA_OUT_APORTOUTEN | VDAC_OPA_OUT_APORTOUTSEL_APORT4YCH28),
  opaOutModeAPORT4YCH30 = (VDAC_OPA_OUT_APORTOUTEN | VDAC_OPA_OUT_APORTOUTSEL_APORT4YCH30)
}
 OPAMP output terminal selection values.
 
enum  OPAMP_ResSel_TypeDef {
  opaResSelDefault = VDAC_OPA_MUX_RESSEL_DEFAULT,
  opaResSelR2eq0_33R1 = VDAC_OPA_MUX_RESSEL_RES0,
  opaResSelR2eqR1 = VDAC_OPA_MUX_RESSEL_RES1,
  opaResSelR1eq1_67R1 = VDAC_OPA_MUX_RESSEL_RES2,
  opaResSelR2eq2_2R1 = VDAC_OPA_MUX_RESSEL_RES3,
  opaResSelR2eq3R1 = VDAC_OPA_MUX_RESSEL_RES4,
  opaResSelR2eq4_33R1 = VDAC_OPA_MUX_RESSEL_RES5,
  opaResSelR2eq7R1 = VDAC_OPA_MUX_RESSEL_RES6,
  opaResSelR2eq15R1 = VDAC_OPA_MUX_RESSEL_RES7
}
 OPAMP gain values.
 
enum  OPAMP_ResInMux_TypeDef {
  opaResInMuxDisable = VDAC_OPA_MUX_RESINMUX_DISABLE,
  opaResInMuxOpaIn = VDAC_OPA_MUX_RESINMUX_OPANEXT,
  opaResInMuxNegPad = VDAC_OPA_MUX_RESINMUX_NEGPAD,
  opaResInMuxPosPad = VDAC_OPA_MUX_RESINMUX_POSPAD,
  opaResInMuxComPad = VDAC_OPA_MUX_RESINMUX_COMPAD,
  opaResInMuxCenter = VDAC_OPA_MUX_RESINMUX_CENTER,
  opaResInMuxVss = VDAC_OPA_MUX_RESINMUX_VSS
}
 OPAMP resistor ladder input selector values.
 
enum  OPAMP_PrsMode_TypeDef {
  opaPrsModeDefault = VDAC_OPA_CTRL_PRSMODE_DEFAULT,
  opaPrsModePulsed = VDAC_OPA_CTRL_PRSMODE_PULSED,
  opaPrsModeTimed = VDAC_OPA_CTRL_PRSMODE_TIMED
}
 OPAMP PRS Mode.
 
enum  OPAMP_PrsSel_TypeDef {
  opaPrsSelDefault = VDAC_OPA_CTRL_PRSSEL_DEFAULT,
  opaPrsSelCh0 = VDAC_OPA_CTRL_PRSSEL_PRSCH0,
  opaPrsSelCh1 = VDAC_OPA_CTRL_PRSSEL_PRSCH1,
  opaPrsSelCh2 = VDAC_OPA_CTRL_PRSSEL_PRSCH2,
  opaPrsSelCh3 = VDAC_OPA_CTRL_PRSSEL_PRSCH3,
  opaPrsSelCh4 = VDAC_OPA_CTRL_PRSSEL_PRSCH4,
  opaPrsSelCh5 = VDAC_OPA_CTRL_PRSSEL_PRSCH5,
  opaPrsSelCh6 = VDAC_OPA_CTRL_PRSSEL_PRSCH6,
  opaPrsSelCh7 = VDAC_OPA_CTRL_PRSSEL_PRSCH7
}
 OPAMP PRS Selection.
 
enum  OPAMP_PrsOut_TypeDef {
  opaPrsOutDefault = VDAC_OPA_CTRL_PRSOUTMODE_DEFAULT,
  opaPrsOutWarm = VDAC_OPA_CTRL_PRSOUTMODE_WARM,
  opaPrsOutOutValid = VDAC_OPA_CTRL_PRSOUTMODE_OUTVALID
}
 OPAMP PRS Output.
 
enum  OPAMP_OutScale_Typedef {
  opaOutScaleDefault = VDAC_OPA_CTRL_OUTSCALE_DEFAULT,
  opaOutScaleFull = VDAC_OPA_CTRL_OUTSCALE_FULL,
  opaOutSacleHalf = VDAC_OPA_CTRL_OUTSCALE_HALF
}
 OPAMP Output Scaling.
 
enum  OPAMP_DrvStr_Typedef {
  opaDrvStrDefault = VDAC_OPA_CTRL_DRIVESTRENGTH_DEFAULT,
  opaDrvStrLowerAccLowStr = (0 << _VDAC_OPA_CTRL_DRIVESTRENGTH_SHIFT),
  opaDrvStrLowAccLowStr = (1 << _VDAC_OPA_CTRL_DRIVESTRENGTH_SHIFT),
  opaDrvStrHighAccHighStr = (2 << _VDAC_OPA_CTRL_DRIVESTRENGTH_SHIFT),
  opaDrvStrHigherAccHighStr = (3 << _VDAC_OPA_CTRL_DRIVESTRENGTH_SHIFT)
}
 OPAMP Drive Strength.
 

Function Documentation

◆ OPAMP_Disable()

void OPAMP_Disable ( VDAC_TypeDef *  dac,
OPAMP_TypeDef  opa 
)

Disable an Operational Amplifier.

Parameters
[in]dacA pointer to the VDAC peripheral register block.
[in]opaSelects an OPA, valid values are OPA0, OPA1, and OPA2.

◆ OPAMP_Enable()

void OPAMP_Enable ( VDAC_TypeDef *  dac,
OPAMP_TypeDef  opa,
const OPAMP_Init_TypeDef *  init 
)

Configure and enable an Operational Amplifier.

Note
The value of the alternate output enable bit mask in the OPAMP_Init_TypeDef structure should consist of one or more of the VDAC_OPA_OUT_ALTOUTPADEN_OUT[output#] flags (defined in <part_name>_vdac.h) OR'ed together.

  • VDAC_OPA_OUT_ALTOUTPADEN_OUT0
  • VDAC_OPA_OUT_ALTOUTPADEN_OUT1
  • VDAC_OPA_OUT_ALTOUTPADEN_OUT2
  • VDAC_OPA_OUT_ALTOUTPADEN_OUT3
  • VDAC_OPA_OUT_ALTOUTPADEN_OUT4
For example:
init.outPen = VDAC_OPA_OUT_ALTOUTPADEN_OUT0 | VDAC_OPA_OUT_ALTOUTPADEN_OUT4;
Parameters
[in]dacA pointer to the VDAC peripheral register block.
[in]opaSelects an OPA, valid values are OPA0, OPA1, and OPA2.
[in]initA pointer to a structure containing OPAMP initialization information.

Macro Definition Documentation

◆ OPA_INIT_UNITY_GAIN

#define OPA_INIT_UNITY_GAIN
Value:
{ \
opaNegSelUnityGain, /* Unity gain. */ \
opaPosSelPosPad, /* Positive input from pad. */ \
opaOutModeMain, /* Main output enabled. */ \
opaResSelDefault, /* Resistor ladder is not used. */ \
opaResInMuxDisable, /* Resistor ladder disabled. */ \
0, /* No alternate outputs enabled. */ \
opaDrvStrDefault, /* Default opamp operation mode. */ \
false, /* Disable 3x gain setting. */ \
false, /* Use full output drive strength. */ \
false, /* Disable unity-gain bandwidth scaling. */ \
false, /* Opamp triggered by OPAxEN. */ \
opaPrsModeDefault, /* PRS is not used to trigger opamp. */ \
opaPrsSelDefault, /* PRS is not used to trigger opamp. */ \
opaPrsOutDefault, /* Default PRS output setting. */ \
false, /* Bus mastering enabled on APORTX. */ \
false, /* Bus mastering enabled on APORTY. */ \
3, /* 3 us settle time with default DrvStr. */ \
0, /* No startup delay. */ \
false, /* Rail-to-rail input enabled. */ \
true, /* Use calibrated inverting offset. */ \
0, /* Opamp offset value (not used). */ \
true, /* Use calibrated non-inverting offset. */ \
0 /* Opamp offset value (not used). */ \
}

Configuration of OPA in unity gain voltage follower mode.

◆ OPA_INIT_NON_INVERTING

#define OPA_INIT_NON_INVERTING
Value:
{ \
opaNegSelResTap, /* Negative input from resistor ladder tap. */ \
opaPosSelPosPad, /* Positive input from pad. */ \
opaOutModeMain, /* Main output enabled. */ \
opaResSelR2eq0_33R1, /* R2 = 1/3 R1 */ \
opaResInMuxNegPad, /* Resistor ladder input from negative pad. */ \
0, /* No alternate outputs enabled. */ \
opaDrvStrDefault, /* Default opamp operation mode. */ \
false, /* Disable 3x gain setting. */ \
false, /* Use full output drive strength. */ \
false, /* Disable unity-gain bandwidth scaling. */ \
false, /* Opamp triggered by OPAxEN. */ \
opaPrsModeDefault, /* PRS is not used to trigger opamp. */ \
opaPrsSelDefault, /* PRS is not used to trigger opamp. */ \
opaPrsOutDefault, /* Default PRS output setting. */ \
false, /* Bus mastering enabled on APORTX. */ \
false, /* Bus mastering enabled on APORTY. */ \
3, /* 3 us settle time with default DrvStr. */ \
0, /* No startup delay. */ \
false, /* Rail-to-rail input enabled. */ \
true, /* Use calibrated inverting offset. */ \
0, /* Opamp offset value (not used). */ \
true, /* Use calibrated non-inverting offset. */ \
0 /* Opamp offset value (not used). */ \
}

Configuration of OPA in non-inverting amplifier mode.


◆ OPA_INIT_INVERTING

#define OPA_INIT_INVERTING
Value:
{ \
opaNegSelResTap, /* Negative input from resistor ladder tap. */ \
opaPosSelPosPad, /* Positive input from pad. */ \
opaOutModeMain, /* Main output enabled. */ \
opaResSelR2eqR1, /* R2 = R1 */ \
opaResInMuxNegPad, /* Resistor ladder input from negative pad. */ \
0, /* No alternate outputs enabled. */ \
opaDrvStrDefault, /* Default opamp operation mode. */ \
false, /* Disable 3x gain setting. */ \
false, /* Use full output drive strength. */ \
false, /* Disable unity-gain bandwidth scaling. */ \
false, /* Opamp triggered by OPAxEN. */ \
opaPrsModeDefault, /* PRS is not used to trigger opamp. */ \
opaPrsSelDefault, /* PRS is not used to trigger opamp. */ \
opaPrsOutDefault, /* Default PRS output setting. */ \
false, /* Bus mastering enabled on APORTX. */ \
false, /* Bus mastering enabled on APORTY. */ \
3, /* 3 us settle time with default DrvStr. */ \
0, /* No startup delay. */ \
false, /* Rail-to-rail input enabled. */ \
true, /* Use calibrated inverting offset. */ \
0, /* Opamp offset value (not used). */ \
true, /* Use calibrated non-inverting offset. */ \
0 /* Opamp offset value (not used). */ \
}

Configuration of OPA in inverting amplifier mode.

◆ OPA_INIT_CASCADED_NON_INVERTING_OPA0

#define OPA_INIT_CASCADED_NON_INVERTING_OPA0
Value:
{ \
opaNegSelResTap, /* Negative input from resistor ladder tap. */ \
opaPosSelPosPad, /* Positive input from pad. */ \
opaOutModeMain, /* Main output enabled. */ \
opaResSelR2eq0_33R1, /* R2 = 1/3 R1 */ \
opaResInMuxNegPad, /* Resistor ladder input from negative pad. */ \
0, /* No alternate outputs enabled. */ \
opaDrvStrDefault, /* Default opamp operation mode. */ \
false, /* Disable 3x gain setting. */ \
false, /* Use full output drive strength. */ \
false, /* Disable unity-gain bandwidth scaling. */ \
false, /* Opamp triggered by OPAxEN. */ \
opaPrsModeDefault, /* PRS is not used to trigger opamp. */ \
opaPrsSelDefault, /* PRS is not used to trigger opamp. */ \
opaPrsOutDefault, /* Default PRS output setting. */ \
false, /* Bus mastering enabled on APORTX. */ \
false, /* Bus mastering enabled on APORTY. */ \
3, /* 3 us settle time with default DrvStr. */ \
0, /* No startup delay. */ \
false, /* Rail-to-rail input enabled. */ \
true, /* Use calibrated inverting offset. */ \
0, /* Opamp offset value (not used). */ \
true, /* Use calibrated non-inverting offset. */ \
0 /* Opamp offset value (not used). */ \
}

Configuration of OPA0 in cascaded non-inverting amplifier mode.

◆ OPA_INIT_CASCADED_NON_INVERTING_OPA1

#define OPA_INIT_CASCADED_NON_INVERTING_OPA1
Value:
{ \
opaNegSelResTap, /* Negative input from resistor ladder tap. */ \
opaPosSelOpaIn, /* Positive input from OPA0 output. */ \
opaOutModeMain, /* Main output enabled. */ \
opaResSelR2eq0_33R1, /* R2 = 1/3 R1 */ \
opaResInMuxNegPad, /* Resistor ladder input from negative pad. */ \
0, /* No alternate outputs enabled. */ \
opaDrvStrDefault, /* Default opamp operation mode. */ \
false, /* Disable 3x gain setting. */ \
false, /* Use full output drive strength. */ \
false, /* Disable unity-gain bandwidth scaling. */ \
false, /* Opamp triggered by OPAxEN. */ \
opaPrsModeDefault, /* PRS is not used to trigger opamp. */ \
opaPrsSelDefault, /* PRS is not used to trigger opamp. */ \
opaPrsOutDefault, /* Default PRS output setting. */ \
false, /* Bus mastering enabled on APORTX. */ \
false, /* Bus mastering enabled on APORTY. */ \
3, /* 3 us settle time with default DrvStr. */ \
0, /* No startup delay. */ \
false, /* Rail-to-rail input enabled. */ \
true, /* Use calibrated inverting offset. */ \
0, /* Opamp offset value (not used). */ \
true, /* Use calibrated non-inverting offset. */ \
0 /* Opamp offset value (not used). */ \
}

Configuration of OPA1 in cascaded non-inverting amplifier mode.

◆ OPA_INIT_CASCADED_NON_INVERTING_OPA2

#define OPA_INIT_CASCADED_NON_INVERTING_OPA2
Value:
{ \
opaNegSelResTap, /* Negative input from resistor ladder tap. */ \
opaPosSelOpaIn, /* Positive input from OPA1 output. */ \
opaOutModeMain, /* Main output enabled. */ \
opaResSelR2eq0_33R1, /* R2 = 1/3 R1 */ \
opaResInMuxNegPad, /* Resistor ladder input from negative pad. */ \
0, /* No alternate outputs enabled. */ \
opaDrvStrDefault, /* Default opamp operation mode. */ \
false, /* Disable 3x gain setting. */ \
false, /* Use full output drive strength. */ \
false, /* Disable unity-gain bandwidth scaling. */ \
false, /* Opamp triggered by OPAxEN. */ \
opaPrsModeDefault, /* PRS is not used to trigger opamp. */ \
opaPrsSelDefault, /* PRS is not used to trigger opamp. */ \
opaPrsOutDefault, /* Default PRS output setting. */ \
false, /* Bus mastering enabled on APORTX. */ \
false, /* Bus mastering enabled on APORTY. */ \
3, /* 3 us settle time with default DrvStr. */ \
0, /* No startup delay. */ \
false, /* Rail-to-rail input enabled. */ \
true, /* Use calibrated inverting offset. */ \
0, /* Opamp offset value (not used). */ \
true, /* Use calibrated non-inverting offset. */ \
0 /* Opamp offset value (not used). */ \
}

Configuration of OPA2 in cascaded non-inverting amplifier mode.

◆ OPA_INIT_CASCADED_NON_INVERTING_OPA3

#define OPA_INIT_CASCADED_NON_INVERTING_OPA3
Value:
{ \
opaNegSelResTap, /* Negative input from resistor ladder tap. */ \
opaPosSelOpaIn, /* Positive input from OPA2NEXT output. */ \
opaOutModeMain, /* Main output enabled. */ \
opaResSelR2eq0_33R1, /* R2 = 1/3 R1 */ \
opaResInMuxNegPad, /* Resistor ladder input from negative pad. */ \
0, /* No alternate outputs enabled. */ \
opaDrvStrDefault, /* Default opamp operation mode. */ \
false, /* Disable 3x gain setting. */ \
false, /* Use full output drive strength. */ \
false, /* Disable unity-gain bandwidth scaling. */ \
false, /* Opamp triggered by OPAxEN. */ \
opaPrsModeDefault, /* PRS is not used to trigger opamp. */ \
opaPrsSelDefault, /* PRS is not used to trigger opamp. */ \
opaPrsOutDefault, /* Default PRS output setting. */ \
false, /* Bus mastering enabled on APORTX. */ \
false, /* Bus mastering enabled on APORTY. */ \
3, /* 3 us settle time with default DrvStr. */ \
0, /* No startup delay. */ \
false, /* Rail-to-rail input enabled. */ \
true, /* Use calibrated inverting offset. */ \
0, /* Opamp offset value (not used). */ \
true, /* Use calibrated non-inverting offset. */ \
0 /* Opamp offset value (not used). */ \
}

Configuration of OPA3 in cascaded non-inverting amplifier mode.

◆ OPA_INIT_CASCADED_INVERTING_OPA0

#define OPA_INIT_CASCADED_INVERTING_OPA0
Value:
{ \
opaNegSelResTap, /* Negative input from resistor ladder tap. */ \
opaPosSelPosPad, /* Positive input from pad. */ \
opaOutModeMain, /* Main output enabled. */ \
opaResSelR2eqR1, /* R2 = R1 */ \
opaResInMuxNegPad, /* Resistor ladder input from negative pad. */ \
0, /* No alternate outputs enabled. */ \
opaDrvStrDefault, /* Default opamp operation mode. */ \
false, /* Disable 3x gain setting. */ \
false, /* Use full output drive strength. */ \
false, /* Disable unity-gain bandwidth scaling. */ \
false, /* Opamp triggered by OPAxEN. */ \
opaPrsModeDefault, /* PRS is not used to trigger opamp. */ \
opaPrsSelDefault, /* PRS is not used to trigger opamp. */ \
opaPrsOutDefault, /* Default PRS output setting. */ \
false, /* Bus mastering enabled on APORTX. */ \
false, /* Bus mastering enabled on APORTY. */ \
3, /* 3 us settle time with default DrvStr. */ \
0, /* No startup delay. */ \
false, /* Rail-to-rail input enabled. */ \
true, /* Use calibrated inverting offset. */ \
0, /* Opamp offset value (not used). */ \
true, /* Use calibrated non-inverting offset. */ \
0 /* Opamp offset value (not used). */ \
}

Configuration of OPA0 in cascaded inverting amplifier mode.

◆ OPA_INIT_CASCADED_INVERTING_OPA1

#define OPA_INIT_CASCADED_INVERTING_OPA1
Value:
{ \
opaNegSelResTap, /* Negative input from resistor ladder tap. */ \
opaPosSelPosPad, /* Positive input from pad. */ \
opaOutModeMain, /* Main output enabled. */ \
opaResSelR2eqR1, /* R2 = R1 */ \
opaResInMuxOpaIn, /* Resistor ladder input from OPA0. */ \
0, /* No alternate outputs enabled. */ \
opaDrvStrDefault, /* Default opamp operation mode. */ \
false, /* Disable 3x gain setting. */ \
false, /* Use full output drive strength. */ \
false, /* Disable unity-gain bandwidth scaling. */ \
false, /* Opamp triggered by OPAxEN. */ \
opaPrsModeDefault, /* PRS is not used to trigger opamp. */ \
opaPrsSelDefault, /* PRS is not used to trigger opamp. */ \
opaPrsOutDefault, /* Default PRS output setting. */ \
false, /* Bus mastering enabled on APORTX. */ \
false, /* Bus mastering enabled on APORTY. */ \
3, /* 3 us settle time with default DrvStr. */ \
0, /* No startup delay. */ \
false, /* Rail-to-rail input enabled. */ \
true, /* Use calibrated inverting offset. */ \
0, /* Opamp offset value (not used). */ \
true, /* Use calibrated non-inverting offset. */ \
0 /* Opamp offset value (not used). */ \
}

Configuration of OPA1 in cascaded inverting amplifier mode.

◆ OPA_INIT_CASCADED_INVERTING_OPA2

#define OPA_INIT_CASCADED_INVERTING_OPA2
Value:
{ \
opaNegSelResTap, /* Negative input from resistor ladder tap. */ \
opaPosSelPosPad, /* Positive input from pad. */ \
opaOutModeMain, /* Main output enabled. */ \
opaResSelR2eqR1, /* R2 = R1 */ \
opaResInMuxOpaIn, /* Resistor ladder input from OPA1. */ \
0, /* No alternate outputs enabled. */ \
opaDrvStrDefault, /* Default opamp operation mode. */ \
false, /* Disable 3x gain setting. */ \
false, /* Use full output drive strength. */ \
false, /* Disable unity-gain bandwidth scaling. */ \
false, /* Opamp triggered by OPAxEN. */ \
opaPrsModeDefault, /* PRS is not used to trigger opamp. */ \
opaPrsSelDefault, /* PRS is not used to trigger opamp. */ \
opaPrsOutDefault, /* Default PRS output setting. */ \
false, /* Bus mastering enabled on APORTX. */ \
false, /* Bus mastering enabled on APORTY. */ \
3, /* 3 us settle time with default DrvStr. */ \
0, /* No startup delay. */ \
false, /* Rail-to-rail input enabled. */ \
true, /* Use calibrated inverting offset. */ \
0, /* Opamp offset value (not used). */ \
true, /* Use calibrated non-inverting offset. */ \
0 /* Opamp offset value (not used). */ \
}

Configuration of OPA2 in cascaded inverting amplifier mode.

◆ OPA_INIT_CASCADED_INVERTING_OPA3

#define OPA_INIT_CASCADED_INVERTING_OPA3
Value:
{ \
opaNegSelResTap, /* Negative input from resistor ladder tap. */ \
opaPosSelPosPad, /* Positive input from pad. */ \
opaOutModeMain, /* Main output enabled. */ \
opaResSelR2eqR1, /* R2 = R1 */ \
opaResInMuxOpaIn, /* Resistor ladder input from OPA2. */ \
0, /* No alternate outputs enabled. */ \
opaDrvStrDefault, /* Default opamp operation mode. */ \
false, /* Disable 3x gain setting. */ \
false, /* Use full output drive strength. */ \
false, /* Disable unity-gain bandwidth scaling. */ \
false, /* Opamp triggered by OPAxEN. */ \
opaPrsModeDefault, /* PRS is not used to trigger opamp. */ \
opaPrsSelDefault, /* PRS is not used to trigger opamp. */ \
opaPrsOutDefault, /* Default PRS output setting. */ \
false, /* Bus mastering enabled on APORTX. */ \
false, /* Bus mastering enabled on APORTY. */ \
3, /* 3 us settle time with default DrvStr. */ \
0, /* No startup delay. */ \
false, /* Rail-to-rail input enabled. */ \
true, /* Use calibrated inverting offset. */ \
0, /* Opamp offset value (not used). */ \
true, /* Use calibrated non-inverting offset. */ \
0 /* Opamp offset value (not used). */ \
}

Configuration of OPA3 in cascaded inverting amplifier mode.

◆ OPA_INIT_DIFF_DRIVER_OPA0

#define OPA_INIT_DIFF_DRIVER_OPA0
Value:
{ \
opaNegSelUnityGain, /* Unity gain. */ \
opaPosSelPosPad, /* Positive input from pad. */ \
opaOutModeMain, /* Main output enabled. */ \
opaResSelDefault, /* Resistor ladder is not used. */ \
opaResInMuxDisable, /* Resistor ladder disabled. */ \
0, /* No alternate outputs enabled. */ \
opaDrvStrDefault, /* Default opamp operation mode. */ \
false, /* Disable 3x gain setting. */ \
false, /* Use full output drive strength. */ \
false, /* Disable unity-gain bandwidth scaling. */ \
false, /* Opamp triggered by OPAxEN. */ \
opaPrsModeDefault, /* PRS is not used to trigger opamp. */ \
opaPrsSelDefault, /* PRS is not used to trigger opamp. */ \
opaPrsOutDefault, /* Default PRS output setting. */ \
false, /* Bus mastering enabled on APORTX. */ \
false, /* Bus mastering enabled on APORTY. */ \
3, /* 3 us settle time with default DrvStr. */ \
0, /* No startup delay. */ \
false, /* Rail-to-rail input enabled. */ \
true, /* Use calibrated inverting offset. */ \
0, /* Opamp offset value (not used). */ \
true, /* Use calibrated non-inverting offset. */ \
0 /* Opamp offset value (not used). */ \
}

Configuration of OPA0 in two-opamp differential driver mode.

◆ OPA_INIT_DIFF_DRIVER_OPA1

#define OPA_INIT_DIFF_DRIVER_OPA1
Value:
{ \
opaNegSelResTap, /* Negative input from resistor ladder tap. */ \
opaPosSelPosPad, /* Positive input from pad. */ \
opaOutModeMain, /* Main output enabled. */ \
opaResSelR2eqR1, /* R2 = R1 */ \
opaResInMuxOpaIn, /* Resistor ladder input from OPA0. */ \
0, /* No alternate outputs enabled. */ \
opaDrvStrDefault, /* Default opamp operation mode. */ \
false, /* Disable 3x gain setting. */ \
false, /* Use full output drive strength. */ \
false, /* Disable unity-gain bandwidth scaling. */ \
false, /* Opamp triggered by OPAxEN. */ \
opaPrsModeDefault, /* PRS is not used to trigger opamp. */ \
opaPrsSelDefault, /* PRS is not used to trigger opamp. */ \
opaPrsOutDefault, /* Default PRS output setting. */ \
false, /* Bus mastering enabled on APORTX. */ \
false, /* Bus mastering enabled on APORTY. */ \
3, /* 3 us settle time with default DrvStr. */ \
0, /* No startup delay. */ \
false, /* Rail-to-rail input enabled. */ \
true, /* Use calibrated inverting offset. */ \
0, /* Opamp offset value (not used). */ \
true, /* Use calibrated non-inverting offset. */ \
0 /* Opamp offset value (not used). */ \
}

Configuration of OPA1 in two-opamp differential driver mode.

◆ OPA_INIT_DIFF_RECEIVER_OPA0

#define OPA_INIT_DIFF_RECEIVER_OPA0
Value:
{ \
opaNegSelUnityGain, /* Unity gain. */ \
opaPosSelPosPad, /* Positive input from pad. */ \
opaOutModeMain, /* Main output enabled. */ \
opaResSelR2eqR1, /* R2 = R1 */ \
opaResInMuxNegPad, /* Resistor ladder input from negative pad. */ \
0, /* No alternate outputs enabled. */ \
opaDrvStrDefault, /* Default opamp operation mode. */ \
false, /* Disable 3x gain setting. */ \
false, /* Use full output drive strength. */ \
false, /* Disable unity-gain bandwidth scaling. */ \
false, /* Opamp triggered by OPAxEN. */ \
opaPrsModeDefault, /* PRS is not used to trigger opamp. */ \
opaPrsSelDefault, /* PRS is not used to trigger opamp. */ \
opaPrsOutDefault, /* Default PRS output setting. */ \
false, /* Bus mastering enabled on APORTX. */ \
false, /* Bus mastering enabled on APORTY. */ \
3, /* 3 us settle time with default DrvStr. */ \
0, /* No startup delay. */ \
false, /* Rail-to-rail input enabled. */ \
true, /* Use calibrated inverting offset. */ \
0, /* Opamp offset value (not used). */ \
true, /* Use calibrated non-inverting offset. */ \
0 /* Opamp offset value (not used). */ \
}

Configuration of OPA0 in three-opamp differential receiver mode.

◆ OPA_INIT_DIFF_RECEIVER_OPA1

#define OPA_INIT_DIFF_RECEIVER_OPA1
Value:
{ \
opaNegSelUnityGain, /* Unity gain. */ \
opaPosSelPosPad, /* Positive input from pad. */ \
opaOutModeMain, /* Main output enabled. */ \
opaResSelDefault, /* Resistor ladder is not used. */ \
opaResInMuxDisable, /* Disable resistor ladder. */ \
0, /* No alternate outputs enabled. */ \
opaDrvStrDefault, /* Default opamp operation mode. */ \
false, /* Disable 3x gain setting. */ \
false, /* Use full output drive strength. */ \
false, /* Disable unity-gain bandwidth scaling. */ \
false, /* Opamp triggered by OPAxEN. */ \
opaPrsModeDefault, /* PRS is not used to trigger opamp. */ \
opaPrsSelDefault, /* PRS is not used to trigger opamp. */ \
opaPrsOutDefault, /* Default PRS output setting. */ \
false, /* Bus mastering enabled on APORTX. */ \
false, /* Bus mastering enabled on APORTY. */ \
3, /* 3 us settle time with de