Peripheral DeclarationsDevices > EFM32GG11B820F2048GL192

Macros

#define ACMP0   ((ACMP_TypeDef *) ACMP0_BASE)
 
#define ACMP1   ((ACMP_TypeDef *) ACMP1_BASE)
 
#define ACMP2   ((ACMP_TypeDef *) ACMP2_BASE)
 
#define ACMP3   ((ACMP_TypeDef *) ACMP3_BASE)
 
#define ADC0   ((ADC_TypeDef *) ADC0_BASE)
 
#define ADC1   ((ADC_TypeDef *) ADC1_BASE)
 
#define CAN0   ((CAN_TypeDef *) CAN0_BASE)
 
#define CAN1   ((CAN_TypeDef *) CAN1_BASE)
 
#define CMU   ((CMU_TypeDef *) CMU_BASE)
 
#define CRYOTIMER   ((CRYOTIMER_TypeDef *) CRYOTIMER_BASE)
 
#define CRYPTO0   ((CRYPTO_TypeDef *) CRYPTO0_BASE)
 
#define CSEN   ((CSEN_TypeDef *) CSEN_BASE)
 
#define DEVINFO   ((DEVINFO_TypeDef *) DEVINFO_BASE)
 
#define EBI   ((EBI_TypeDef *) EBI_BASE)
 
#define EMU   ((EMU_TypeDef *) EMU_BASE)
 
#define ETH   ((ETH_TypeDef *) ETH_BASE)
 
#define ETM   ((ETM_TypeDef *) ETM_BASE)
 
#define FPUEH   ((FPUEH_TypeDef *) FPUEH_BASE)
 
#define GPCRC   ((GPCRC_TypeDef *) GPCRC_BASE)
 
#define GPIO   ((GPIO_TypeDef *) GPIO_BASE)
 
#define I2C0   ((I2C_TypeDef *) I2C0_BASE)
 
#define I2C1   ((I2C_TypeDef *) I2C1_BASE)
 
#define I2C2   ((I2C_TypeDef *) I2C2_BASE)
 
#define IDAC0   ((IDAC_TypeDef *) IDAC0_BASE)
 
#define LCD   ((LCD_TypeDef *) LCD_BASE)
 
#define LDMA   ((LDMA_TypeDef *) LDMA_BASE)
 
#define LESENSE   ((LESENSE_TypeDef *) LESENSE_BASE)
 
#define LETIMER0   ((LETIMER_TypeDef *) LETIMER0_BASE)
 
#define LETIMER1   ((LETIMER_TypeDef *) LETIMER1_BASE)
 
#define LEUART0   ((LEUART_TypeDef *) LEUART0_BASE)
 
#define LEUART1   ((LEUART_TypeDef *) LEUART1_BASE)
 
#define MSC   ((MSC_TypeDef *) MSC_BASE)
 
#define PCNT0   ((PCNT_TypeDef *) PCNT0_BASE)
 
#define PCNT1   ((PCNT_TypeDef *) PCNT1_BASE)
 
#define PCNT2   ((PCNT_TypeDef *) PCNT2_BASE)
 
#define PRS   ((PRS_TypeDef *) PRS_BASE)
 
#define QSPI0   ((QSPI_TypeDef *) QSPI0_BASE)
 
#define RMU   ((RMU_TypeDef *) RMU_BASE)
 
#define ROMTABLE   ((ROMTABLE_TypeDef *) ROMTABLE_BASE)
 
#define RTC   ((RTC_TypeDef *) RTC_BASE)
 
#define RTCC   ((RTCC_TypeDef *) RTCC_BASE)
 
#define SDIO   ((SDIO_TypeDef *) SDIO_BASE)
 
#define SMU   ((SMU_TypeDef *) SMU_BASE)
 
#define TIMER0   ((TIMER_TypeDef *) TIMER0_BASE)
 
#define TIMER1   ((TIMER_TypeDef *) TIMER1_BASE)
 
#define TIMER2   ((TIMER_TypeDef *) TIMER2_BASE)
 
#define TIMER3   ((TIMER_TypeDef *) TIMER3_BASE)
 
#define TIMER4   ((TIMER_TypeDef *) TIMER4_BASE)
 
#define TIMER5   ((TIMER_TypeDef *) TIMER5_BASE)
 
#define TIMER6   ((TIMER_TypeDef *) TIMER6_BASE)
 
#define TRNG0   ((TRNG_TypeDef *) TRNG0_BASE)
 
#define UART0   ((USART_TypeDef *) UART0_BASE)
 
#define UART1   ((USART_TypeDef *) UART1_BASE)
 
#define USART0   ((USART_TypeDef *) USART0_BASE)
 
#define USART1   ((USART_TypeDef *) USART1_BASE)
 
#define USART2   ((USART_TypeDef *) USART2_BASE)
 
#define USART3   ((USART_TypeDef *) USART3_BASE)
 
#define USART4   ((USART_TypeDef *) USART4_BASE)
 
#define USART5   ((USART_TypeDef *) USART5_BASE)
 
#define USB   ((USB_TypeDef *) USB_BASE)
 
#define VDAC0   ((VDAC_TypeDef *) VDAC0_BASE)
 
#define WDOG0   ((WDOG_TypeDef *) WDOG0_BASE)
 
#define WDOG1   ((WDOG_TypeDef *) WDOG1_BASE)
 
#define WTIMER0   ((TIMER_TypeDef *) WTIMER0_BASE)
 
#define WTIMER1   ((TIMER_TypeDef *) WTIMER1_BASE)
 
#define WTIMER2   ((TIMER_TypeDef *) WTIMER2_BASE)
 
#define WTIMER3   ((TIMER_TypeDef *) WTIMER3_BASE)
 

Macro Definition Documentation

#define ACMP0   ((ACMP_TypeDef *) ACMP0_BASE)

ACMP0 base pointer

Definition at line 589 of file efm32gg11b820f2048gl192.h.

Referenced by CAPLESENSE_setupACMP().

#define ACMP1   ((ACMP_TypeDef *) ACMP1_BASE)

ACMP1 base pointer

Definition at line 590 of file efm32gg11b820f2048gl192.h.

Referenced by CAPLESENSE_setupACMP().

#define ACMP2   ((ACMP_TypeDef *) ACMP2_BASE)

ACMP2 base pointer

Definition at line 591 of file efm32gg11b820f2048gl192.h.

#define ACMP3   ((ACMP_TypeDef *) ACMP3_BASE)

ACMP3 base pointer

Definition at line 592 of file efm32gg11b820f2048gl192.h.

#define ADC0   ((ADC_TypeDef *) ADC0_BASE)

ADC0 base pointer

Definition at line 587 of file efm32gg11b820f2048gl192.h.

Referenced by ADC0_IRQHandler(), ADC_Init(), adcInit(), getAdcSample(), MIC_init(), MIC_start(), TOUCH_GetPos(), and TOUCH_Init().

#define ADC1   ((ADC_TypeDef *) ADC1_BASE)

ADC1 base pointer

Definition at line 588 of file efm32gg11b820f2048gl192.h.

Referenced by ADC_Init().

#define CAN0   ((CAN_TypeDef *) CAN0_BASE)

CAN0 base pointer

Definition at line 554 of file efm32gg11b820f2048gl192.h.

Referenced by CAN_GetClockFrequency().

#define CAN1   ((CAN_TypeDef *) CAN1_BASE)

CAN1 base pointer

Definition at line 555 of file efm32gg11b820f2048gl192.h.

Referenced by CAN_GetClockFrequency().

#define CRYPTO0   ((CRYPTO_TypeDef *) CRYPTO0_BASE)

CRYPTO0 base pointer

Definition at line 544 of file efm32gg11b820f2048gl192.h.

#define CSEN   ((CSEN_TypeDef *) CSEN_BASE)

CSEN base pointer

Definition at line 596 of file efm32gg11b820f2048gl192.h.

#define ETH   ((ETH_TypeDef *) ETH_BASE)

ETH base pointer

Definition at line 547 of file efm32gg11b820f2048gl192.h.

#define ETM   ((ETM_TypeDef *) ETM_BASE)

ETM base pointer

Definition at line 602 of file efm32gg11b820f2048gl192.h.

#define FPUEH   ((FPUEH_TypeDef *) FPUEH_BASE)

FPUEH base pointer

Definition at line 552 of file efm32gg11b820f2048gl192.h.

#define GPCRC   ((GPCRC_TypeDef *) GPCRC_BASE)

GPCRC base pointer

Definition at line 553 of file efm32gg11b820f2048gl192.h.

#define I2C0   ((I2C_TypeDef *) I2C0_BASE)

I2C0 base pointer

Definition at line 584 of file efm32gg11b820f2048gl192.h.

Referenced by I2C_BusFreqGet(), I2C_BusFreqSet(), I2C_Transfer(), I2C_TransferInit(), I2CSPM_Init(), and sl_efpdrv_init().

#define I2C1   ((I2C_TypeDef *) I2C1_BASE)

I2C1 base pointer

Definition at line 585 of file efm32gg11b820f2048gl192.h.

Referenced by BOARD_i2cBusSelect(), BOARD_init(), I2C_BusFreqGet(), I2C_BusFreqSet(), I2C_Transfer(), I2C_TransferInit(), I2CSPM_Init(), and sl_efpdrv_init().

#define I2C2   ((I2C_TypeDef *) I2C2_BASE)

I2C2 base pointer

Definition at line 586 of file efm32gg11b820f2048gl192.h.

Referenced by I2C_BusFreqGet(), I2C_BusFreqSet(), I2C_Transfer(), I2C_TransferInit(), I2CSPM_Init(), and sl_efpdrv_init().

#define IDAC0   ((IDAC_TypeDef *) IDAC0_BASE)

IDAC0 base pointer

Definition at line 595 of file efm32gg11b820f2048gl192.h.

Referenced by IDAC_RangeSet().

#define LETIMER0   ((LETIMER_TypeDef *) LETIMER0_BASE)

LETIMER0 base pointer

Definition at line 578 of file efm32gg11b820f2048gl192.h.

#define LETIMER1   ((LETIMER_TypeDef *) LETIMER1_BASE)

LETIMER1 base pointer

Definition at line 579 of file efm32gg11b820f2048gl192.h.

#define LEUART0   ((LEUART_TypeDef *) LEUART0_BASE)

LEUART0 base pointer

Definition at line 576 of file efm32gg11b820f2048gl192.h.

Referenced by LEUART_BaudrateGet(), LEUART_BaudrateSet(), and UARTDRV_InitLeuart().

#define LEUART1   ((LEUART_TypeDef *) LEUART1_BASE)

LEUART1 base pointer

Definition at line 577 of file efm32gg11b820f2048gl192.h.

Referenced by LEUART_BaudrateGet(), LEUART_BaudrateSet(), and UARTDRV_InitLeuart().

#define PCNT0   ((PCNT_TypeDef *) PCNT0_BASE)

PCNT0 base pointer

Definition at line 581 of file efm32gg11b820f2048gl192.h.

Referenced by PCNT_CounterTopSet(), PCNT_Init(), and PCNT_TopSet().

#define PCNT1   ((PCNT_TypeDef *) PCNT1_BASE)

PCNT1 base pointer

Definition at line 582 of file efm32gg11b820f2048gl192.h.

Referenced by PCNT_CounterTopSet(), PCNT_Init(), and PCNT_TopSet().

#define PCNT2   ((PCNT_TypeDef *) PCNT2_BASE)

PCNT2 base pointer

Definition at line 583 of file efm32gg11b820f2048gl192.h.

Referenced by PCNT_CounterTopSet(), PCNT_Init(), and PCNT_TopSet().

#define QSPI0   ((QSPI_TypeDef *) QSPI0_BASE)

QSPI0 base pointer

Definition at line 575 of file efm32gg11b820f2048gl192.h.

#define RMU   ((RMU_TypeDef *) RMU_BASE)

RMU base pointer

Definition at line 542 of file efm32gg11b820f2048gl192.h.

Referenced by BSP_initDevice(), RMU_ResetCauseClear(), RMU_ResetCauseGet(), RMU_ResetControl(), RMU_UserResetStateGet(), and RMU_UserResetStateSet().

#define ROMTABLE   ((ROMTABLE_TypeDef *) ROMTABLE_BASE)

ROMTABLE base pointer

Definition at line 606 of file efm32gg11b820f2048gl192.h.

Referenced by SYSTEM_ChipRevisionGet().

#define SDIO   ((SDIO_TypeDef *) SDIO_BASE)

SDIO base pointer

Definition at line 548 of file efm32gg11b820f2048gl192.h.

#define SMU   ((SMU_TypeDef *) SMU_BASE)

SMU base pointer

Definition at line 603 of file efm32gg11b820f2048gl192.h.

Referenced by SMU_EnablePPU(), SMU_GetFaultingPeripheral(), SMU_Init(), SMU_IntClear(), SMU_IntDisable(), SMU_IntEnable(), SMU_IntGet(), SMU_IntGetEnabled(), SMU_IntSet(), and SMU_SetPrivilegedAccess().

#define TIMER0   ((TIMER_TypeDef *) TIMER0_BASE)

TIMER0 base pointer

Definition at line 556 of file efm32gg11b820f2048gl192.h.

Referenced by CAPSENSE_Init(), CAPSENSE_Measure(), TIMER0_IRQHandler(), TIMER_ClearDTIFault(), TIMER_EnableDTI(), TIMER_GetDTIFault(), TIMER_InitDTI(), TIMER_Lock(), TIMER_Unlock(), and TIMER_Valid().

#define TIMER1   ((TIMER_TypeDef *) TIMER1_BASE)

TIMER1 base pointer

Definition at line 557 of file efm32gg11b820f2048gl192.h.

Referenced by CAPSENSE_Init(), CAPSENSE_Measure(), TIMER0_IRQHandler(), and TIMER_Valid().

#define TIMER2   ((TIMER_TypeDef *) TIMER2_BASE)

TIMER2 base pointer

Definition at line 558 of file efm32gg11b820f2048gl192.h.

Referenced by TIMER_Valid().

#define TIMER3   ((TIMER_TypeDef *) TIMER3_BASE)

TIMER3 base pointer

Definition at line 559 of file efm32gg11b820f2048gl192.h.

Referenced by TIMER_Valid().

#define TIMER4   ((TIMER_TypeDef *) TIMER4_BASE)

TIMER4 base pointer

Definition at line 560 of file efm32gg11b820f2048gl192.h.

Referenced by TIMER_Valid().

#define TIMER5   ((TIMER_TypeDef *) TIMER5_BASE)

TIMER5 base pointer

Definition at line 561 of file efm32gg11b820f2048gl192.h.

Referenced by TIMER_Valid().

#define TIMER6   ((TIMER_TypeDef *) TIMER6_BASE)

TIMER6 base pointer

Definition at line 562 of file efm32gg11b820f2048gl192.h.

Referenced by TIMER_Valid().

#define TRNG0   ((TRNG_TypeDef *) TRNG0_BASE)

TRNG0 base pointer

Definition at line 604 of file efm32gg11b820f2048gl192.h.

#define UART0   ((USART_TypeDef *) UART0_BASE)

UART0 base pointer

Definition at line 573 of file efm32gg11b820f2048gl192.h.

Referenced by UARTDRV_InitUart().

#define UART1   ((USART_TypeDef *) UART1_BASE)

UART1 base pointer

Definition at line 574 of file efm32gg11b820f2048gl192.h.

Referenced by UARTDRV_InitUart().

#define USART0   ((USART_TypeDef *) USART0_BASE)

USART0 base pointer

Definition at line 567 of file efm32gg11b820f2048gl192.h.

Referenced by prsIrInput(), prsRxInput(), prsTriggerInput(), SPIDRV_Init(), UARTDRV_InitUart(), and USART_InitIrDA().

#define USART1   ((USART_TypeDef *) USART1_BASE)

USART1 base pointer

Definition at line 568 of file efm32gg11b820f2048gl192.h.

Referenced by prsIrInput(), prsRxInput(), prsTriggerInput(), SPI_TFT_Init(), SPI_TFT_WriteRegister(), SPIDRV_Init(), UARTDRV_InitUart(), and USART_InitIrDA().

#define USART2   ((USART_TypeDef *) USART2_BASE)

USART2 base pointer

Definition at line 569 of file efm32gg11b820f2048gl192.h.

Referenced by prsIrInput(), prsRxInput(), prsTriggerInput(), SPIDRV_Init(), UARTDRV_InitUart(), USART_BaudrateAsyncSet(), USART_BaudrateGet(), and USART_BaudrateSyncSet().

#define USART3   ((USART_TypeDef *) USART3_BASE)

USART3 base pointer

Definition at line 570 of file efm32gg11b820f2048gl192.h.

Referenced by SPIDRV_Init(), and UARTDRV_InitUart().

#define USART4   ((USART_TypeDef *) USART4_BASE)

USART4 base pointer

Definition at line 571 of file efm32gg11b820f2048gl192.h.

Referenced by SPIDRV_Init(), and UARTDRV_InitUart().

#define USART5   ((USART_TypeDef *) USART5_BASE)

USART5 base pointer

Definition at line 572 of file efm32gg11b820f2048gl192.h.

Referenced by SPIDRV_Init(), and UARTDRV_InitUart().

#define USB   ((USB_TypeDef *) USB_BASE)

USB base pointer

Definition at line 594 of file efm32gg11b820f2048gl192.h.

Referenced by USBD_Init(), and USBD_Stop().

#define VDAC0   ((VDAC_TypeDef *) VDAC0_BASE)

VDAC0 base pointer

Definition at line 593 of file efm32gg11b820f2048gl192.h.

#define WDOG0   ((WDOG_TypeDef *) WDOG0_BASE)

WDOG0 base pointer

Definition at line 600 of file efm32gg11b820f2048gl192.h.

#define WDOG1   ((WDOG_TypeDef *) WDOG1_BASE)

WDOG1 base pointer

Definition at line 601 of file efm32gg11b820f2048gl192.h.

#define WTIMER0   ((TIMER_TypeDef *) WTIMER0_BASE)

WTIMER0 base pointer

Definition at line 563 of file efm32gg11b820f2048gl192.h.

Referenced by TIMER_MaxCount(), and TIMER_Valid().

#define WTIMER1   ((TIMER_TypeDef *) WTIMER1_BASE)

WTIMER1 base pointer

Definition at line 564 of file efm32gg11b820f2048gl192.h.

Referenced by TIMER_MaxCount(), and TIMER_Valid().

#define WTIMER2   ((TIMER_TypeDef *) WTIMER2_BASE)

WTIMER2 base pointer

Definition at line 565 of file efm32gg11b820f2048gl192.h.

Referenced by TIMER_MaxCount(), and TIMER_Valid().

#define WTIMER3   ((TIMER_TypeDef *) WTIMER3_BASE)

WTIMER3 base pointer

Definition at line 566 of file efm32gg11b820f2048gl192.h.

Referenced by TIMER_MaxCount(), and TIMER_Valid().