Peripheral DeclarationsDevices > EFR32BG1P333F256GM48

Macros

#define ACMP0   ((ACMP_TypeDef *) ACMP0_BASE)
 
#define ACMP1   ((ACMP_TypeDef *) ACMP1_BASE)
 
#define ADC0   ((ADC_TypeDef *) ADC0_BASE)
 
#define CMU   ((CMU_TypeDef *) CMU_BASE)
 
#define CRYOTIMER   ((CRYOTIMER_TypeDef *) CRYOTIMER_BASE)
 
#define CRYPTO   ((CRYPTO_TypeDef *) CRYPTO_BASE)
 
#define DEVINFO   ((DEVINFO_TypeDef *) DEVINFO_BASE)
 
#define EMU   ((EMU_TypeDef *) EMU_BASE)
 
#define FPUEH   ((FPUEH_TypeDef *) FPUEH_BASE)
 
#define GPCRC   ((GPCRC_TypeDef *) GPCRC_BASE)
 
#define GPIO   ((GPIO_TypeDef *) GPIO_BASE)
 
#define I2C0   ((I2C_TypeDef *) I2C0_BASE)
 
#define IDAC0   ((IDAC_TypeDef *) IDAC0_BASE)
 
#define LDMA   ((LDMA_TypeDef *) LDMA_BASE)
 
#define LETIMER0   ((LETIMER_TypeDef *) LETIMER0_BASE)
 
#define LEUART0   ((LEUART_TypeDef *) LEUART0_BASE)
 
#define MSC   ((MSC_TypeDef *) MSC_BASE)
 
#define PCNT0   ((PCNT_TypeDef *) PCNT0_BASE)
 
#define PRS   ((PRS_TypeDef *) PRS_BASE)
 
#define RMU   ((RMU_TypeDef *) RMU_BASE)
 
#define ROMTABLE   ((ROMTABLE_TypeDef *) ROMTABLE_BASE)
 
#define RTCC   ((RTCC_TypeDef *) RTCC_BASE)
 
#define TIMER0   ((TIMER_TypeDef *) TIMER0_BASE)
 
#define TIMER1   ((TIMER_TypeDef *) TIMER1_BASE)
 
#define USART0   ((USART_TypeDef *) USART0_BASE)
 
#define USART1   ((USART_TypeDef *) USART1_BASE)
 
#define WDOG0   ((WDOG_TypeDef *) WDOG0_BASE)
 

Macro Definition Documentation

#define ACMP0   ((ACMP_TypeDef *) ACMP0_BASE)

ACMP0 base pointer

Definition at line 370 of file efr32bg1p333f256gm48.h.

Referenced by CAPLESENSE_setupACMP().

#define ACMP1   ((ACMP_TypeDef *) ACMP1_BASE)

ACMP1 base pointer

Definition at line 371 of file efr32bg1p333f256gm48.h.

Referenced by CAPLESENSE_setupACMP().

#define ADC0   ((ADC_TypeDef *) ADC0_BASE)

ADC0 base pointer

Definition at line 369 of file efr32bg1p333f256gm48.h.

Referenced by ADC0_IRQHandler(), ADC_Init(), adcInit(), getAdcSample(), MIC_init(), MIC_start(), TOUCH_GetPos(), and TOUCH_Init().

#define CRYPTO   ((CRYPTO_TypeDef *) CRYPTO_BASE)

CRYPTO base pointer

Definition at line 354 of file efr32bg1p333f256gm48.h.

#define FPUEH   ((FPUEH_TypeDef *) FPUEH_BASE)

FPUEH base pointer

Definition at line 358 of file efr32bg1p333f256gm48.h.

#define GPCRC   ((GPCRC_TypeDef *) GPCRC_BASE)

GPCRC base pointer

Definition at line 359 of file efr32bg1p333f256gm48.h.

#define I2C0   ((I2C_TypeDef *) I2C0_BASE)

I2C0 base pointer

Definition at line 368 of file efr32bg1p333f256gm48.h.

Referenced by I2C_BusFreqGet(), I2C_BusFreqSet(), I2C_Transfer(), I2C_TransferInit(), I2CSPM_Init(), and sl_efpdrv_init().

#define IDAC0   ((IDAC_TypeDef *) IDAC0_BASE)

IDAC0 base pointer

Definition at line 372 of file efr32bg1p333f256gm48.h.

Referenced by IDAC_RangeSet().

#define LETIMER0   ((LETIMER_TypeDef *) LETIMER0_BASE)

LETIMER0 base pointer

Definition at line 365 of file efr32bg1p333f256gm48.h.

#define LEUART0   ((LEUART_TypeDef *) LEUART0_BASE)

LEUART0 base pointer

Definition at line 364 of file efr32bg1p333f256gm48.h.

Referenced by LEUART_BaudrateGet(), LEUART_BaudrateSet(), and UARTDRV_InitLeuart().

#define PCNT0   ((PCNT_TypeDef *) PCNT0_BASE)

PCNT0 base pointer

Definition at line 367 of file efr32bg1p333f256gm48.h.

Referenced by PCNT_CounterTopSet(), PCNT_Init(), and PCNT_TopSet().

#define RMU   ((RMU_TypeDef *) RMU_BASE)

RMU base pointer

Definition at line 352 of file efr32bg1p333f256gm48.h.

Referenced by BSP_initDevice(), RMU_ResetCauseClear(), RMU_ResetCauseGet(), RMU_ResetControl(), RMU_UserResetStateGet(), and RMU_UserResetStateSet().

#define ROMTABLE   ((ROMTABLE_TypeDef *) ROMTABLE_BASE)

ROMTABLE base pointer

Definition at line 376 of file efr32bg1p333f256gm48.h.

Referenced by SYSTEM_ChipRevisionGet().

#define TIMER0   ((TIMER_TypeDef *) TIMER0_BASE)

TIMER0 base pointer

Definition at line 360 of file efr32bg1p333f256gm48.h.

Referenced by CAPSENSE_Init(), CAPSENSE_Measure(), TIMER0_IRQHandler(), TIMER_ClearDTIFault(), TIMER_EnableDTI(), TIMER_GetDTIFault(), TIMER_InitDTI(), TIMER_Lock(), TIMER_Unlock(), and TIMER_Valid().

#define TIMER1   ((TIMER_TypeDef *) TIMER1_BASE)

TIMER1 base pointer

Definition at line 361 of file efr32bg1p333f256gm48.h.

Referenced by CAPSENSE_Init(), CAPSENSE_Measure(), TIMER0_IRQHandler(), and TIMER_Valid().

#define USART0   ((USART_TypeDef *) USART0_BASE)

USART0 base pointer

Definition at line 362 of file efr32bg1p333f256gm48.h.

Referenced by prsIrInput(), prsRxInput(), prsTriggerInput(), SPIDRV_Init(), UARTDRV_InitUart(), and USART_InitIrDA().

#define USART1   ((USART_TypeDef *) USART1_BASE)

USART1 base pointer

Definition at line 363 of file efr32bg1p333f256gm48.h.

Referenced by prsIrInput(), prsRxInput(), prsTriggerInput(), SPI_TFT_Init(), SPI_TFT_WriteRegister(), SPIDRV_Init(), UARTDRV_InitUart(), and USART_InitIrDA().

#define WDOG0   ((WDOG_TypeDef *) WDOG0_BASE)

WDOG0 base pointer

Definition at line 374 of file efr32bg1p333f256gm48.h.