AGC Bit FieldsDevices > AGC

Macros

#define _AGC_AGCPERIOD_MASK   0xFFFFFFFFUL
 
#define _AGC_AGCPERIOD_MAXHICNTTHD_DEFAULT   0x00000007UL
 
#define _AGC_AGCPERIOD_MAXHICNTTHD_MASK   0xFF0000UL
 
#define _AGC_AGCPERIOD_MAXHICNTTHD_SHIFT   16
 
#define _AGC_AGCPERIOD_PERIODHI_DEFAULT   0x0000000EUL
 
#define _AGC_AGCPERIOD_PERIODHI_MASK   0xFFUL
 
#define _AGC_AGCPERIOD_PERIODHI_SHIFT   0
 
#define _AGC_AGCPERIOD_PERIODLO_DEFAULT   0x00000037UL
 
#define _AGC_AGCPERIOD_PERIODLO_MASK   0xFF00UL
 
#define _AGC_AGCPERIOD_PERIODLO_SHIFT   8
 
#define _AGC_AGCPERIOD_RESETVALUE   0xD607370EUL
 
#define _AGC_AGCPERIOD_SETTLETIMEIF_DEFAULT   0x00000006UL
 
#define _AGC_AGCPERIOD_SETTLETIMEIF_MASK   0xF000000UL
 
#define _AGC_AGCPERIOD_SETTLETIMEIF_SHIFT   24
 
#define _AGC_AGCPERIOD_SETTLETIMERF_DEFAULT   0x0000000DUL
 
#define _AGC_AGCPERIOD_SETTLETIMERF_MASK   0xF0000000UL
 
#define _AGC_AGCPERIOD_SETTLETIMERF_SHIFT   28
 
#define _AGC_CTRL0_ADCATTENCODE_DEFAULT   0x00000000UL
 
#define _AGC_CTRL0_ADCATTENCODE_MASK   0x6000000UL
 
#define _AGC_CTRL0_ADCATTENCODE_SHIFT   25
 
#define _AGC_CTRL0_ADCATTENMODE_DEFAULT   0x00000000UL
 
#define _AGC_CTRL0_ADCATTENMODE_DISABLE   0x00000000UL
 
#define _AGC_CTRL0_ADCATTENMODE_MASK   0x800000UL
 
#define _AGC_CTRL0_ADCATTENMODE_NOTMAXGAIN   0x00000001UL
 
#define _AGC_CTRL0_ADCATTENMODE_SHIFT   23
 
#define _AGC_CTRL0_AGCCLKUNDIVREQ_DEFAULT   0x00000000UL
 
#define _AGC_CTRL0_AGCCLKUNDIVREQ_MASK   0x200000UL
 
#define _AGC_CTRL0_AGCCLKUNDIVREQ_SHIFT   21
 
#define _AGC_CTRL0_AGCRST_DEFAULT   0x00000000UL
 
#define _AGC_CTRL0_AGCRST_MASK   0x80000000UL
 
#define _AGC_CTRL0_AGCRST_SHIFT   31
 
#define _AGC_CTRL0_DISCFLOOPADJ_DEFAULT   0x00000000UL
 
#define _AGC_CTRL0_DISCFLOOPADJ_MASK   0x80000UL
 
#define _AGC_CTRL0_DISCFLOOPADJ_SHIFT   19
 
#define _AGC_CTRL0_DISPNDWNCOMP_DEFAULT   0x00000000UL
 
#define _AGC_CTRL0_DISPNDWNCOMP_MASK   0x40000000UL
 
#define _AGC_CTRL0_DISPNDWNCOMP_SHIFT   30
 
#define _AGC_CTRL0_DISPNGAINUP_DEFAULT   0x00000001UL
 
#define _AGC_CTRL0_DISPNGAINUP_MASK   0x20000000UL
 
#define _AGC_CTRL0_DISPNGAINUP_SHIFT   29
 
#define _AGC_CTRL0_DISRESETCHPWR_DEFAULT   0x00000000UL
 
#define _AGC_CTRL0_DISRESETCHPWR_MASK   0x400000UL
 
#define _AGC_CTRL0_DISRESETCHPWR_SHIFT   22
 
#define _AGC_CTRL0_DSADISCFLOOP_DEFAULT   0x00000000UL
 
#define _AGC_CTRL0_DSADISCFLOOP_MASK   0x10000000UL
 
#define _AGC_CTRL0_DSADISCFLOOP_SHIFT   28
 
#define _AGC_CTRL0_ENRSSIRESET_DEFAULT   0x00000000UL
 
#define _AGC_CTRL0_ENRSSIRESET_MASK   0x8000000UL
 
#define _AGC_CTRL0_ENRSSIRESET_SHIFT   27
 
#define _AGC_CTRL0_MASK   0xFEEFFFFFUL
 
#define _AGC_CTRL0_MODE_CONT   0x00000000UL
 
#define _AGC_CTRL0_MODE_DEFAULT   0x00000002UL
 
#define _AGC_CTRL0_MODE_LOCKDSA   0x00000003UL
 
#define _AGC_CTRL0_MODE_LOCKFRAMEDET   0x00000002UL
 
#define _AGC_CTRL0_MODE_LOCKPREDET   0x00000001UL
 
#define _AGC_CTRL0_MODE_MASK   0x700UL
 
#define _AGC_CTRL0_MODE_SHIFT   8
 
#define _AGC_CTRL0_PWRTARGET_DEFAULT   0x0000007FUL
 
#define _AGC_CTRL0_PWRTARGET_MASK   0xFFUL
 
#define _AGC_CTRL0_PWRTARGET_SHIFT   0
 
#define _AGC_CTRL0_RESETVALUE   0x2002727FUL
 
#define _AGC_CTRL0_RSSISHIFT_DEFAULT   0x0000004EUL
 
#define _AGC_CTRL0_RSSISHIFT_MASK   0x7F800UL
 
#define _AGC_CTRL0_RSSISHIFT_SHIFT   11
 
#define _AGC_CTRL1_CCATHRSH_DEFAULT   0x00000000UL
 
#define _AGC_CTRL1_CCATHRSH_MASK   0xFFUL
 
#define _AGC_CTRL1_CCATHRSH_SHIFT   0
 
#define _AGC_CTRL1_MASK   0xFFFFFFFFUL
 
#define _AGC_CTRL1_PWRPERIOD_DEFAULT   0x00000001UL
 
#define _AGC_CTRL1_PWRPERIOD_MASK   0x7000UL
 
#define _AGC_CTRL1_PWRPERIOD_SHIFT   12
 
#define _AGC_CTRL1_RESETVALUE   0x00001300UL
 
#define _AGC_CTRL1_RSSIPERIOD_DEFAULT   0x00000003UL
 
#define _AGC_CTRL1_RSSIPERIOD_MASK   0xF00UL
 
#define _AGC_CTRL1_RSSIPERIOD_SHIFT   8
 
#define _AGC_CTRL1_SUBDEN_DEFAULT   0x00000000UL
 
#define _AGC_CTRL1_SUBDEN_MASK   0x3E00000UL
 
#define _AGC_CTRL1_SUBDEN_SHIFT   21
 
#define _AGC_CTRL1_SUBINT_DEFAULT   0x00000000UL
 
#define _AGC_CTRL1_SUBINT_MASK   0xFC000000UL
 
#define _AGC_CTRL1_SUBINT_SHIFT   26
 
#define _AGC_CTRL1_SUBNUM_DEFAULT   0x00000000UL
 
#define _AGC_CTRL1_SUBNUM_MASK   0x1F0000UL
 
#define _AGC_CTRL1_SUBNUM_SHIFT   16
 
#define _AGC_CTRL1_SUBPERIOD_DEFAULT   0x00000000UL
 
#define _AGC_CTRL1_SUBPERIOD_MASK   0x8000UL
 
#define _AGC_CTRL1_SUBPERIOD_SHIFT   15
 
#define _AGC_CTRL2_DISRFPKD_DEFAULT   0x00000000UL
 
#define _AGC_CTRL2_DISRFPKD_MASK   0x80000000UL
 
#define _AGC_CTRL2_DISRFPKD_SHIFT   31
 
#define _AGC_CTRL2_DMASEL_DEFAULT   0x00000000UL
 
#define _AGC_CTRL2_DMASEL_GAIN   0x00000001UL
 
#define _AGC_CTRL2_DMASEL_MASK   0x1UL
 
#define _AGC_CTRL2_DMASEL_RSSI   0x00000000UL
 
#define _AGC_CTRL2_DMASEL_SHIFT   0
 
#define _AGC_CTRL2_MASK   0xC3FFFFFFUL
 
#define _AGC_CTRL2_PRSDEBUGEN_DEFAULT   0x00000000UL
 
#define _AGC_CTRL2_PRSDEBUGEN_MASK   0x40000000UL
 
#define _AGC_CTRL2_PRSDEBUGEN_SHIFT   30
 
#define _AGC_CTRL2_REHICNTTHD_DEFAULT   0x00000008UL
 
#define _AGC_CTRL2_REHICNTTHD_MASK   0x1FE0UL
 
#define _AGC_CTRL2_REHICNTTHD_SHIFT   5
 
#define _AGC_CTRL2_RELBYCHPWR_DEFAULT   0x00000000UL
 
#define _AGC_CTRL2_RELBYCHPWR_LO_CNT   0x00000000UL
 
#define _AGC_CTRL2_RELBYCHPWR_LO_CNT_AND_PWR   0x00000003UL
 
#define _AGC_CTRL2_RELBYCHPWR_LO_CNT_PWR   0x00000002UL
 
#define _AGC_CTRL2_RELBYCHPWR_MASK   0x30000UL
 
#define _AGC_CTRL2_RELBYCHPWR_PWR   0x00000001UL
 
#define _AGC_CTRL2_RELBYCHPWR_SHIFT   16
 
#define _AGC_CTRL2_RELOTHD_DEFAULT   0x00000003UL
 
#define _AGC_CTRL2_RELOTHD_MASK   0xE000UL
 
#define _AGC_CTRL2_RELOTHD_SHIFT   13
 
#define _AGC_CTRL2_RELTARGETPWR_DEFAULT   0x00000000UL
 
#define _AGC_CTRL2_RELTARGETPWR_MASK   0x3FC0000UL
 
#define _AGC_CTRL2_RELTARGETPWR_SHIFT   18
 
#define _AGC_CTRL2_RESETVALUE   0x0000610AUL
 
#define _AGC_CTRL2_SAFEMODE_DEFAULT   0x00000001UL
 
#define _AGC_CTRL2_SAFEMODE_MASK   0x2UL
 
#define _AGC_CTRL2_SAFEMODE_SHIFT   1
 
#define _AGC_CTRL2_SAFEMODETHD_DEFAULT   0x00000002UL
 
#define _AGC_CTRL2_SAFEMODETHD_MASK   0x1CUL
 
#define _AGC_CTRL2_SAFEMODETHD_SHIFT   2
 
#define _AGC_CTRL3_IFPKDDEB_DEFAULT   0x00000000UL
 
#define _AGC_CTRL3_IFPKDDEB_MASK   0x1UL
 
#define _AGC_CTRL3_IFPKDDEB_SHIFT   0
 
#define _AGC_CTRL3_IFPKDDEBPRD_DEFAULT   0x00000000UL
 
#define _AGC_CTRL3_IFPKDDEBPRD_MASK   0x1F8UL
 
#define _AGC_CTRL3_IFPKDDEBPRD_SHIFT   3
 
#define _AGC_CTRL3_IFPKDDEBRST_DEFAULT   0x00000004UL
 
#define _AGC_CTRL3_IFPKDDEBRST_MASK   0x1E00UL
 
#define _AGC_CTRL3_IFPKDDEBRST_SHIFT   9
 
#define _AGC_CTRL3_IFPKDDEBTHD_DEFAULT   0x00000000UL
 
#define _AGC_CTRL3_IFPKDDEBTHD_MASK   0x6UL
 
#define _AGC_CTRL3_IFPKDDEBTHD_SHIFT   1
 
#define _AGC_CTRL3_MASK   0x03FFFFFFUL
 
#define _AGC_CTRL3_RESETVALUE   0x02A8A800UL
 
#define _AGC_CTRL3_RFPKDDEB_DEFAULT   0x00000001UL
 
#define _AGC_CTRL3_RFPKDDEB_MASK   0x2000UL
 
#define _AGC_CTRL3_RFPKDDEB_SHIFT   13
 
#define _AGC_CTRL3_RFPKDDEBPRD_DEFAULT   0x00000028UL
 
#define _AGC_CTRL3_RFPKDDEBPRD_MASK   0x3F0000UL
 
#define _AGC_CTRL3_RFPKDDEBPRD_SHIFT   16
 
#define _AGC_CTRL3_RFPKDDEBRST_DEFAULT   0x0000000AUL
 
#define _AGC_CTRL3_RFPKDDEBRST_MASK   0x3C00000UL
 
#define _AGC_CTRL3_RFPKDDEBRST_SHIFT   22
 
#define _AGC_CTRL3_RFPKDDEBTHD_DEFAULT   0x00000002UL
 
#define _AGC_CTRL3_RFPKDDEBTHD_MASK   0xC000UL
 
#define _AGC_CTRL3_RFPKDDEBTHD_SHIFT   14
 
#define _AGC_EN_EN_DEFAULT   0x00000000UL
 
#define _AGC_EN_EN_MASK   0x1UL
 
#define _AGC_EN_EN_SHIFT   0
 
#define _AGC_EN_MASK   0x00000001UL
 
#define _AGC_EN_RESETVALUE   0x00000000UL
 
#define _AGC_FRAMERSSI_FRAMERSSIFRAC_DEFAULT   0x00000000UL
 
#define _AGC_FRAMERSSI_FRAMERSSIFRAC_MASK   0xC0UL
 
#define _AGC_FRAMERSSI_FRAMERSSIFRAC_SHIFT   6
 
#define _AGC_FRAMERSSI_FRAMERSSIINT_DEFAULT   0x00000080UL
 
#define _AGC_FRAMERSSI_FRAMERSSIINT_MASK   0xFF00UL
 
#define _AGC_FRAMERSSI_FRAMERSSIINT_SHIFT   8
 
#define _AGC_FRAMERSSI_MASK   0x0000FFC0UL
 
#define _AGC_FRAMERSSI_RESETVALUE   0x00008000UL
 
#define _AGC_GAINRANGE_BOOSTLNA_DEFAULT   0x00000000UL
 
#define _AGC_GAINRANGE_BOOSTLNA_MASK   0x4000000UL
 
#define _AGC_GAINRANGE_BOOSTLNA_SHIFT   26
 
#define _AGC_GAINRANGE_GAININCSTEP_DEFAULT   0x00000001UL
 
#define _AGC_GAINRANGE_GAININCSTEP_MASK   0xF00UL
 
#define _AGC_GAINRANGE_GAININCSTEP_SHIFT   8
 
#define _AGC_GAINRANGE_HIPWRTHD_DEFAULT   0x00000008UL
 
#define _AGC_GAINRANGE_HIPWRTHD_MASK   0x3F00000UL
 
#define _AGC_GAINRANGE_HIPWRTHD_SHIFT   20
 
#define _AGC_GAINRANGE_LATCHEDHISTEP_DEFAULT   0x00000001UL
 
#define _AGC_GAINRANGE_LATCHEDHISTEP_MASK   0xF0000UL
 
#define _AGC_GAINRANGE_LATCHEDHISTEP_SHIFT   16
 
#define _AGC_GAINRANGE_LNABWADJ_DEFAULT   0x00000001UL
 
#define _AGC_GAINRANGE_LNABWADJ_MASK   0x8000000UL
 
#define _AGC_GAINRANGE_LNABWADJ_SHIFT   27
 
#define _AGC_GAINRANGE_LNAINDEXBORDER_DEFAULT   0x00000007UL
 
#define _AGC_GAINRANGE_LNAINDEXBORDER_MASK   0xFUL
 
#define _AGC_GAINRANGE_LNAINDEXBORDER_SHIFT   0
 
#define _AGC_GAINRANGE_MASK   0x0FFFFFFFUL
 
#define _AGC_GAINRANGE_PGAINDEXBORDER_DEFAULT   0x00000008UL
 
#define _AGC_GAINRANGE_PGAINDEXBORDER_MASK   0xF0UL
 
#define _AGC_GAINRANGE_PGAINDEXBORDER_SHIFT   4
 
#define _AGC_GAINRANGE_PNGAINSTEP_DEFAULT   0x00000003UL
 
#define _AGC_GAINRANGE_PNGAINSTEP_MASK   0xF000UL
 
#define _AGC_GAINRANGE_PNGAINSTEP_SHIFT   12
 
#define _AGC_GAINRANGE_RESETVALUE   0x08813187UL
 
#define _AGC_GAINSTEPLIM_CFLOOPDEL_DEFAULT   0x0000000AUL
 
#define _AGC_GAINSTEPLIM_CFLOOPDEL_MASK   0xFE0UL
 
#define _AGC_GAINSTEPLIM_CFLOOPDEL_SHIFT   5
 
#define _AGC_GAINSTEPLIM_CFLOOPSTEPMAX_DEFAULT   0x00000004UL
 
#define _AGC_GAINSTEPLIM_CFLOOPSTEPMAX_MASK   0x1FUL
 
#define _AGC_GAINSTEPLIM_CFLOOPSTEPMAX_SHIFT   0
 
#define _AGC_GAINSTEPLIM_HYST_DEFAULT   0x00000003UL
 
#define _AGC_GAINSTEPLIM_HYST_MASK   0xF000UL
 
#define _AGC_GAINSTEPLIM_HYST_SHIFT   12
 
#define _AGC_GAINSTEPLIM_MASK   0x01FFFFFFUL
 
#define _AGC_GAINSTEPLIM_MAXPWRVAR_DEFAULT   0x00000000UL
 
#define _AGC_GAINSTEPLIM_MAXPWRVAR_MASK   0xFF0000UL
 
#define _AGC_GAINSTEPLIM_MAXPWRVAR_SHIFT   16
 
#define _AGC_GAINSTEPLIM_RESETVALUE   0x00003144UL
 
#define _AGC_GAINSTEPLIM_TRANRSTAGC_DEFAULT   0x00000000UL
 
#define _AGC_GAINSTEPLIM_TRANRSTAGC_MASK   0x1000000UL
 
#define _AGC_GAINSTEPLIM_TRANRSTAGC_SHIFT   24
 
#define _AGC_HICNTREGION_HICNTREGION0_DEFAULT   0x00000003UL
 
#define _AGC_HICNTREGION_HICNTREGION0_MASK   0xFUL
 
#define _AGC_HICNTREGION_HICNTREGION0_SHIFT   0
 
#define _AGC_HICNTREGION_HICNTREGION1_DEFAULT   0x00000004UL
 
#define _AGC_HICNTREGION_HICNTREGION1_MASK   0xF0UL
 
#define _AGC_HICNTREGION_HICNTREGION1_SHIFT   4
 
#define _AGC_HICNTREGION_HICNTREGION2_DEFAULT   0x00000005UL
 
#define _AGC_HICNTREGION_HICNTREGION2_MASK   0xFF00UL
 
#define _AGC_HICNTREGION_HICNTREGION2_SHIFT   8
 
#define _AGC_HICNTREGION_HICNTREGION3_DEFAULT   0x00000006UL
 
#define _AGC_HICNTREGION_HICNTREGION3_MASK   0xFF0000UL
 
#define _AGC_HICNTREGION_HICNTREGION3_SHIFT   16
 
#define _AGC_HICNTREGION_HICNTREGION4_DEFAULT   0x00000008UL
 
#define _AGC_HICNTREGION_HICNTREGION4_MASK   0xFF000000UL
 
#define _AGC_HICNTREGION_HICNTREGION4_SHIFT   24
 
#define _AGC_HICNTREGION_MASK   0xFFFFFFFFUL
 
#define _AGC_HICNTREGION_RESETVALUE   0x08060543UL
 
#define _AGC_IEN_CCA_DEFAULT   0x00000000UL
 
#define _AGC_IEN_CCA_MASK   0x4UL
 
#define _AGC_IEN_CCA_SHIFT   2
 
#define _AGC_IEN_MASK   0x0000007DUL
 
#define _AGC_IEN_RESETVALUE   0x00000000UL
 
#define _AGC_IEN_RSSINEGSTEP_DEFAULT   0x00000000UL
 
#define _AGC_IEN_RSSINEGSTEP_MASK   0x10UL
 
#define _AGC_IEN_RSSINEGSTEP_SHIFT   4
 
#define _AGC_IEN_RSSIPOSSTEP_DEFAULT   0x00000000UL
 
#define _AGC_IEN_RSSIPOSSTEP_MASK   0x8UL
 
#define _AGC_IEN_RSSIPOSSTEP_SHIFT   3
 
#define _AGC_IEN_RSSIVALID_DEFAULT   0x00000000UL
 
#define _AGC_IEN_RSSIVALID_MASK   0x1UL
 
#define _AGC_IEN_RSSIVALID_SHIFT   0
 
#define _AGC_IEN_SHORTRSSIPOSSTEP_DEFAULT   0x00000000UL
 
#define _AGC_IEN_SHORTRSSIPOSSTEP_MASK   0x40UL
 
#define _AGC_IEN_SHORTRSSIPOSSTEP_SHIFT   6
 
#define _AGC_IF_CCA_DEFAULT   0x00000000UL
 
#define _AGC_IF_CCA_MASK   0x4UL
 
#define _AGC_IF_CCA_SHIFT   2
 
#define _AGC_IF_MASK   0x0000007DUL
 
#define _AGC_IF_RESETVALUE   0x00000000UL
 
#define _AGC_IF_RSSINEGSTEP_DEFAULT   0x00000000UL
 
#define _AGC_IF_RSSINEGSTEP_MASK   0x10UL
 
#define _AGC_IF_RSSINEGSTEP_SHIFT   4
 
#define _AGC_IF_RSSIPOSSTEP_DEFAULT   0x00000000UL
 
#define _AGC_IF_RSSIPOSSTEP_MASK   0x8UL
 
#define _AGC_IF_RSSIPOSSTEP_SHIFT   3
 
#define _AGC_IF_RSSIVALID_DEFAULT   0x00000000UL
 
#define _AGC_IF_RSSIVALID_MASK   0x1UL
 
#define _AGC_IF_RSSIVALID_SHIFT   0
 
#define _AGC_IF_SHORTRSSIPOSSTEP_DEFAULT   0x00000000UL
 
#define _AGC_IF_SHORTRSSIPOSSTEP_MASK   0x40UL
 
#define _AGC_IF_SHORTRSSIPOSSTEP_SHIFT   6
 
#define _AGC_IPVERSION_IPVERSION_DEFAULT   0x00000000UL
 
#define _AGC_IPVERSION_IPVERSION_MASK   0xFFFFFFFFUL
 
#define _AGC_IPVERSION_IPVERSION_SHIFT   0
 
#define _AGC_IPVERSION_MASK   0xFFFFFFFFUL
 
#define _AGC_IPVERSION_RESETVALUE   0x00000000UL
 
#define _AGC_LBT_CCARSSIPERIOD_DEFAULT   0x00000000UL
 
#define _AGC_LBT_CCARSSIPERIOD_MASK   0xFUL
 
#define _AGC_LBT_CCARSSIPERIOD_SHIFT   0
 
#define _AGC_LBT_ENCCAGAINREDUCED_DEFAULT   0x00000000UL
 
#define _AGC_LBT_ENCCAGAINREDUCED_MASK   0x20UL
 
#define _AGC_LBT_ENCCAGAINREDUCED_SHIFT   5
 
#define _AGC_LBT_ENCCARSSIMAX_DEFAULT   0x00000000UL
 
#define _AGC_LBT_ENCCARSSIMAX_MASK   0x40UL
 
#define _AGC_LBT_ENCCARSSIMAX_SHIFT   6
 
#define _AGC_LBT_ENCCARSSIPERIOD_DEFAULT   0x00000000UL
 
#define _AGC_LBT_ENCCARSSIPERIOD_MASK   0x10UL
 
#define _AGC_LBT_ENCCARSSIPERIOD_SHIFT   4
 
#define _AGC_LBT_MASK   0x0000007FUL
 
#define _AGC_LBT_RESETVALUE   0x00000000UL
 
#define _AGC_LNAMIXCODE0_LNAMIXSLICE1_DEFAULT   0x0000003DUL
 
#define _AGC_LNAMIXCODE0_LNAMIXSLICE1_MASK   0x3FUL
 
#define _AGC_LNAMIXCODE0_LNAMIXSLICE1_SHIFT   0
 
#define _AGC_LNAMIXCODE0_LNAMIXSLICE2_DEFAULT   0x0000002EUL
 
#define _AGC_LNAMIXCODE0_LNAMIXSLICE2_MASK   0xFC0UL
 
#define _AGC_LNAMIXCODE0_LNAMIXSLICE2_SHIFT   6
 
#define _AGC_LNAMIXCODE0_LNAMIXSLICE3_DEFAULT   0x00000024UL
 
#define _AGC_LNAMIXCODE0_LNAMIXSLICE3_MASK   0x3F000UL
 
#define _AGC_LNAMIXCODE0_LNAMIXSLICE3_SHIFT   12
 
#define _AGC_LNAMIXCODE0_LNAMIXSLICE4_DEFAULT   0x0000001CUL
 
#define _AGC_LNAMIXCODE0_LNAMIXSLICE4_MASK   0xFC0000UL
 
#define _AGC_LNAMIXCODE0_LNAMIXSLICE4_SHIFT   18
 
#define _AGC_LNAMIXCODE0_LNAMIXSLICE5_DEFAULT   0x00000015UL
 
#define _AGC_LNAMIXCODE0_LNAMIXSLICE5_MASK   0x3F000000UL
 
#define _AGC_LNAMIXCODE0_LNAMIXSLICE5_SHIFT   24
 
#define _AGC_LNAMIXCODE0_MASK   0x3FFFFFFFUL
 
#define _AGC_LNAMIXCODE0_RESETVALUE   0x15724BBDUL
 
#define _AGC_LNAMIXCODE1_LNAMIXSLICE10_DEFAULT   0x00000005UL
 
#define _AGC_LNAMIXCODE1_LNAMIXSLICE10_MASK   0x3F000000UL
 
#define _AGC_LNAMIXCODE1_LNAMIXSLICE10_SHIFT   24
 
#define _AGC_LNAMIXCODE1_LNAMIXSLICE6_DEFAULT   0x00000011UL
 
#define _AGC_LNAMIXCODE1_LNAMIXSLICE6_MASK   0x3FUL
 
#define _AGC_LNAMIXCODE1_LNAMIXSLICE6_SHIFT   0
 
#define _AGC_LNAMIXCODE1_LNAMIXSLICE7_DEFAULT   0x0000000CUL
 
#define _AGC_LNAMIXCODE1_LNAMIXSLICE7_MASK   0xFC0UL
 
#define _AGC_LNAMIXCODE1_LNAMIXSLICE7_SHIFT   6
 
#define _AGC_LNAMIXCODE1_LNAMIXSLICE8_DEFAULT   0x0000000AUL
 
#define _AGC_LNAMIXCODE1_LNAMIXSLICE8_MASK   0x3F000UL
 
#define _AGC_LNAMIXCODE1_LNAMIXSLICE8_SHIFT   12
 
#define _AGC_LNAMIXCODE1_LNAMIXSLICE9_DEFAULT   0x00000006UL
 
#define _AGC_LNAMIXCODE1_LNAMIXSLICE9_MASK   0xFC0000UL
 
#define _AGC_LNAMIXCODE1_LNAMIXSLICE9_SHIFT   18
 
#define _AGC_LNAMIXCODE1_MASK   0x3FFFFFFFUL
 
#define _AGC_LNAMIXCODE1_RESETVALUE   0x0518A311UL
 
#define _AGC_MIRRORIF_IFMIRRORCLEAR_DEFAULT   0x00000000UL
 
#define _AGC_MIRRORIF_IFMIRRORCLEAR_MASK   0x8UL
 
#define _AGC_MIRRORIF_IFMIRRORCLEAR_SHIFT   3
 
#define _AGC_MIRRORIF_MASK   0x0000000FUL
 
#define _AGC_MIRRORIF_RESETVALUE   0x00000000UL
 
#define _AGC_MIRRORIF_RSSINEGSTEPM_DEFAULT   0x00000000UL
 
#define _AGC_MIRRORIF_RSSINEGSTEPM_MASK   0x2UL
 
#define _AGC_MIRRORIF_RSSINEGSTEPM_SHIFT   1
 
#define _AGC_MIRRORIF_RSSIPOSSTEPM_DEFAULT   0x00000000UL
 
#define _AGC_MIRRORIF_RSSIPOSSTEPM_MASK   0x1UL
 
#define _AGC_MIRRORIF_RSSIPOSSTEPM_SHIFT   0
 
#define _AGC_MIRRORIF_SHORTRSSIPOSSTEPM_DEFAULT   0x00000000UL
 
#define _AGC_MIRRORIF_SHORTRSSIPOSSTEPM_MASK   0x4UL
 
#define _AGC_MIRRORIF_SHORTRSSIPOSSTEPM_SHIFT   2
 
#define _AGC_PGACODE0_MASK   0xFFFFFFFFUL
 
#define _AGC_PGACODE0_PGAGAIN1_DEFAULT   0x00000000UL
 
#define _AGC_PGACODE0_PGAGAIN1_MASK   0xFUL
 
#define _AGC_PGACODE0_PGAGAIN1_SHIFT   0
 
#define _AGC_PGACODE0_PGAGAIN2_DEFAULT   0x00000001UL
 
#define _AGC_PGACODE0_PGAGAIN2_MASK   0xF0UL
 
#define _AGC_PGACODE0_PGAGAIN2_SHIFT   4
 
#define _AGC_PGACODE0_PGAGAIN3_DEFAULT   0x00000002UL
 
#define _AGC_PGACODE0_PGAGAIN3_MASK   0xF00UL
 
#define _AGC_PGACODE0_PGAGAIN3_SHIFT   8
 
#define _AGC_PGACODE0_PGAGAIN4_DEFAULT   0x00000003UL
 
#define _AGC_PGACODE0_PGAGAIN4_MASK   0xF000UL
 
#define _AGC_PGACODE0_PGAGAIN4_SHIFT   12
 
#define _AGC_PGACODE0_PGAGAIN5_DEFAULT   0x00000004UL
 
#define _AGC_PGACODE0_PGAGAIN5_MASK   0xF0000UL
 
#define _AGC_PGACODE0_PGAGAIN5_SHIFT   16
 
#define _AGC_PGACODE0_PGAGAIN6_DEFAULT   0x00000005UL
 
#define _AGC_PGACODE0_PGAGAIN6_MASK   0xF00000UL
 
#define _AGC_PGACODE0_PGAGAIN6_SHIFT   20
 
#define _AGC_PGACODE0_PGAGAIN7_DEFAULT   0x00000006UL
 
#define _AGC_PGACODE0_PGAGAIN7_MASK   0xF000000UL
 
#define _AGC_PGACODE0_PGAGAIN7_SHIFT   24
 
#define _AGC_PGACODE0_PGAGAIN8_DEFAULT   0x00000007UL
 
#define _AGC_PGACODE0_PGAGAIN8_MASK   0xF0000000UL
 
#define _AGC_PGACODE0_PGAGAIN8_SHIFT   28
 
#define _AGC_PGACODE0_RESETVALUE   0x76543210UL
 
#define _AGC_PGACODE1_MASK   0x00000FFFUL
 
#define _AGC_PGACODE1_PGAGAIN10_DEFAULT   0x00000009UL
 
#define _AGC_PGACODE1_PGAGAIN10_MASK   0xF0UL
 
#define _AGC_PGACODE1_PGAGAIN10_SHIFT   4
 
#define _AGC_PGACODE1_PGAGAIN11_DEFAULT   0x0000000AUL
 
#define _AGC_PGACODE1_PGAGAIN11_MASK   0xF00UL
 
#define _AGC_PGACODE1_PGAGAIN11_SHIFT   8
 
#define _AGC_PGACODE1_PGAGAIN9_DEFAULT   0x00000008UL
 
#define _AGC_PGACODE1_PGAGAIN9_MASK   0xFUL
 
#define _AGC_PGACODE1_PGAGAIN9_SHIFT   0
 
#define _AGC_PGACODE1_RESETVALUE   0x00000A98UL
 
#define _AGC_PNRFATT0_LNAMIXRFATT1_DEFAULT   0x00000000UL
 
#define _AGC_PNRFATT0_LNAMIXRFATT1_MASK   0x3FUL
 
#define _AGC_PNRFATT0_LNAMIXRFATT1_SHIFT   0
 
#define _AGC_PNRFATT0_LNAMIXRFATT2_DEFAULT   0x00000001UL
 
#define _AGC_PNRFATT0_LNAMIXRFATT2_MASK   0xFC0UL
 
#define _AGC_PNRFATT0_LNAMIXRFATT2_SHIFT   6
 
#define _AGC_PNRFATT0_LNAMIXRFATT3_DEFAULT   0x00000002UL
 
#define _AGC_PNRFATT0_LNAMIXRFATT3_MASK   0x3F000UL
 
#define _AGC_PNRFATT0_LNAMIXRFATT3_SHIFT   12
 
#define _AGC_PNRFATT0_LNAMIXRFATT4_DEFAULT   0x00000004UL
 
#define _AGC_PNRFATT0_LNAMIXRFATT4_MASK   0xFC0000UL
 
#define _AGC_PNRFATT0_LNAMIXRFATT4_SHIFT   18
 
#define _AGC_PNRFATT0_LNAMIXRFATT5_DEFAULT   0x00000006UL
 
#define _AGC_PNRFATT0_LNAMIXRFATT5_MASK   0x3F000000UL
 
#define _AGC_PNRFATT0_LNAMIXRFATT5_SHIFT   24
 
#define _AGC_PNRFATT0_MASK   0x3FFFFFFFUL
 
#define _AGC_PNRFATT0_RESETVALUE   0x06102040UL
 
#define _AGC_PNRFATT1_LNAMIXRFATT10_DEFAULT   0x00000018UL
 
#define _AGC_PNRFATT1_LNAMIXRFATT10_MASK   0x3F000000UL
 
#define _AGC_PNRFATT1_LNAMIXRFATT10_SHIFT   24
 
#define _AGC_PNRFATT1_LNAMIXRFATT6_DEFAULT   0x00000008UL
 
#define _AGC_PNRFATT1_LNAMIXRFATT6_MASK   0x3FUL
 
#define _AGC_PNRFATT1_LNAMIXRFATT6_SHIFT   0
 
#define _AGC_PNRFATT1_LNAMIXRFATT7_DEFAULT   0x0000000BUL
 
#define _AGC_PNRFATT1_LNAMIXRFATT7_MASK   0xFC0UL
 
#define _AGC_PNRFATT1_LNAMIXRFATT7_SHIFT   6
 
#define _AGC_PNRFATT1_LNAMIXRFATT8_DEFAULT   0x0000000FUL
 
#define _AGC_PNRFATT1_LNAMIXRFATT8_MASK   0x3F000UL
 
#define _AGC_PNRFATT1_LNAMIXRFATT8_SHIFT   12
 
#define _AGC_PNRFATT1_LNAMIXRFATT9_DEFAULT   0x00000012UL
 
#define _AGC_PNRFATT1_LNAMIXRFATT9_MASK   0xFC0000UL
 
#define _AGC_PNRFATT1_LNAMIXRFATT9_SHIFT   18
 
#define _AGC_PNRFATT1_MASK   0x3FFFFFFFUL
 
#define _AGC_PNRFATT1_RESETVALUE   0x1848F2C8UL
 
#define _AGC_PNRFATT2_LNAMIXRFATT11_DEFAULT   0x0000001FUL
 
#define _AGC_PNRFATT2_LNAMIXRFATT11_MASK   0x3FUL
 
#define _AGC_PNRFATT2_LNAMIXRFATT11_SHIFT   0
 
#define _AGC_PNRFATT2_LNAMIXRFATT12_DEFAULT   0x00000020UL
 
#define _AGC_PNRFATT2_LNAMIXRFATT12_MASK   0xFC0UL
 
#define _AGC_PNRFATT2_LNAMIXRFATT12_SHIFT   6
 
#define _AGC_PNRFATT2_LNAMIXRFATT13_DEFAULT   0x0000002EUL
 
#define _AGC_PNRFATT2_LNAMIXRFATT13_MASK   0x3F000UL
 
#define _AGC_PNRFATT2_LNAMIXRFATT13_SHIFT   12
 
#define _AGC_PNRFATT2_LNAMIXRFATT14_DEFAULT   0x0000003DUL
 
#define _AGC_PNRFATT2_LNAMIXRFATT14_MASK   0xFC0000UL
 
#define _AGC_PNRFATT2_LNAMIXRFATT14_SHIFT   18
 
#define _AGC_PNRFATT2_MASK   0x00FFFFFFUL
 
#define _AGC_PNRFATT2_RESETVALUE   0x00F6E81FUL
 
#define _AGC_RSSI_MASK   0x0000FFC0UL
 
#define _AGC_RSSI_RESETVALUE   0x00008000UL
 
#define _AGC_RSSI_RSSIFRAC_DEFAULT   0x00000000UL
 
#define _AGC_RSSI_RSSIFRAC_MASK   0xC0UL
 
#define _AGC_RSSI_RSSIFRAC_SHIFT   6
 
#define _AGC_RSSI_RSSIINT_DEFAULT   0x00000080UL
 
#define _AGC_RSSI_RSSIINT_MASK   0xFF00UL
 
#define _AGC_RSSI_RSSIINT_SHIFT   8
 
#define _AGC_RSSISTEPTHR_DEMODRESTARTPER_DEFAULT   0x00000000UL
 
#define _AGC_RSSISTEPTHR_DEMODRESTARTPER_MASK   0x1E0000UL
 
#define _AGC_RSSISTEPTHR_DEMODRESTARTPER_SHIFT   17
 
#define _AGC_RSSISTEPTHR_DEMODRESTARTTHR_DEFAULT   0x00000000UL
 
#define _AGC_RSSISTEPTHR_DEMODRESTARTTHR_MASK   0x1FE00000UL
 
#define _AGC_RSSISTEPTHR_DEMODRESTARTTHR_SHIFT   21
 
#define _AGC_RSSISTEPTHR_MASK   0x3FFFFFFFUL
 
#define _AGC_RSSISTEPTHR_NEGSTEPTHR_DEFAULT   0x00000000UL
 
#define _AGC_RSSISTEPTHR_NEGSTEPTHR_MASK   0xFF00UL
 
#define _AGC_RSSISTEPTHR_NEGSTEPTHR_SHIFT   8
 
#define _AGC_RSSISTEPTHR_POSSTEPTHR_DEFAULT   0x00000000UL
 
#define _AGC_RSSISTEPTHR_POSSTEPTHR_MASK   0xFFUL
 
#define _AGC_RSSISTEPTHR_POSSTEPTHR_SHIFT   0
 
#define _AGC_RSSISTEPTHR_RESETVALUE   0x00000000UL
 
#define _AGC_RSSISTEPTHR_RSSIFAST_DEFAULT   0x00000000UL
 
#define _AGC_RSSISTEPTHR_RSSIFAST_MASK   0x20000000UL
 
#define _AGC_RSSISTEPTHR_RSSIFAST_SHIFT   29
 
#define _AGC_RSSISTEPTHR_STEPPER_DEFAULT   0x00000000UL
 
#define _AGC_RSSISTEPTHR_STEPPER_MASK   0x10000UL
 
#define _AGC_RSSISTEPTHR_STEPPER_SHIFT   16
 
#define _AGC_STATUS0_ADCINDEX_DEFAULT   0x00000000UL
 
#define _AGC_STATUS0_ADCINDEX_MASK   0x1800000UL
 
#define _AGC_STATUS0_ADCINDEX_SHIFT   23
 
#define _AGC_STATUS0_CCA_DEFAULT   0x00000000UL
 
#define _AGC_STATUS0_CCA_MASK   0x200UL
 
#define _AGC_STATUS0_CCA_SHIFT   9
 
#define _AGC_STATUS0_GAININDEX_DEFAULT   0x00000000UL
 
#define _AGC_STATUS0_GAININDEX_MASK   0x3FUL
 
#define _AGC_STATUS0_GAININDEX_SHIFT   0
 
#define _AGC_STATUS0_GAINOK_DEFAULT   0x00000000UL
 
#define _AGC_STATUS0_GAINOK_MASK   0x400UL
 
#define _AGC_STATUS0_GAINOK_SHIFT   10
 
#define _AGC_STATUS0_IFPKDHILAT_DEFAULT   0x00000000UL
 
#define _AGC_STATUS0_IFPKDHILAT_MASK   0x100UL
 
#define _AGC_STATUS0_IFPKDHILAT_SHIFT   8
 
#define _AGC_STATUS0_IFPKDLOLAT_DEFAULT   0x00000000UL
 
#define _AGC_STATUS0_IFPKDLOLAT_MASK   0x80UL
 
#define _AGC_STATUS0_IFPKDLOLAT_SHIFT   7
 
#define _AGC_STATUS0_LNAINDEX_DEFAULT   0x00000000UL
 
#define _AGC_STATUS0_LNAINDEX_MASK   0x78000UL
 
#define _AGC_STATUS0_LNAINDEX_SHIFT   15
 
#define _AGC_STATUS0_MASK   0x01FFFFFFUL
 
#define _AGC_STATUS0_PGAINDEX_DEFAULT   0x00000000UL
 
#define _AGC_STATUS0_PGAINDEX_MASK   0x7800UL
 
#define _AGC_STATUS0_PGAINDEX_SHIFT   11
 
#define _AGC_STATUS0_PNINDEX_DEFAULT   0x00000000UL
 
#define _AGC_STATUS0_PNINDEX_MASK   0x780000UL
 
#define _AGC_STATUS0_PNINDEX_SHIFT   19
 
#define _AGC_STATUS0_RESETVALUE   0x00000000UL
 
#define _AGC_STATUS0_RFPKDLAT_DEFAULT   0x00000000UL
 
#define _AGC_STATUS0_RFPKDLAT_MASK   0x40UL
 
#define _AGC_STATUS0_RFPKDLAT_SHIFT   6
 
#define _AGC_STEPDWN_MASK   0x0003FFFFUL
 
#define _AGC_STEPDWN_RESETVALUE   0x00036D11UL
 
#define _AGC_STEPDWN_STEPDWN0_DEFAULT   0x00000001UL
 
#define _AGC_STEPDWN_STEPDWN0_MASK   0x7UL
 
#define _AGC_STEPDWN_STEPDWN0_SHIFT   0
 
#define _AGC_STEPDWN_STEPDWN1_DEFAULT   0x00000002UL
 
#define _AGC_STEPDWN_STEPDWN1_MASK   0x38UL
 
#define _AGC_STEPDWN_STEPDWN1_SHIFT   3
 
#define _AGC_STEPDWN_STEPDWN2_DEFAULT   0x00000004UL
 
#define _AGC_STEPDWN_STEPDWN2_MASK   0x1C0UL
 
#define _AGC_STEPDWN_STEPDWN2_SHIFT   6
 
#define _AGC_STEPDWN_STEPDWN3_DEFAULT   0x00000006UL
 
#define _AGC_STEPDWN_STEPDWN3_MASK   0xE00UL
 
#define _AGC_STEPDWN_STEPDWN3_SHIFT   9
 
#define _AGC_STEPDWN_STEPDWN4_DEFAULT   0x00000006UL
 
#define _AGC_STEPDWN_STEPDWN4_MASK   0x7000UL
 
#define _AGC_STEPDWN_STEPDWN4_SHIFT   12
 
#define _AGC_STEPDWN_STEPDWN5_DEFAULT   0x00000006UL
 
#define _AGC_STEPDWN_STEPDWN5_MASK   0x38000UL
 
#define _AGC_STEPDWN_STEPDWN5_SHIFT   15
 
#define AGC_AGCPERIOD_MAXHICNTTHD_DEFAULT   (_AGC_AGCPERIOD_MAXHICNTTHD_DEFAULT << 16)
 
#define AGC_AGCPERIOD_PERIODHI_DEFAULT   (_AGC_AGCPERIOD_PERIODHI_DEFAULT << 0)
 
#define AGC_AGCPERIOD_PERIODLO_DEFAULT   (_AGC_AGCPERIOD_PERIODLO_DEFAULT << 8)
 
#define AGC_AGCPERIOD_SETTLETIMEIF_DEFAULT   (_AGC_AGCPERIOD_SETTLETIMEIF_DEFAULT << 24)
 
#define AGC_AGCPERIOD_SETTLETIMERF_DEFAULT   (_AGC_AGCPERIOD_SETTLETIMERF_DEFAULT << 28)
 
#define AGC_CTRL0_ADCATTENCODE_DEFAULT   (_AGC_CTRL0_ADCATTENCODE_DEFAULT << 25)
 
#define AGC_CTRL0_ADCATTENMODE   (0x1UL << 23)
 
#define AGC_CTRL0_ADCATTENMODE_DEFAULT   (_AGC_CTRL0_ADCATTENMODE_DEFAULT << 23)
 
#define AGC_CTRL0_ADCATTENMODE_DISABLE   (_AGC_CTRL0_ADCATTENMODE_DISABLE << 23)
 
#define AGC_CTRL0_ADCATTENMODE_NOTMAXGAIN   (_AGC_CTRL0_ADCATTENMODE_NOTMAXGAIN << 23)
 
#define AGC_CTRL0_AGCCLKUNDIVREQ   (0x1UL << 21)
 
#define AGC_CTRL0_AGCCLKUNDIVREQ_DEFAULT   (_AGC_CTRL0_AGCCLKUNDIVREQ_DEFAULT << 21)
 
#define AGC_CTRL0_AGCRST   (0x1UL << 31)
 
#define AGC_CTRL0_AGCRST_DEFAULT   (_AGC_CTRL0_AGCRST_DEFAULT << 31)
 
#define AGC_CTRL0_DISCFLOOPADJ   (0x1UL << 19)
 
#define AGC_CTRL0_DISCFLOOPADJ_DEFAULT   (_AGC_CTRL0_DISCFLOOPADJ_DEFAULT << 19)
 
#define AGC_CTRL0_DISPNDWNCOMP   (0x1UL << 30)
 
#define AGC_CTRL0_DISPNDWNCOMP_DEFAULT   (_AGC_CTRL0_DISPNDWNCOMP_DEFAULT << 30)
 
#define AGC_CTRL0_DISPNGAINUP   (0x1UL << 29)
 
#define AGC_CTRL0_DISPNGAINUP_DEFAULT   (_AGC_CTRL0_DISPNGAINUP_DEFAULT << 29)
 
#define AGC_CTRL0_DISRESETCHPWR   (0x1UL << 22)
 
#define AGC_CTRL0_DISRESETCHPWR_DEFAULT   (_AGC_CTRL0_DISRESETCHPWR_DEFAULT << 22)
 
#define AGC_CTRL0_DSADISCFLOOP   (0x1UL << 28)
 
#define AGC_CTRL0_DSADISCFLOOP_DEFAULT   (_AGC_CTRL0_DSADISCFLOOP_DEFAULT << 28)
 
#define AGC_CTRL0_ENRSSIRESET   (0x1UL << 27)
 
#define AGC_CTRL0_ENRSSIRESET_DEFAULT   (_AGC_CTRL0_ENRSSIRESET_DEFAULT << 27)
 
#define AGC_CTRL0_MODE_CONT   (_AGC_CTRL0_MODE_CONT << 8)
 
#define AGC_CTRL0_MODE_DEFAULT   (_AGC_CTRL0_MODE_DEFAULT << 8)
 
#define AGC_CTRL0_MODE_LOCKDSA   (_AGC_CTRL0_MODE_LOCKDSA << 8)
 
#define AGC_CTRL0_MODE_LOCKFRAMEDET   (_AGC_CTRL0_MODE_LOCKFRAMEDET << 8)
 
#define AGC_CTRL0_MODE_LOCKPREDET   (_AGC_CTRL0_MODE_LOCKPREDET << 8)
 
#define AGC_CTRL0_PWRTARGET_DEFAULT   (_AGC_CTRL0_PWRTARGET_DEFAULT << 0)
 
#define AGC_CTRL0_RSSISHIFT_DEFAULT   (_AGC_CTRL0_RSSISHIFT_DEFAULT << 11)
 
#define AGC_CTRL1_CCATHRSH_DEFAULT   (_AGC_CTRL1_CCATHRSH_DEFAULT << 0)
 
#define AGC_CTRL1_PWRPERIOD_DEFAULT   (_AGC_CTRL1_PWRPERIOD_DEFAULT << 12)
 
#define AGC_CTRL1_RSSIPERIOD_DEFAULT   (_AGC_CTRL1_RSSIPERIOD_DEFAULT << 8)
 
#define AGC_CTRL1_SUBDEN_DEFAULT   (_AGC_CTRL1_SUBDEN_DEFAULT << 21)
 
#define AGC_CTRL1_SUBINT_DEFAULT   (_AGC_CTRL1_SUBINT_DEFAULT << 26)
 
#define AGC_CTRL1_SUBNUM_DEFAULT   (_AGC_CTRL1_SUBNUM_DEFAULT << 16)
 
#define AGC_CTRL1_SUBPERIOD   (0x1UL << 15)
 
#define AGC_CTRL1_SUBPERIOD_DEFAULT   (_AGC_CTRL1_SUBPERIOD_DEFAULT << 15)
 
#define AGC_CTRL2_DISRFPKD   (0x1UL << 31)
 
#define AGC_CTRL2_DISRFPKD_DEFAULT   (_AGC_CTRL2_DISRFPKD_DEFAULT << 31)
 
#define AGC_CTRL2_DMASEL   (0x1UL << 0)
 
#define AGC_CTRL2_DMASEL_DEFAULT   (_AGC_CTRL2_DMASEL_DEFAULT << 0)
 
#define AGC_CTRL2_DMASEL_GAIN   (_AGC_CTRL2_DMASEL_GAIN << 0)
 
#define AGC_CTRL2_DMASEL_RSSI   (_AGC_CTRL2_DMASEL_RSSI << 0)
 
#define AGC_CTRL2_PRSDEBUGEN   (0x1UL << 30)
 
#define AGC_CTRL2_PRSDEBUGEN_DEFAULT   (_AGC_CTRL2_PRSDEBUGEN_DEFAULT << 30)
 
#define AGC_CTRL2_REHICNTTHD_DEFAULT   (_AGC_CTRL2_REHICNTTHD_DEFAULT << 5)
 
#define AGC_CTRL2_RELBYCHPWR_DEFAULT   (_AGC_CTRL2_RELBYCHPWR_DEFAULT << 16)
 
#define AGC_CTRL2_RELBYCHPWR_LO_CNT   (_AGC_CTRL2_RELBYCHPWR_LO_CNT << 16)
 
#define AGC_CTRL2_RELBYCHPWR_LO_CNT_AND_PWR   (_AGC_CTRL2_RELBYCHPWR_LO_CNT_AND_PWR << 16)
 
#define AGC_CTRL2_RELBYCHPWR_LO_CNT_PWR   (_AGC_CTRL2_RELBYCHPWR_LO_CNT_PWR << 16)
 
#define AGC_CTRL2_RELBYCHPWR_PWR   (_AGC_CTRL2_RELBYCHPWR_PWR << 16)
 
#define AGC_CTRL2_RELOTHD_DEFAULT   (_AGC_CTRL2_RELOTHD_DEFAULT << 13)
 
#define AGC_CTRL2_RELTARGETPWR_DEFAULT   (_AGC_CTRL2_RELTARGETPWR_DEFAULT << 18)
 
#define AGC_CTRL2_SAFEMODE   (0x1UL << 1)
 
#define AGC_CTRL2_SAFEMODE_DEFAULT   (_AGC_CTRL2_SAFEMODE_DEFAULT << 1)
 
#define AGC_CTRL2_SAFEMODETHD_DEFAULT   (_AGC_CTRL2_SAFEMODETHD_DEFAULT << 2)
 
#define AGC_CTRL3_IFPKDDEB   (0x1UL << 0)
 
#define AGC_CTRL3_IFPKDDEB_DEFAULT   (_AGC_CTRL3_IFPKDDEB_DEFAULT << 0)
 
#define AGC_CTRL3_IFPKDDEBPRD_DEFAULT   (_AGC_CTRL3_IFPKDDEBPRD_DEFAULT << 3)
 
#define AGC_CTRL3_IFPKDDEBRST_DEFAULT   (_AGC_CTRL3_IFPKDDEBRST_DEFAULT << 9)
 
#define AGC_CTRL3_IFPKDDEBTHD_DEFAULT   (_AGC_CTRL3_IFPKDDEBTHD_DEFAULT << 1)
 
#define AGC_CTRL3_RFPKDDEB   (0x1UL << 13)
 
#define AGC_CTRL3_RFPKDDEB_DEFAULT   (_AGC_CTRL3_RFPKDDEB_DEFAULT << 13)
 
#define AGC_CTRL3_RFPKDDEBPRD_DEFAULT   (_AGC_CTRL3_RFPKDDEBPRD_DEFAULT << 16)
 
#define AGC_CTRL3_RFPKDDEBRST_DEFAULT   (_AGC_CTRL3_RFPKDDEBRST_DEFAULT << 22)
 
#define AGC_CTRL3_RFPKDDEBTHD_DEFAULT   (_AGC_CTRL3_RFPKDDEBTHD_DEFAULT << 14)
 
#define AGC_EN_EN   (0x1UL << 0)
 
#define AGC_EN_EN_DEFAULT   (_AGC_EN_EN_DEFAULT << 0)
 
#define AGC_FRAMERSSI_FRAMERSSIFRAC_DEFAULT   (_AGC_FRAMERSSI_FRAMERSSIFRAC_DEFAULT << 6)
 
#define AGC_FRAMERSSI_FRAMERSSIINT_DEFAULT   (_AGC_FRAMERSSI_FRAMERSSIINT_DEFAULT << 8)
 
#define AGC_GAINRANGE_BOOSTLNA   (0x1UL << 26)
 
#define AGC_GAINRANGE_BOOSTLNA_DEFAULT   (_AGC_GAINRANGE_BOOSTLNA_DEFAULT << 26)
 
#define AGC_GAINRANGE_GAININCSTEP_DEFAULT   (_AGC_GAINRANGE_GAININCSTEP_DEFAULT << 8)
 
#define AGC_GAINRANGE_HIPWRTHD_DEFAULT   (_AGC_GAINRANGE_HIPWRTHD_DEFAULT << 20)
 
#define AGC_GAINRANGE_LATCHEDHISTEP_DEFAULT   (_AGC_GAINRANGE_LATCHEDHISTEP_DEFAULT << 16)
 
#define AGC_GAINRANGE_LNABWADJ   (0x1UL << 27)
 
#define AGC_GAINRANGE_LNABWADJ_DEFAULT   (_AGC_GAINRANGE_LNABWADJ_DEFAULT << 27)
 
#define AGC_GAINRANGE_LNAINDEXBORDER_DEFAULT   (_AGC_GAINRANGE_LNAINDEXBORDER_DEFAULT << 0)
 
#define AGC_GAINRANGE_PGAINDEXBORDER_DEFAULT   (_AGC_GAINRANGE_PGAINDEXBORDER_DEFAULT << 4)
 
#define AGC_GAINRANGE_PNGAINSTEP_DEFAULT   (_AGC_GAINRANGE_PNGAINSTEP_DEFAULT << 12)
 
#define AGC_GAINSTEPLIM_CFLOOPDEL_DEFAULT   (_AGC_GAINSTEPLIM_CFLOOPDEL_DEFAULT << 5)
 
#define AGC_GAINSTEPLIM_CFLOOPSTEPMAX_DEFAULT   (_AGC_GAINSTEPLIM_CFLOOPSTEPMAX_DEFAULT << 0)
 
#define AGC_GAINSTEPLIM_HYST_DEFAULT   (_AGC_GAINSTEPLIM_HYST_DEFAULT << 12)
 
#define AGC_GAINSTEPLIM_MAXPWRVAR_DEFAULT   (_AGC_GAINSTEPLIM_MAXPWRVAR_DEFAULT << 16)
 
#define AGC_GAINSTEPLIM_TRANRSTAGC   (0x1UL << 24)
 
#define AGC_GAINSTEPLIM_TRANRSTAGC_DEFAULT   (_AGC_GAINSTEPLIM_TRANRSTAGC_DEFAULT << 24)
 
#define AGC_HICNTREGION_HICNTREGION0_DEFAULT   (_AGC_HICNTREGION_HICNTREGION0_DEFAULT << 0)
 
#define AGC_HICNTREGION_HICNTREGION1_DEFAULT   (_AGC_HICNTREGION_HICNTREGION1_DEFAULT << 4)
 
#define AGC_HICNTREGION_HICNTREGION2_DEFAULT   (_AGC_HICNTREGION_HICNTREGION2_DEFAULT << 8)
 
#define AGC_HICNTREGION_HICNTREGION3_DEFAULT   (_AGC_HICNTREGION_HICNTREGION3_DEFAULT << 16)
 
#define AGC_HICNTREGION_HICNTREGION4_DEFAULT   (_AGC_HICNTREGION_HICNTREGION4_DEFAULT << 24)
 
#define AGC_IEN_CCA   (0x1UL << 2)
 
#define AGC_IEN_CCA_DEFAULT   (_AGC_IEN_CCA_DEFAULT << 2)
 
#define AGC_IEN_RSSINEGSTEP   (0x1UL << 4)
 
#define AGC_IEN_RSSINEGSTEP_DEFAULT   (_AGC_IEN_RSSINEGSTEP_DEFAULT << 4)
 
#define AGC_IEN_RSSIPOSSTEP   (0x1UL << 3)
 
#define AGC_IEN_RSSIPOSSTEP_DEFAULT   (_AGC_IEN_RSSIPOSSTEP_DEFAULT << 3)
 
#define AGC_IEN_RSSIVALID   (0x1UL << 0)
 
#define AGC_IEN_RSSIVALID_DEFAULT   (_AGC_IEN_RSSIVALID_DEFAULT << 0)
 
#define AGC_IEN_SHORTRSSIPOSSTEP   (0x1UL << 6)
 
#define AGC_IEN_SHORTRSSIPOSSTEP_DEFAULT   (_AGC_IEN_SHORTRSSIPOSSTEP_DEFAULT << 6)
 
#define AGC_IF_CCA   (0x1UL << 2)
 
#define AGC_IF_CCA_DEFAULT   (_AGC_IF_CCA_DEFAULT << 2)
 
#define AGC_IF_RSSINEGSTEP   (0x1UL << 4)
 
#define AGC_IF_RSSINEGSTEP_DEFAULT   (_AGC_IF_RSSINEGSTEP_DEFAULT << 4)
 
#define AGC_IF_RSSIPOSSTEP   (0x1UL << 3)
 
#define AGC_IF_RSSIPOSSTEP_DEFAULT   (_AGC_IF_RSSIPOSSTEP_DEFAULT << 3)
 
#define AGC_IF_RSSIVALID   (0x1UL << 0)
 
#define AGC_IF_RSSIVALID_DEFAULT   (_AGC_IF_RSSIVALID_DEFAULT << 0)
 
#define AGC_IF_SHORTRSSIPOSSTEP   (0x1UL << 6)
 
#define AGC_IF_SHORTRSSIPOSSTEP_DEFAULT   (_AGC_IF_SHORTRSSIPOSSTEP_DEFAULT << 6)
 
#define AGC_IPVERSION_IPVERSION_DEFAULT   (_AGC_IPVERSION_IPVERSION_DEFAULT << 0)
 
#define AGC_LBT_CCARSSIPERIOD_DEFAULT   (_AGC_LBT_CCARSSIPERIOD_DEFAULT << 0)
 
#define AGC_LBT_ENCCAGAINREDUCED   (0x1UL << 5)
 
#define AGC_LBT_ENCCAGAINREDUCED_DEFAULT   (_AGC_LBT_ENCCAGAINREDUCED_DEFAULT << 5)
 
#define AGC_LBT_ENCCARSSIMAX   (0x1UL << 6)
 
#define AGC_LBT_ENCCARSSIMAX_DEFAULT   (_AGC_LBT_ENCCARSSIMAX_DEFAULT << 6)
 
#define AGC_LBT_ENCCARSSIPERIOD   (0x1UL << 4)
 
#define AGC_LBT_ENCCARSSIPERIOD_DEFAULT   (_AGC_LBT_ENCCARSSIPERIOD_DEFAULT << 4)
 
#define AGC_LNAMIXCODE0_LNAMIXSLICE1_DEFAULT   (_AGC_LNAMIXCODE0_LNAMIXSLICE1_DEFAULT << 0)
 
#define AGC_LNAMIXCODE0_LNAMIXSLICE2_DEFAULT   (_AGC_LNAMIXCODE0_LNAMIXSLICE2_DEFAULT << 6)
 
#define AGC_LNAMIXCODE0_LNAMIXSLICE3_DEFAULT   (_AGC_LNAMIXCODE0_LNAMIXSLICE3_DEFAULT << 12)
 
#define AGC_LNAMIXCODE0_LNAMIXSLICE4_DEFAULT   (_AGC_LNAMIXCODE0_LNAMIXSLICE4_DEFAULT << 18)
 
#define AGC_LNAMIXCODE0_LNAMIXSLICE5_DEFAULT   (_AGC_LNAMIXCODE0_LNAMIXSLICE5_DEFAULT << 24)
 
#define AGC_LNAMIXCODE1_LNAMIXSLICE10_DEFAULT   (_AGC_LNAMIXCODE1_LNAMIXSLICE10_DEFAULT << 24)
 
#define AGC_LNAMIXCODE1_LNAMIXSLICE6_DEFAULT   (_AGC_LNAMIXCODE1_LNAMIXSLICE6_DEFAULT << 0)
 
#define AGC_LNAMIXCODE1_LNAMIXSLICE7_DEFAULT   (_AGC_LNAMIXCODE1_LNAMIXSLICE7_DEFAULT << 6)
 
#define AGC_LNAMIXCODE1_LNAMIXSLICE8_DEFAULT   (_AGC_LNAMIXCODE1_LNAMIXSLICE8_DEFAULT << 12)
 
#define AGC_LNAMIXCODE1_LNAMIXSLICE9_DEFAULT   (_AGC_LNAMIXCODE1_LNAMIXSLICE9_DEFAULT << 18)
 
#define AGC_MIRRORIF_IFMIRRORCLEAR   (0x1UL << 3)
 
#define AGC_MIRRORIF_IFMIRRORCLEAR_DEFAULT   (_AGC_MIRRORIF_IFMIRRORCLEAR_DEFAULT << 3)
 
#define AGC_MIRRORIF_RSSINEGSTEPM   (0x1UL << 1)
 
#define AGC_MIRRORIF_RSSINEGSTEPM_DEFAULT   (_AGC_MIRRORIF_RSSINEGSTEPM_DEFAULT << 1)
 
#define AGC_MIRRORIF_RSSIPOSSTEPM   (0x1UL << 0)
 
#define AGC_MIRRORIF_RSSIPOSSTEPM_DEFAULT   (_AGC_MIRRORIF_RSSIPOSSTEPM_DEFAULT << 0)
 
#define AGC_MIRRORIF_SHORTRSSIPOSSTEPM   (0x1UL << 2)
 
#define AGC_MIRRORIF_SHORTRSSIPOSSTEPM_DEFAULT   (_AGC_MIRRORIF_SHORTRSSIPOSSTEPM_DEFAULT << 2)
 
#define AGC_PGACODE0_PGAGAIN1_DEFAULT   (_AGC_PGACODE0_PGAGAIN1_DEFAULT << 0)
 
#define AGC_PGACODE0_PGAGAIN2_DEFAULT   (_AGC_PGACODE0_PGAGAIN2_DEFAULT << 4)
 
#define AGC_PGACODE0_PGAGAIN3_DEFAULT   (_AGC_PGACODE0_PGAGAIN3_DEFAULT << 8)
 
#define AGC_PGACODE0_PGAGAIN4_DEFAULT   (_AGC_PGACODE0_PGAGAIN4_DEFAULT << 12)
 
#define AGC_PGACODE0_PGAGAIN5_DEFAULT   (_AGC_PGACODE0_PGAGAIN5_DEFAULT << 16)
 
#define AGC_PGACODE0_PGAGAIN6_DEFAULT   (_AGC_PGACODE0_PGAGAIN6_DEFAULT << 20)
 
#define AGC_PGACODE0_PGAGAIN7_DEFAULT   (_AGC_PGACODE0_PGAGAIN7_DEFAULT << 24)
 
#define AGC_PGACODE0_PGAGAIN8_DEFAULT   (_AGC_PGACODE0_PGAGAIN8_DEFAULT << 28)
 
#define AGC_PGACODE1_PGAGAIN10_DEFAULT   (_AGC_PGACODE1_PGAGAIN10_DEFAULT << 4)
 
#define AGC_PGACODE1_PGAGAIN11_DEFAULT   (_AGC_PGACODE1_PGAGAIN11_DEFAULT << 8)
 
#define AGC_PGACODE1_PGAGAIN9_DEFAULT   (_AGC_PGACODE1_PGAGAIN9_DEFAULT << 0)
 
#define AGC_PNRFATT0_LNAMIXRFATT1_DEFAULT   (_AGC_PNRFATT0_LNAMIXRFATT1_DEFAULT << 0)
 
#define AGC_PNRFATT0_LNAMIXRFATT2_DEFAULT   (_AGC_PNRFATT0_LNAMIXRFATT2_DEFAULT << 6)
 
#define AGC_PNRFATT0_LNAMIXRFATT3_DEFAULT   (_AGC_PNRFATT0_LNAMIXRFATT3_DEFAULT << 12)
 
#define AGC_PNRFATT0_LNAMIXRFATT4_DEFAULT   (_AGC_PNRFATT0_LNAMIXRFATT4_DEFAULT << 18)
 
#define AGC_PNRFATT0_LNAMIXRFATT5_DEFAULT   (_AGC_PNRFATT0_LNAMIXRFATT5_DEFAULT << 24)
 
#define AGC_PNRFATT1_LNAMIXRFATT10_DEFAULT   (_AGC_PNRFATT1_LNAMIXRFATT10_DEFAULT << 24)
 
#define AGC_PNRFATT1_LNAMIXRFATT6_DEFAULT   (_AGC_PNRFATT1_LNAMIXRFATT6_DEFAULT << 0)
 
#define AGC_PNRFATT1_LNAMIXRFATT7_DEFAULT   (_AGC_PNRFATT1_LNAMIXRFATT7_DEFAULT << 6)
 
#define AGC_PNRFATT1_LNAMIXRFATT8_DEFAULT   (_AGC_PNRFATT1_LNAMIXRFATT8_DEFAULT << 12)
 
#define AGC_PNRFATT1_LNAMIXRFATT9_DEFAULT   (_AGC_PNRFATT1_LNAMIXRFATT9_DEFAULT << 18)
 
#define AGC_PNRFATT2_LNAMIXRFATT11_DEFAULT   (_AGC_PNRFATT2_LNAMIXRFATT11_DEFAULT << 0)
 
#define AGC_PNRFATT2_LNAMIXRFATT12_DEFAULT   (_AGC_PNRFATT2_LNAMIXRFATT12_DEFAULT << 6)
 
#define AGC_PNRFATT2_LNAMIXRFATT13_DEFAULT   (_AGC_PNRFATT2_LNAMIXRFATT13_DEFAULT << 12)
 
#define AGC_PNRFATT2_LNAMIXRFATT14_DEFAULT   (_AGC_PNRFATT2_LNAMIXRFATT14_DEFAULT << 18)
 
#define AGC_RSSI_RSSIFRAC_DEFAULT   (_AGC_RSSI_RSSIFRAC_DEFAULT << 6)
 
#define AGC_RSSI_RSSIINT_DEFAULT   (_AGC_RSSI_RSSIINT_DEFAULT << 8)
 
#define AGC_RSSISTEPTHR_DEMODRESTARTPER_DEFAULT   (_AGC_RSSISTEPTHR_DEMODRESTARTPER_DEFAULT << 17)
 
#define AGC_RSSISTEPTHR_DEMODRESTARTTHR_DEFAULT   (_AGC_RSSISTEPTHR_DEMODRESTARTTHR_DEFAULT << 21)
 
#define AGC_RSSISTEPTHR_NEGSTEPTHR_DEFAULT   (_AGC_RSSISTEPTHR_NEGSTEPTHR_DEFAULT << 8)
 
#define AGC_RSSISTEPTHR_POSSTEPTHR_DEFAULT   (_AGC_RSSISTEPTHR_POSSTEPTHR_DEFAULT << 0)
 
#define AGC_RSSISTEPTHR_RSSIFAST   (0x1UL << 29)
 
#define AGC_RSSISTEPTHR_RSSIFAST_DEFAULT   (_AGC_RSSISTEPTHR_RSSIFAST_DEFAULT << 29)
 
#define AGC_RSSISTEPTHR_STEPPER   (0x1UL << 16)
 
#define AGC_RSSISTEPTHR_STEPPER_DEFAULT   (_AGC_RSSISTEPTHR_STEPPER_DEFAULT << 16)
 
#define AGC_STATUS0_ADCINDEX_DEFAULT   (_AGC_STATUS0_ADCINDEX_DEFAULT << 23)
 
#define AGC_STATUS0_CCA   (0x1UL << 9)
 
#define AGC_STATUS0_CCA_DEFAULT   (_AGC_STATUS0_CCA_DEFAULT << 9)
 
#define AGC_STATUS0_GAININDEX_DEFAULT   (_AGC_STATUS0_GAININDEX_DEFAULT << 0)
 
#define AGC_STATUS0_GAINOK   (0x1UL << 10)
 
#define AGC_STATUS0_GAINOK_DEFAULT   (_AGC_STATUS0_GAINOK_DEFAULT << 10)
 
#define AGC_STATUS0_IFPKDHILAT   (0x1UL << 8)
 
#define AGC_STATUS0_IFPKDHILAT_DEFAULT   (_AGC_STATUS0_IFPKDHILAT_DEFAULT << 8)
 
#define AGC_STATUS0_IFPKDLOLAT   (0x1UL << 7)
 
#define AGC_STATUS0_IFPKDLOLAT_DEFAULT   (_AGC_STATUS0_IFPKDLOLAT_DEFAULT << 7)
 
#define AGC_STATUS0_LNAINDEX_DEFAULT   (_AGC_STATUS0_LNAINDEX_DEFAULT << 15)
 
#define AGC_STATUS0_PGAINDEX_DEFAULT   (_AGC_STATUS0_PGAINDEX_DEFAULT << 11)
 
#define AGC_STATUS0_PNINDEX_DEFAULT   (_AGC_STATUS0_PNINDEX_DEFAULT << 19)
 
#define AGC_STATUS0_RFPKDLAT   (0x1UL << 6)
 
#define AGC_STATUS0_RFPKDLAT_DEFAULT   (_AGC_STATUS0_RFPKDLAT_DEFAULT << 6)
 
#define AGC_STEPDWN_STEPDWN0_DEFAULT   (_AGC_STEPDWN_STEPDWN0_DEFAULT << 0)
 
#define AGC_STEPDWN_STEPDWN1_DEFAULT   (_AGC_STEPDWN_STEPDWN1_DEFAULT << 3)
 
#define AGC_STEPDWN_STEPDWN2_DEFAULT   (_AGC_STEPDWN_STEPDWN2_DEFAULT << 6)
 
#define AGC_STEPDWN_STEPDWN3_DEFAULT   (_AGC_STEPDWN_STEPDWN3_DEFAULT << 9)
 
#define AGC_STEPDWN_STEPDWN4_DEFAULT   (_AGC_STEPDWN_STEPDWN4_DEFAULT << 12)
 
#define AGC_STEPDWN_STEPDWN5_DEFAULT   (_AGC_STEPDWN_STEPDWN5_DEFAULT << 15)
 

Macro Definition Documentation

#define _AGC_AGCPERIOD_MASK   0xFFFFFFFFUL

Mask for AGC_AGCPERIOD

Definition at line 614 of file efr32bg21_agc.h.

#define _AGC_AGCPERIOD_MAXHICNTTHD_DEFAULT   0x00000007UL

Mode DEFAULT for AGC_AGCPERIOD

Definition at line 625 of file efr32bg21_agc.h.

#define _AGC_AGCPERIOD_MAXHICNTTHD_MASK   0xFF0000UL

Bit mask for AGC_MAXHICNTTHD

Definition at line 624 of file efr32bg21_agc.h.

#define _AGC_AGCPERIOD_MAXHICNTTHD_SHIFT   16

Shift value for AGC_MAXHICNTTHD

Definition at line 623 of file efr32bg21_agc.h.

#define _AGC_AGCPERIOD_PERIODHI_DEFAULT   0x0000000EUL

Mode DEFAULT for AGC_AGCPERIOD

Definition at line 617 of file efr32bg21_agc.h.

#define _AGC_AGCPERIOD_PERIODHI_MASK   0xFFUL

Bit mask for AGC_PERIODHI

Definition at line 616 of file efr32bg21_agc.h.

#define _AGC_AGCPERIOD_PERIODHI_SHIFT   0

Shift value for AGC_PERIODHI

Definition at line 615 of file efr32bg21_agc.h.

#define _AGC_AGCPERIOD_PERIODLO_DEFAULT   0x00000037UL

Mode DEFAULT for AGC_AGCPERIOD

Definition at line 621 of file efr32bg21_agc.h.

#define _AGC_AGCPERIOD_PERIODLO_MASK   0xFF00UL

Bit mask for AGC_PERIODLO

Definition at line 620 of file efr32bg21_agc.h.

#define _AGC_AGCPERIOD_PERIODLO_SHIFT   8

Shift value for AGC_PERIODLO

Definition at line 619 of file efr32bg21_agc.h.

#define _AGC_AGCPERIOD_RESETVALUE   0xD607370EUL

Default value for AGC_AGCPERIOD

Definition at line 613 of file efr32bg21_agc.h.

#define _AGC_AGCPERIOD_SETTLETIMEIF_DEFAULT   0x00000006UL

Mode DEFAULT for AGC_AGCPERIOD

Definition at line 629 of file efr32bg21_agc.h.

#define _AGC_AGCPERIOD_SETTLETIMEIF_MASK   0xF000000UL

Bit mask for AGC_SETTLETIMEIF

Definition at line 628 of file efr32bg21_agc.h.

#define _AGC_AGCPERIOD_SETTLETIMEIF_SHIFT   24

Shift value for AGC_SETTLETIMEIF

Definition at line 627 of file efr32bg21_agc.h.

#define _AGC_AGCPERIOD_SETTLETIMERF_DEFAULT   0x0000000DUL

Mode DEFAULT for AGC_AGCPERIOD

Definition at line 633 of file efr32bg21_agc.h.

#define _AGC_AGCPERIOD_SETTLETIMERF_MASK   0xF0000000UL

Bit mask for AGC_SETTLETIMERF

Definition at line 632 of file efr32bg21_agc.h.

#define _AGC_AGCPERIOD_SETTLETIMERF_SHIFT   28

Shift value for AGC_SETTLETIMERF

Definition at line 631 of file efr32bg21_agc.h.

#define _AGC_CTRL0_ADCATTENCODE_DEFAULT   0x00000000UL

Mode DEFAULT for AGC_CTRL0

Definition at line 331 of file efr32bg21_agc.h.

#define _AGC_CTRL0_ADCATTENCODE_MASK   0x6000000UL

Bit mask for AGC_ADCATTENCODE

Definition at line 330 of file efr32bg21_agc.h.

#define _AGC_CTRL0_ADCATTENCODE_SHIFT   25

Shift value for AGC_ADCATTENCODE

Definition at line 329 of file efr32bg21_agc.h.

#define _AGC_CTRL0_ADCATTENMODE_DEFAULT   0x00000000UL

Mode DEFAULT for AGC_CTRL0

Definition at line 323 of file efr32bg21_agc.h.

#define _AGC_CTRL0_ADCATTENMODE_DISABLE   0x00000000UL

Mode DISABLE for AGC_CTRL0

Definition at line 324 of file efr32bg21_agc.h.

#define _AGC_CTRL0_ADCATTENMODE_MASK   0x800000UL

Bit mask for AGC_ADCATTENMODE

Definition at line 322 of file efr32bg21_agc.h.

#define _AGC_CTRL0_ADCATTENMODE_NOTMAXGAIN   0x00000001UL

Mode NOTMAXGAIN for AGC_CTRL0

Definition at line 325 of file efr32bg21_agc.h.

#define _AGC_CTRL0_ADCATTENMODE_SHIFT   23

Shift value for AGC_ADCATTENMODE

Definition at line 321 of file efr32bg21_agc.h.

#define _AGC_CTRL0_AGCCLKUNDIVREQ_DEFAULT   0x00000000UL

Mode DEFAULT for AGC_CTRL0

Definition at line 313 of file efr32bg21_agc.h.

#define _AGC_CTRL0_AGCCLKUNDIVREQ_MASK   0x200000UL

Bit mask for AGC_AGCCLKUNDIVREQ

Definition at line 312 of file efr32bg21_agc.h.

#define _AGC_CTRL0_AGCCLKUNDIVREQ_SHIFT   21

Shift value for AGC_AGCCLKUNDIVREQ

Definition at line 311 of file efr32bg21_agc.h.

#define _AGC_CTRL0_AGCRST_DEFAULT   0x00000000UL

Mode DEFAULT for AGC_CTRL0

Definition at line 356 of file efr32bg21_agc.h.

#define _AGC_CTRL0_AGCRST_MASK   0x80000000UL

Bit mask for AGC_AGCRST

Definition at line 355 of file efr32bg21_agc.h.

#define _AGC_CTRL0_AGCRST_SHIFT   31

Shift value for AGC_AGCRST

Definition at line 354 of file efr32bg21_agc.h.

#define _AGC_CTRL0_DISCFLOOPADJ_DEFAULT   0x00000000UL

Mode DEFAULT for AGC_CTRL0

Definition at line 308 of file efr32bg21_agc.h.

#define _AGC_CTRL0_DISCFLOOPADJ_MASK   0x80000UL

Bit mask for AGC_DISCFLOOPADJ

Definition at line 307 of file efr32bg21_agc.h.

#define _AGC_CTRL0_DISCFLOOPADJ_SHIFT   19

Shift value for AGC_DISCFLOOPADJ

Definition at line 306 of file efr32bg21_agc.h.

#define _AGC_CTRL0_DISPNDWNCOMP_DEFAULT   0x00000000UL

Mode DEFAULT for AGC_CTRL0

Definition at line 351 of file efr32bg21_agc.h.

#define _AGC_CTRL0_DISPNDWNCOMP_MASK   0x40000000UL

Bit mask for AGC_DISPNDWNCOMP

Definition at line 350 of file efr32bg21_agc.h.

#define _AGC_CTRL0_DISPNDWNCOMP_SHIFT   30

Shift value for AGC_DISPNDWNCOMP

Definition at line 349 of file efr32bg21_agc.h.

#define _AGC_CTRL0_DISPNGAINUP_DEFAULT   0x00000001UL

Mode DEFAULT for AGC_CTRL0

Definition at line 346 of file efr32bg21_agc.h.

#define _AGC_CTRL0_DISPNGAINUP_MASK   0x20000000UL

Bit mask for AGC_DISPNGAINUP

Definition at line 345 of file efr32bg21_agc.h.

#define _AGC_CTRL0_DISPNGAINUP_SHIFT   29

Shift value for AGC_DISPNGAINUP

Definition at line 344 of file efr32bg21_agc.h.

#define _AGC_CTRL0_DISRESETCHPWR_DEFAULT   0x00000000UL

Mode DEFAULT for AGC_CTRL0

Definition at line 318 of file efr32bg21_agc.h.

#define _AGC_CTRL0_DISRESETCHPWR_MASK   0x400000UL

Bit mask for AGC_DISRESETCHPWR

Definition at line 317 of file efr32bg21_agc.h.

#define _AGC_CTRL0_DISRESETCHPWR_SHIFT   22

Shift value for AGC_DISRESETCHPWR

Definition at line 316 of file efr32bg21_agc.h.

#define _AGC_CTRL0_DSADISCFLOOP_DEFAULT   0x00000000UL

Mode DEFAULT for AGC_CTRL0

Definition at line 341 of file efr32bg21_agc.h.

#define _AGC_CTRL0_DSADISCFLOOP_MASK   0x10000000UL

Bit mask for AGC_DSADISCFLOOP

Definition at line 340 of file efr32bg21_agc.h.

#define _AGC_CTRL0_DSADISCFLOOP_SHIFT   28

Shift value for AGC_DSADISCFLOOP

Definition at line 339 of file efr32bg21_agc.h.

#define _AGC_CTRL0_ENRSSIRESET_DEFAULT   0x00000000UL

Mode DEFAULT for AGC_CTRL0

Definition at line 336 of file efr32bg21_agc.h.

#define _AGC_CTRL0_ENRSSIRESET_MASK   0x8000000UL

Bit mask for AGC_ENRSSIRESET

Definition at line 335 of file efr32bg21_agc.h.

#define _AGC_CTRL0_ENRSSIRESET_SHIFT   27

Shift value for AGC_ENRSSIRESET

Definition at line 334 of file efr32bg21_agc.h.

#define _AGC_CTRL0_MASK   0xFEEFFFFFUL

Mask for AGC_CTRL0

Definition at line 284 of file efr32bg21_agc.h.

#define _AGC_CTRL0_MODE_CONT   0x00000000UL

Mode CONT for AGC_CTRL0

Definition at line 292 of file efr32bg21_agc.h.

#define _AGC_CTRL0_MODE_DEFAULT   0x00000002UL

Mode DEFAULT for AGC_CTRL0

Definition at line 291 of file efr32bg21_agc.h.

#define _AGC_CTRL0_MODE_LOCKDSA   0x00000003UL

Mode LOCKDSA for AGC_CTRL0

Definition at line 295 of file efr32bg21_agc.h.

#define _AGC_CTRL0_MODE_LOCKFRAMEDET   0x00000002UL

Mode LOCKFRAMEDET for AGC_CTRL0

Definition at line 294 of file efr32bg21_agc.h.

#define _AGC_CTRL0_MODE_LOCKPREDET   0x00000001UL

Mode LOCKPREDET for AGC_CTRL0

Definition at line 293 of file efr32bg21_agc.h.

#define _AGC_CTRL0_MODE_MASK   0x700UL

Bit mask for AGC_MODE

Definition at line 290 of file efr32bg21_agc.h.

#define _AGC_CTRL0_MODE_SHIFT   8

Shift value for AGC_MODE

Definition at line 289 of file efr32bg21_agc.h.

#define _AGC_CTRL0_PWRTARGET_DEFAULT   0x0000007FUL

Mode DEFAULT for AGC_CTRL0

Definition at line 287 of file efr32bg21_agc.h.

#define _AGC_CTRL0_PWRTARGET_MASK   0xFFUL

Bit mask for AGC_PWRTARGET

Definition at line 286 of file efr32bg21_agc.h.

#define _AGC_CTRL0_PWRTARGET_SHIFT   0

Shift value for AGC_PWRTARGET

Definition at line 285 of file efr32bg21_agc.h.

#define _AGC_CTRL0_RESETVALUE   0x2002727FUL

Default value for AGC_CTRL0

Definition at line 283 of file efr32bg21_agc.h.

#define _AGC_CTRL0_RSSISHIFT_DEFAULT   0x0000004EUL

Mode DEFAULT for AGC_CTRL0

Definition at line 303 of file efr32bg21_agc.h.

#define _AGC_CTRL0_RSSISHIFT_MASK   0x7F800UL

Bit mask for AGC_RSSISHIFT

Definition at line 302 of file efr32bg21_agc.h.

#define _AGC_CTRL0_RSSISHIFT_SHIFT   11

Shift value for AGC_RSSISHIFT

Definition at line 301 of file efr32bg21_agc.h.

#define _AGC_CTRL1_CCATHRSH_DEFAULT   0x00000000UL

Mode DEFAULT for AGC_CTRL1

Definition at line 364 of file efr32bg21_agc.h.

#define _AGC_CTRL1_CCATHRSH_MASK   0xFFUL

Bit mask for AGC_CCATHRSH

Definition at line 363 of file efr32bg21_agc.h.

#define _AGC_CTRL1_CCATHRSH_SHIFT   0

Shift value for AGC_CCATHRSH

Definition at line 362 of file efr32bg21_agc.h.

#define _AGC_CTRL1_MASK   0xFFFFFFFFUL

Mask for AGC_CTRL1

Definition at line 361 of file efr32bg21_agc.h.

#define _AGC_CTRL1_PWRPERIOD_DEFAULT   0x00000001UL

Mode DEFAULT for AGC_CTRL1

Definition at line 372 of file efr32bg21_agc.h.

#define _AGC_CTRL1_PWRPERIOD_MASK   0x7000UL

Bit mask for AGC_PWRPERIOD

Definition at line 371 of file efr32bg21_agc.h.

#define _AGC_CTRL1_PWRPERIOD_SHIFT   12

Shift value for AGC_PWRPERIOD

Definition at line 370 of file efr32bg21_agc.h.

#define _AGC_CTRL1_RESETVALUE   0x00001300UL

Default value for AGC_CTRL1

Definition at line 360 of file efr32bg21_agc.h.

#define _AGC_CTRL1_RSSIPERIOD_DEFAULT   0x00000003UL

Mode DEFAULT for AGC_CTRL1

Definition at line 368 of file efr32bg21_agc.h.

#define _AGC_CTRL1_RSSIPERIOD_MASK   0xF00UL

Bit mask for AGC_RSSIPERIOD

Definition at line 367 of file efr32bg21_agc.h.

#define _AGC_CTRL1_RSSIPERIOD_SHIFT   8

Shift value for AGC_RSSIPERIOD

Definition at line 366 of file efr32bg21_agc.h.

#define _AGC_CTRL1_SUBDEN_DEFAULT   0x00000000UL

Mode DEFAULT for AGC_CTRL1

Definition at line 385 of file efr32bg21_agc.h.

#define _AGC_CTRL1_SUBDEN_MASK   0x3E00000UL

Bit mask for AGC_SUBDEN

Definition at line 384 of file efr32bg21_agc.h.

#define _AGC_CTRL1_SUBDEN_SHIFT   21

Shift value for AGC_SUBDEN

Definition at line 383 of file efr32bg21_agc.h.

#define _AGC_CTRL1_SUBINT_DEFAULT   0x00000000UL

Mode DEFAULT for AGC_CTRL1

Definition at line 389 of file efr32bg21_agc.h.

#define _AGC_CTRL1_SUBINT_MASK   0xFC000000UL

Bit mask for AGC_SUBINT

Definition at line 388 of file efr32bg21_agc.h.

#define _AGC_CTRL1_SUBINT_SHIFT   26

Shift value for AGC_SUBINT

Definition at line 387 of file efr32bg21_agc.h.

#define _AGC_CTRL1_SUBNUM_DEFAULT   0x00000000UL

Mode DEFAULT for AGC_CTRL1

Definition at line 381 of file efr32bg21_agc.h.

#define _AGC_CTRL1_SUBNUM_MASK   0x1F0000UL

Bit mask for AGC_SUBNUM

Definition at line 380 of file efr32bg21_agc.h.

#define _AGC_CTRL1_SUBNUM_SHIFT   16

Shift value for AGC_SUBNUM

Definition at line 379 of file efr32bg21_agc.h.

#define _AGC_CTRL1_SUBPERIOD_DEFAULT   0x00000000UL

Mode DEFAULT for AGC_CTRL1

Definition at line 377 of file efr32bg21_agc.h.

#define _AGC_CTRL1_SUBPERIOD_MASK   0x8000UL

Bit mask for AGC_SUBPERIOD

Definition at line 376 of file efr32bg21_agc.h.

#define _AGC_CTRL1_SUBPERIOD_SHIFT   15

Shift value for AGC_SUBPERIOD

Definition at line 375 of file efr32bg21_agc.h.

#define _AGC_CTRL2_DISRFPKD_DEFAULT   0x00000000UL

Mode DEFAULT for AGC_CTRL2

Definition at line 445 of file efr32bg21_agc.h.

#define _AGC_CTRL2_DISRFPKD_MASK   0x80000000UL

Bit mask for AGC_DISRFPKD

Definition at line 444 of file efr32bg21_agc.h.

#define _AGC_CTRL2_DISRFPKD_SHIFT   31

Shift value for AGC_DISRFPKD

Definition at line 443 of file efr32bg21_agc.h.

#define _AGC_CTRL2_DMASEL_DEFAULT   0x00000000UL

Mode DEFAULT for AGC_CTRL2

Definition at line 398 of file efr32bg21_agc.h.

#define _AGC_CTRL2_DMASEL_GAIN   0x00000001UL

Mode GAIN for AGC_CTRL2

Definition at line 400 of file efr32bg21_agc.h.

#define _AGC_CTRL2_DMASEL_MASK   0x1UL

Bit mask for AGC_DMASEL

Definition at line 397 of file efr32bg21_agc.h.

#define _AGC_CTRL2_DMASEL_RSSI   0x00000000UL

Mode RSSI for AGC_CTRL2

Definition at line 399 of file efr32bg21_agc.h.

#define _AGC_CTRL2_DMASEL_SHIFT   0

Shift value for AGC_DMASEL

Definition at line 396 of file efr32bg21_agc.h.

#define _AGC_CTRL2_MASK   0xC3FFFFFFUL

Mask for AGC_CTRL2

Definition at line 394 of file efr32bg21_agc.h.

#define _AGC_CTRL2_PRSDEBUGEN_DEFAULT   0x00000000UL

Mode DEFAULT for AGC_CTRL2

Definition at line 440 of file efr32bg21_agc.h.

#define _AGC_CTRL2_PRSDEBUGEN_MASK   0x40000000UL

Bit mask for AGC_PRSDEBUGEN

Definition at line 439 of file efr32bg21_agc.h.

#define _AGC_CTRL2_PRSDEBUGEN_SHIFT   30

Shift value for AGC_PRSDEBUGEN

Definition at line 438 of file efr32bg21_agc.h.

#define _AGC_CTRL2_REHICNTTHD_DEFAULT   0x00000008UL

Mode DEFAULT for AGC_CTRL2

Definition at line 415 of file efr32bg21_agc.h.

#define _AGC_CTRL2_REHICNTTHD_MASK   0x1FE0UL

Bit mask for AGC_REHICNTTHD

Definition at line 414 of file efr32bg21_agc.h.

#define _AGC_CTRL2_REHICNTTHD_SHIFT   5

Shift value for AGC_REHICNTTHD

Definition at line 413 of file efr32bg21_agc.h.

#define _AGC_CTRL2_RELBYCHPWR_DEFAULT   0x00000000UL

Mode DEFAULT for AGC_CTRL2

Definition at line 423 of file efr32bg21_agc.h.

#define _AGC_CTRL2_RELBYCHPWR_LO_CNT   0x00000000UL

Mode LO_CNT for AGC_CTRL2

Definition at line 424 of file efr32bg21_agc.h.

#define _AGC_CTRL2_RELBYCHPWR_LO_CNT_AND_PWR   0x00000003UL

Mode LO_CNT_AND_PWR for AGC_CTRL2

Definition at line 427 of file efr32bg21_agc.h.

#define _AGC_CTRL2_RELBYCHPWR_LO_CNT_PWR   0x00000002UL

Mode LO_CNT_PWR for AGC_CTRL2

Definition at line 426 of file efr32bg21_agc.h.

#define _AGC_CTRL2_RELBYCHPWR_MASK   0x30000UL

Bit mask for AGC_RELBYCHPWR

Definition at line 422 of file efr32bg21_agc.h.

#define _AGC_CTRL2_RELBYCHPWR_PWR   0x00000001UL

Mode PWR for AGC_CTRL2

Definition at line 425 of file efr32bg21_agc.h.

#define _AGC_CTRL2_RELBYCHPWR_SHIFT   16

Shift value for AGC_RELBYCHPWR

Definition at line 421 of file efr32bg21_agc.h.

#define _AGC_CTRL2_RELOTHD_DEFAULT   0x00000003UL

Mode DEFAULT for AGC_CTRL2

Definition at line 419 of file efr32bg21_agc.h.

#define _AGC_CTRL2_RELOTHD_MASK   0xE000UL

Bit mask for AGC_RELOTHD

Definition at line 418 of file efr32bg21_agc.h.

#define _AGC_CTRL2_RELOTHD_SHIFT   13

Shift value for AGC_RELOTHD

Definition at line 417 of file efr32bg21_agc.h.

#define _AGC_CTRL2_RELTARGETPWR_DEFAULT   0x00000000UL

Mode DEFAULT for AGC_CTRL2

Definition at line 435 of file efr32bg21_agc.h.

#define _AGC_CTRL2_RELTARGETPWR_MASK   0x3FC0000UL

Bit mask for AGC_RELTARGETPWR

Definition at line 434 of file efr32bg21_agc.h.

#define _AGC_CTRL2_RELTARGETPWR_SHIFT   18

Shift value for AGC_RELTARGETPWR

Definition at line 433 of file efr32bg21_agc.h.

#define _AGC_CTRL2_RESETVALUE   0x0000610AUL

Default value for AGC_CTRL2

Definition at line 393 of file efr32bg21_agc.h.

#define _AGC_CTRL2_SAFEMODE_DEFAULT   0x00000001UL

Mode DEFAULT for AGC_CTRL2

Definition at line 407 of file efr32bg21_agc.h.

#define _AGC_CTRL2_SAFEMODE_MASK   0x2UL

Bit mask for AGC_SAFEMODE

Definition at line 406 of file efr32bg21_agc.h.

#define _AGC_CTRL2_SAFEMODE_SHIFT   1

Shift value for AGC_SAFEMODE

Definition at line 405 of file efr32bg21_agc.h.

#define _AGC_CTRL2_SAFEMODETHD_DEFAULT   0x00000002UL

Mode DEFAULT for AGC_CTRL2

Definition at line 411 of file efr32bg21_agc.h.

#define _AGC_CTRL2_SAFEMODETHD_MASK   0x1CUL

Bit mask for AGC_SAFEMODETHD

Definition at line 410 of file efr32bg21_agc.h.

#define _AGC_CTRL2_SAFEMODETHD_SHIFT   2

Shift value for AGC_SAFEMODETHD

Definition at line 409 of file efr32bg21_agc.h.

#define _AGC_CTRL3_IFPKDDEB_DEFAULT   0x00000000UL

Mode DEFAULT for AGC_CTRL3

Definition at line 454 of file efr32bg21_agc.h.

#define _AGC_CTRL3_IFPKDDEB_MASK   0x1UL

Bit mask for AGC_IFPKDDEB

Definition at line 453 of file efr32bg21_agc.h.

#define _AGC_CTRL3_IFPKDDEB_SHIFT   0

Shift value for AGC_IFPKDDEB

Definition at line 452 of file efr32bg21_agc.h.

#define _AGC_CTRL3_IFPKDDEBPRD_DEFAULT   0x00000000UL

Mode DEFAULT for AGC_CTRL3

Definition at line 462 of file efr32bg21_agc.h.

#define _AGC_CTRL3_IFPKDDEBPRD_MASK   0x1F8UL

Bit mask for AGC_IFPKDDEBPRD

Definition at line 461 of file efr32bg21_agc.h.

#define _AGC_CTRL3_IFPKDDEBPRD_SHIFT   3

Shift value for AGC_IFPKDDEBPRD

Definition at line 460 of file efr32bg21_agc.h.

#define _AGC_CTRL3_IFPKDDEBRST_DEFAULT   0x00000004UL

Mode DEFAULT for AGC_CTRL3

Definition at line 466 of file efr32bg21_agc.h.

#define _AGC_CTRL3_IFPKDDEBRST_MASK   0x1E00UL

Bit mask for AGC_IFPKDDEBRST

Definition at line 465 of file efr32bg21_agc.h.

#define _AGC_CTRL3_IFPKDDEBRST_SHIFT   9

Shift value for AGC_IFPKDDEBRST

Definition at line 464 of file efr32bg21_agc.h.

#define _AGC_CTRL3_IFPKDDEBTHD_DEFAULT   0x00000000UL

Mode DEFAULT for AGC_CTRL3

Definition at line 458 of file efr32bg21_agc.h.

#define _AGC_CTRL3_IFPKDDEBTHD_MASK   0x6UL

Bit mask for AGC_IFPKDDEBTHD

Definition at line 457 of file efr32bg21_agc.h.

#define _AGC_CTRL3_IFPKDDEBTHD_SHIFT   1

Shift value for AGC_IFPKDDEBTHD

Definition at line 456 of file efr32bg21_agc.h.

#define _AGC_CTRL3_MASK   0x03FFFFFFUL

Mask for AGC_CTRL3

Definition at line 450 of file efr32bg21_agc.h.

#define _AGC_CTRL3_RESETVALUE   0x02A8A800UL

Default value for AGC_CTRL3

Definition at line 449 of file efr32bg21_agc.h.

#define _AGC_CTRL3_RFPKDDEB_DEFAULT   0x00000001UL

Mode DEFAULT for AGC_CTRL3

Definition at line 471 of file efr32bg21_agc.h.

#define _AGC_CTRL3_RFPKDDEB_MASK   0x2000UL

Bit mask for AGC_RFPKDDEB

Definition at line 470 of file efr32bg21_agc.h.

#define _AGC_CTRL3_RFPKDDEB_SHIFT   13

Shift value for AGC_RFPKDDEB

Definition at line 469 of file efr32bg21_agc.h.

#define _AGC_CTRL3_RFPKDDEBPRD_DEFAULT   0x00000028UL

Mode DEFAULT for AGC_CTRL3

Definition at line 479 of file efr32bg21_agc.h.

#define _AGC_CTRL3_RFPKDDEBPRD_MASK   0x3F0000UL

Bit mask for AGC_RFPKDDEBPRD

Definition at line 478 of file efr32bg21_agc.h.

#define _AGC_CTRL3_RFPKDDEBPRD_SHIFT   16

Shift value for AGC_RFPKDDEBPRD

Definition at line 477 of file efr32bg21_agc.h.

#define _AGC_CTRL3_RFPKDDEBRST_DEFAULT   0x0000000AUL

Mode DEFAULT for AGC_CTRL3

Definition at line 483 of file efr32bg21_agc.h.

#define _AGC_CTRL3_RFPKDDEBRST_MASK   0x3C00000UL

Bit mask for AGC_RFPKDDEBRST

Definition at line 482 of file efr32bg21_agc.h.

#define _AGC_CTRL3_RFPKDDEBRST_SHIFT   22

Shift value for AGC_RFPKDDEBRST

Definition at line 481 of file efr32bg21_agc.h.

#define _AGC_CTRL3_RFPKDDEBTHD_DEFAULT   0x00000002UL

Mode DEFAULT for AGC_CTRL3

Definition at line 475 of file efr32bg21_agc.h.

#define _AGC_CTRL3_RFPKDDEBTHD_MASK   0xC000UL

Bit mask for AGC_RFPKDDEBTHD

Definition at line 474 of file efr32bg21_agc.h.

#define _AGC_CTRL3_RFPKDDEBTHD_SHIFT   14

Shift value for AGC_RFPKDDEBTHD

Definition at line 473 of file efr32bg21_agc.h.

#define _AGC_EN_EN_DEFAULT   0x00000000UL

Mode DEFAULT for AGC_EN

Definition at line 206 of file efr32bg21_agc.h.

#define _AGC_EN_EN_MASK   0x1UL

Bit mask for AGC_EN

Definition at line 205 of file efr32bg21_agc.h.

#define _AGC_EN_EN_SHIFT   0

Shift value for AGC_EN

Definition at line 204 of file efr32bg21_agc.h.

#define _AGC_EN_MASK   0x00000001UL

Mask for AGC_EN

Definition at line 202 of file efr32bg21_agc.h.

#define _AGC_EN_RESETVALUE   0x00000000UL

Default value for AGC_EN

Definition at line 201 of file efr32bg21_agc.h.

#define _AGC_FRAMERSSI_FRAMERSSIFRAC_DEFAULT   0x00000000UL

Mode DEFAULT for AGC_FRAMERSSI

Definition at line 275 of file efr32bg21_agc.h.

#define _AGC_FRAMERSSI_FRAMERSSIFRAC_MASK   0xC0UL

Bit mask for AGC_FRAMERSSIFRAC

Definition at line 274 of file efr32bg21_agc.h.

#define _AGC_FRAMERSSI_FRAMERSSIFRAC_SHIFT   6

Shift value for AGC_FRAMERSSIFRAC

Definition at line 273 of file efr32bg21_agc.h.

#define _AGC_FRAMERSSI_FRAMERSSIINT_DEFAULT   0x00000080UL

Mode DEFAULT for AGC_FRAMERSSI

Definition at line 279 of file efr32bg21_agc.h.

#define _AGC_FRAMERSSI_FRAMERSSIINT_MASK   0xFF00UL

Bit mask for AGC_FRAMERSSIINT

Definition at line 278 of file efr32bg21_agc.h.

#define _AGC_FRAMERSSI_FRAMERSSIINT_SHIFT   8

Shift value for AGC_FRAMERSSIINT

Definition at line 277 of file efr32bg21_agc.h.

#define _AGC_FRAMERSSI_MASK   0x0000FFC0UL

Mask for AGC_FRAMERSSI

Definition at line 272 of file efr32bg21_agc.h.

#define _AGC_FRAMERSSI_RESETVALUE   0x00008000UL

Default value for AGC_FRAMERSSI

Definition at line 271 of file efr32bg21_agc.h.

#define _AGC_GAINRANGE_BOOSTLNA_DEFAULT   0x00000000UL

Mode DEFAULT for AGC_GAINRANGE

Definition at line 604 of file efr32bg21_agc.h.

#define _AGC_GAINRANGE_BOOSTLNA_MASK   0x4000000UL

Bit mask for AGC_BOOSTLNA

Definition at line 603 of file efr32bg21_agc.h.

#define _AGC_GAINRANGE_BOOSTLNA_SHIFT   26

Shift value for AGC_BOOSTLNA

Definition at line 602 of file efr32bg21_agc.h.

#define _AGC_GAINRANGE_GAININCSTEP_DEFAULT   0x00000001UL

Mode DEFAULT for AGC_GAINRANGE

Definition at line 587 of file efr32bg21_agc.h.

#define _AGC_GAINRANGE_GAININCSTEP_MASK   0xF00UL

Bit mask for AGC_GAININCSTEP

Definition at line 586 of file efr32bg21_agc.h.

#define _AGC_GAINRANGE_GAININCSTEP_SHIFT   8

Shift value for AGC_GAININCSTEP

Definition at line 585 of file efr32bg21_agc.h.

#define _AGC_GAINRANGE_HIPWRTHD_DEFAULT   0x00000008UL

Mode DEFAULT for AGC_GAINRANGE

Definition at line 599 of file efr32bg21_agc.h.

#define _AGC_GAINRANGE_HIPWRTHD_MASK   0x3F00000UL

Bit mask for AGC_HIPWRTHD

Definition at line 598 of file efr32bg21_agc.h.

#define _AGC_GAINRANGE_HIPWRTHD_SHIFT   20

Shift value for AGC_HIPWRTHD

Definition at line 597 of file efr32bg21_agc.h.

#define _AGC_GAINRANGE_LATCHEDHISTEP_DEFAULT   0x00000001UL

Mode DEFAULT for AGC_GAINRANGE

Definition at line 595 of file efr32bg21_agc.h.

#define _AGC_GAINRANGE_LATCHEDHISTEP_MASK   0xF0000UL

Bit mask for AGC_LATCHEDHISTEP

Definition at line 594 of file efr32bg21_agc.h.

#define _AGC_GAINRANGE_LATCHEDHISTEP_SHIFT   16

Shift value for AGC_LATCHEDHISTEP

Definition at line 593 of file efr32bg21_agc.h.

#define _AGC_GAINRANGE_LNABWADJ_DEFAULT   0x00000001UL

Mode DEFAULT for AGC_GAINRANGE

Definition at line 609 of file efr32bg21_agc.h.

#define _AGC_GAINRANGE_LNABWADJ_MASK   0x8000000UL

Bit mask for AGC_LNABWADJ

Definition at line 608 of file efr32bg21_agc.h.

#define _AGC_GAINRANGE_LNABWADJ_SHIFT   27

Shift value for AGC_LNABWADJ

Definition at line 607 of file efr32bg21_agc.h.

#define _AGC_GAINRANGE_LNAINDEXBORDER_DEFAULT   0x00000007UL

Mode DEFAULT for AGC_GAINRANGE

Definition at line 579 of file efr32bg21_agc.h.

#define _AGC_GAINRANGE_LNAINDEXBORDER_MASK   0xFUL

Bit mask for AGC_LNAINDEXBORDER

Definition at line 578 of file efr32bg21_agc.h.

#define _AGC_GAINRANGE_LNAINDEXBORDER_SHIFT   0

Shift value for AGC_LNAINDEXBORDER

Definition at line 577 of file efr32bg21_agc.h.

#define _AGC_GAINRANGE_MASK   0x0FFFFFFFUL

Mask for AGC_GAINRANGE

Definition at line 576 of file efr32bg21_agc.h.

#define _AGC_GAINRANGE_PGAINDEXBORDER_DEFAULT   0x00000008UL

Mode DEFAULT for AGC_GAINRANGE

Definition at line 583 of file efr32bg21_agc.h.

#define _AGC_GAINRANGE_PGAINDEXBORDER_MASK   0xF0UL

Bit mask for AGC_PGAINDEXBORDER

Definition at line 582 of file efr32bg21_agc.h.

#define _AGC_GAINRANGE_PGAINDEXBORDER_SHIFT   4

Shift value for AGC_PGAINDEXBORDER

Definition at line 581 of file efr32bg21_agc.h.

#define _AGC_GAINRANGE_PNGAINSTEP_DEFAULT   0x00000003UL

Mode DEFAULT for AGC_GAINRANGE

Definition at line 591 of file efr32bg21_agc.h.

#define _AGC_GAINRANGE_PNGAINSTEP_MASK   0xF000UL

Bit mask for AGC_PNGAINSTEP

Definition at line 590 of file efr32bg21_agc.h.

#define _AGC_GAINRANGE_PNGAINSTEP_SHIFT   12

Shift value for AGC_PNGAINSTEP

Definition at line 589 of file efr32bg21_agc.h.

#define _AGC_GAINRANGE_RESETVALUE   0x08813187UL

Default value for AGC_GAINRANGE

Definition at line 575 of file efr32bg21_agc.h.

#define _AGC_GAINSTEPLIM_CFLOOPDEL_DEFAULT   0x0000000AUL

Mode DEFAULT for AGC_GAINSTEPLIM

Definition at line 697 of file efr32bg21_agc.h.

#define _AGC_GAINSTEPLIM_CFLOOPDEL_MASK   0xFE0UL

Bit mask for AGC_CFLOOPDEL

Definition at line 696 of file efr32bg21_agc.h.

#define _AGC_GAINSTEPLIM_CFLOOPDEL_SHIFT   5

Shift value for AGC_CFLOOPDEL

Definition at line 695 of file efr32bg21_agc.h.

#define _AGC_GAINSTEPLIM_CFLOOPSTEPMAX_DEFAULT   0x00000004UL

Mode DEFAULT for AGC_GAINSTEPLIM

Definition at line 693 of file efr32bg21_agc.h.

#define _AGC_GAINSTEPLIM_CFLOOPSTEPMAX_MASK   0x1FUL

Bit mask for AGC_CFLOOPSTEPMAX

Definition at line 692 of file efr32bg21_agc.h.

#define _AGC_GAINSTEPLIM_CFLOOPSTEPMAX_SHIFT   0

Shift value for AGC_CFLOOPSTEPMAX

Definition at line 691 of file efr32bg21_agc.h.

#define _AGC_GAINSTEPLIM_HYST_DEFAULT   0x00000003UL

Mode DEFAULT for AGC_GAINSTEPLIM

Definition at line 701 of file efr32bg21_agc.h.

#define _AGC_GAINSTEPLIM_HYST_MASK   0xF000UL

Bit mask for AGC_HYST

Definition at line 700 of file efr32bg21_agc.h.

#define _AGC_GAINSTEPLIM_HYST_SHIFT   12

Shift value for AGC_HYST

Definition at line 699 of file efr32bg21_agc.h.

#define _AGC_GAINSTEPLIM_MASK   0x01FFFFFFUL

Mask for AGC_GAINSTEPLIM

Definition at line 690 of file efr32bg21_agc.h.

#define _AGC_GAINSTEPLIM_MAXPWRVAR_DEFAULT   0x00000000UL

Mode DEFAULT for AGC_GAINSTEPLIM

Definition at line 705 of file efr32bg21_agc.h.

#define _AGC_GAINSTEPLIM_MAXPWRVAR_MASK   0xFF0000UL

Bit mask for AGC_MAXPWRVAR

Definition at line 704 of file efr32bg21_agc.h.

#define _AGC_GAINSTEPLIM_MAXPWRVAR_SHIFT   16

Shift value for AGC_MAXPWRVAR

Definition at line 703 of file efr32bg21_agc.h.

#define _AGC_GAINSTEPLIM_RESETVALUE   0x00003144UL

Default value for AGC_GAINSTEPLIM

Definition at line 689 of file efr32bg21_agc.h.

#define _AGC_GAINSTEPLIM_TRANRSTAGC_DEFAULT   0x00000000UL

Mode DEFAULT for AGC_GAINSTEPLIM

Definition at line 710 of file efr32bg21_agc.h.

#define _AGC_GAINSTEPLIM_TRANRSTAGC_MASK   0x1000000UL

Bit mask for AGC_TRANRSTAGC

Definition at line 709 of file efr32bg21_agc.h.

#define _AGC_GAINSTEPLIM_TRANRSTAGC_SHIFT   24

Shift value for AGC_TRANRSTAGC

Definition at line 708 of file efr32bg21_agc.h.

#define _AGC_HICNTREGION_HICNTREGION0_DEFAULT   0x00000003UL

Mode DEFAULT for AGC_HICNTREGION

Definition at line 641 of file efr32bg21_agc.h.

#define _AGC_HICNTREGION_HICNTREGION0_MASK   0xFUL

Bit mask for AGC_HICNTREGION0

Definition at line 640 of file efr32bg21_agc.h.

#define _AGC_HICNTREGION_HICNTREGION0_SHIFT   0

Shift value for AGC_HICNTREGION0

Definition at line 639 of file efr32bg21_agc.h.

#define _AGC_HICNTREGION_HICNTREGION1_DEFAULT   0x00000004UL

Mode DEFAULT for AGC_HICNTREGION

Definition at line 645 of file efr32bg21_agc.h.

#define _AGC_HICNTREGION_HICNTREGION1_MASK   0xF0UL

Bit mask for AGC_HICNTREGION1

Definition at line 644 of file efr32bg21_agc.h.

#define _AGC_HICNTREGION_HICNTREGION1_SHIFT   4

Shift value for AGC_HICNTREGION1

Definition at line 643 of file efr32bg21_agc.h.

#define _AGC_HICNTREGION_HICNTREGION2_DEFAULT   0x00000005UL

Mode DEFAULT for AGC_HICNTREGION

Definition at line 649 of file efr32bg21_agc.h.

#define _AGC_HICNTREGION_HICNTREGION2_MASK   0xFF00UL

Bit mask for AGC_HICNTREGION2

Definition at line 648 of file efr32bg21_agc.h.

#define _AGC_HICNTREGION_HICNTREGION2_SHIFT   8

Shift value for AGC_HICNTREGION2

Definition at line 647 of file efr32bg21_agc.h.

#define _AGC_HICNTREGION_HICNTREGION3_DEFAULT   0x00000006UL

Mode DEFAULT for AGC_HICNTREGION

Definition at line 653 of file efr32bg21_agc.h.

#define _AGC_HICNTREGION_HICNTREGION3_MASK   0xFF0000UL

Bit mask for AGC_HICNTREGION3

Definition at line 652 of file efr32bg21_agc.h.

#define _AGC_HICNTREGION_HICNTREGION3_SHIFT   16

Shift value for AGC_HICNTREGION3

Definition at line 651 of file efr32bg21_agc.h.

#define _AGC_HICNTREGION_HICNTREGION4_DEFAULT   0x00000008UL

Mode DEFAULT for AGC_HICNTREGION

Definition at line 657 of file efr32bg21_agc.h.

#define _AGC_HICNTREGION_HICNTREGION4_MASK   0xFF000000UL

Bit mask for AGC_HICNTREGION4

Definition at line 656 of file efr32bg21_agc.h.

#define _AGC_HICNTREGION_HICNTREGION4_SHIFT   24

Shift value for AGC_HICNTREGION4

Definition at line 655 of file efr32bg21_agc.h.

#define _AGC_HICNTREGION_MASK   0xFFFFFFFFUL

Mask for AGC_HICNTREGION

Definition at line 638 of file efr32bg21_agc.h.

#define _AGC_HICNTREGION_RESETVALUE   0x08060543UL

Default value for AGC_HICNTREGION

Definition at line 637 of file efr32bg21_agc.h.

#define _AGC_IEN_CCA_DEFAULT   0x00000000UL

Mode DEFAULT for AGC_IEN

Definition at line 556 of file efr32bg21_agc.h.

#define _AGC_IEN_CCA_MASK   0x4UL

Bit mask for AGC_CCA

Definition at line 555 of file efr32bg21_agc.h.

#define _AGC_IEN_CCA_SHIFT   2

Shift value for AGC_CCA

Definition at line 554 of file efr32bg21_agc.h.

#define _AGC_IEN_MASK   0x0000007DUL

Mask for AGC_IEN

Definition at line 547 of file efr32bg21_agc.h.

#define _AGC_IEN_RESETVALUE   0x00000000UL

Default value for AGC_IEN

Definition at line 546 of file efr32bg21_agc.h.

#define _AGC_IEN_RSSINEGSTEP_DEFAULT   0x00000000UL

Mode DEFAULT for AGC_IEN

Definition at line 566 of file efr32bg21_agc.h.

#define _AGC_IEN_RSSINEGSTEP_MASK   0x10UL

Bit mask for AGC_RSSINEGSTEP

Definition at line 565 of file efr32bg21_agc.h.

#define _AGC_IEN_RSSINEGSTEP_SHIFT   4

Shift value for AGC_RSSINEGSTEP

Definition at line 564 of file efr32bg21_agc.h.

#define _AGC_IEN_RSSIPOSSTEP_DEFAULT   0x00000000UL

Mode DEFAULT for AGC_IEN

Definition at line 561 of file efr32bg21_agc.h.

#define _AGC_IEN_RSSIPOSSTEP_MASK   0x8UL

Bit mask for AGC_RSSIPOSSTEP

Definition at line 560 of file efr32bg21_agc.h.

#define _AGC_IEN_RSSIPOSSTEP_SHIFT   3

Shift value for AGC_RSSIPOSSTEP

Definition at line 559 of file efr32bg21_agc.h.

#define _AGC_IEN_RSSIVALID_DEFAULT   0x00000000UL

Mode DEFAULT for AGC_IEN

Definition at line 551 of file efr32bg21_agc.h.

#define _AGC_IEN_RSSIVALID_MASK   0x1UL

Bit mask for AGC_RSSIVALID

Definition at line 550 of file efr32bg21_agc.h.

#define _AGC_IEN_RSSIVALID_SHIFT   0

Shift value for AGC_RSSIVALID

Definition at line 549 of file efr32bg21_agc.h.

#define _AGC_IEN_SHORTRSSIPOSSTEP_DEFAULT   0x00000000UL

Mode DEFAULT for AGC_IEN

Definition at line 571 of file efr32bg21_agc.h.

#define _AGC_IEN_SHORTRSSIPOSSTEP_MASK   0x40UL

Bit mask for AGC_SHORTRSSIPOSSTEP

Definition at line 570 of file efr32bg21_agc.h.

#define _AGC_IEN_SHORTRSSIPOSSTEP_SHIFT   6

Shift value for AGC_SHORTRSSIPOSSTEP

Definition at line 569 of file efr32bg21_agc.h.

#define _AGC_IF_CCA_DEFAULT   0x00000000UL

Mode DEFAULT for AGC_IF

Definition at line 527 of file efr32bg21_agc.h.

#define _AGC_IF_CCA_MASK   0x4UL

Bit mask for AGC_CCA

Definition at line 526 of file efr32bg21_agc.h.

#define _AGC_IF_CCA_SHIFT   2

Shift value for AGC_CCA

Definition at line 525 of file efr32bg21_agc.h.

#define _AGC_IF_MASK   0x0000007DUL

Mask for AGC_IF

Definition at line 518 of file efr32bg21_agc.h.

#define _AGC_IF_RESETVALUE   0x00000000UL

Default value for AGC_IF

Definition at line 517 of file efr32bg21_agc.h.

#define _AGC_IF_RSSINEGSTEP_DEFAULT   0x00000000UL

Mode DEFAULT for AGC_IF

Definition at line 537 of file efr32bg21_agc.h.

#define _AGC_IF_RSSINEGSTEP_MASK   0x10UL

Bit mask for AGC_RSSINEGSTEP

Definition at line 536 of file efr32bg21_agc.h.

#define _AGC_IF_RSSINEGSTEP_SHIFT   4

Shift value for AGC_RSSINEGSTEP

Definition at line 535 of file efr32bg21_agc.h.

#define _AGC_IF_RSSIPOSSTEP_DEFAULT   0x00000000UL

Mode DEFAULT for AGC_IF

Definition at line 532 of file efr32bg21_agc.h.

#define _AGC_IF_RSSIPOSSTEP_MASK   0x8UL

Bit mask for AGC_RSSIPOSSTEP

Definition at line 531 of file efr32bg21_agc.h.

#define _AGC_IF_RSSIPOSSTEP_SHIFT   3

Shift value for AGC_RSSIPOSSTEP

Definition at line 530 of file efr32bg21_agc.h.

#define _AGC_IF_RSSIVALID_DEFAULT   0x00000000UL

Mode DEFAULT for AGC_IF

Definition at line 522 of file efr32bg21_agc.h.

#define _AGC_IF_RSSIVALID_MASK   0x1UL

Bit mask for AGC_RSSIVALID

Definition at line 521 of file efr32bg21_agc.h.

#define _AGC_IF_RSSIVALID_SHIFT   0

Shift value for AGC_RSSIVALID

Definition at line 520 of file efr32bg21_agc.h.

#define _AGC_IF_SHORTRSSIPOSSTEP_DEFAULT   0x00000000UL

Mode DEFAULT for AGC_IF

Definition at line 542 of file efr32bg21_agc.h.

#define _AGC_IF_SHORTRSSIPOSSTEP_MASK   0x40UL

Bit mask for AGC_SHORTRSSIPOSSTEP

Definition at line 541 of file efr32bg21_agc.h.

#define _AGC_IF_SHORTRSSIPOSSTEP_SHIFT   6

Shift value for AGC_SHORTRSSIPOSSTEP

Definition at line 540 of file efr32bg21_agc.h.

#define _AGC_IPVERSION_IPVERSION_DEFAULT   0x00000000UL

Mode DEFAULT for AGC_IPVERSION

Definition at line 197 of file efr32bg21_agc.h.

#define _AGC_IPVERSION_IPVERSION_MASK   0xFFFFFFFFUL

Bit mask for AGC_IPVERSION

Definition at line 196 of file efr32bg21_agc.h.

#define _AGC_IPVERSION_IPVERSION_SHIFT   0

Shift value for AGC_IPVERSION

Definition at line 195 of file efr32bg21_agc.h.

#define _AGC_IPVERSION_MASK   0xFFFFFFFFUL

Mask for AGC_IPVERSION

Definition at line 194 of file efr32bg21_agc.h.

#define _AGC_IPVERSION_RESETVALUE   0x00000000UL

Default value for AGC_IPVERSION

Definition at line 193 of file efr32bg21_agc.h.

#define _AGC_LBT_CCARSSIPERIOD_DEFAULT   0x00000000UL

Mode DEFAULT for AGC_LBT

Definition at line 886 of file efr32bg21_agc.h.

#define _AGC_LBT_CCARSSIPERIOD_MASK   0xFUL

Bit mask for AGC_CCARSSIPERIOD

Definition at line 885 of file efr32bg21_agc.h.

#define _AGC_LBT_CCARSSIPERIOD_SHIFT   0

Shift value for AGC_CCARSSIPERIOD

Definition at line 884 of file efr32bg21_agc.h.

#define _AGC_LBT_ENCCAGAINREDUCED_DEFAULT   0x00000000UL

Mode DEFAULT for AGC_LBT

Definition at line 896 of file efr32bg21_agc.h.

#define _AGC_LBT_ENCCAGAINREDUCED_MASK   0x20UL

Bit mask for AGC_ENCCAGAINREDUCED

Definition at line 895 of file efr32bg21_agc.h.

#define _AGC_LBT_ENCCAGAINREDUCED_SHIFT   5

Shift value for AGC_ENCCAGAINREDUCED

Definition at line 894 of file efr32bg21_agc.h.

#define _AGC_LBT_ENCCARSSIMAX_DEFAULT   0x00000000UL

Mode DEFAULT for AGC_LBT

Definition at line 901 of file efr32bg21_agc.h.

#define _AGC_LBT_ENCCARSSIMAX_MASK   0x40UL

Bit mask for AGC_ENCCARSSIMAX

Definition at line 900 of file efr32bg21_agc.h.

#define _AGC_LBT_ENCCARSSIMAX_SHIFT   6

Shift value for AGC_ENCCARSSIMAX

Definition at line 899 of file efr32bg21_agc.h.

#define _AGC_LBT_ENCCARSSIPERIOD_DEFAULT   0x00000000UL

Mode DEFAULT for AGC_LBT

Definition at line 891 of file efr32bg21_agc.h.

#define _AGC_LBT_ENCCARSSIPERIOD_MASK   0x10UL

Bit mask for AGC_ENCCARSSIPERIOD

Definition at line 890 of file efr32bg21_agc.h.

#define _AGC_LBT_ENCCARSSIPERIOD_SHIFT   4

Shift value for AGC_ENCCARSSIPERIOD

Definition at line 889 of file efr32bg21_agc.h.

#define _AGC_LBT_MASK   0x0000007FUL

Mask for AGC_LBT

Definition at line 883 of file efr32bg21_agc.h.

#define _AGC_LBT_RESETVALUE   0x00000000UL

Default value for AGC_LBT

Definition at line 882 of file efr32bg21_agc.h.

#define _AGC_LNAMIXCODE0_LNAMIXSLICE1_DEFAULT   0x0000003DUL

Mode DEFAULT for AGC_LNAMIXCODE0

Definition at line 786 of file efr32bg21_agc.h.

#define _AGC_LNAMIXCODE0_LNAMIXSLICE1_MASK   0x3FUL

Bit mask for AGC_LNAMIXSLICE1

Definition at line 785 of file efr32bg21_agc.h.

#define _AGC_LNAMIXCODE0_LNAMIXSLICE1_SHIFT   0

Shift value for AGC_LNAMIXSLICE1

Definition at line 784 of file efr32bg21_agc.h.

#define _AGC_LNAMIXCODE0_LNAMIXSLICE2_DEFAULT   0x0000002EUL

Mode DEFAULT for AGC_LNAMIXCODE0

Definition at line 790 of file efr32bg21_agc.h.

#define _AGC_LNAMIXCODE0_LNAMIXSLICE2_MASK   0xFC0UL

Bit mask for AGC_LNAMIXSLICE2

Definition at line 789 of file efr32bg21_agc.h.

#define _AGC_LNAMIXCODE0_LNAMIXSLICE2_SHIFT   6

Shift value for AGC_LNAMIXSLICE2

Definition at line 788 of file efr32bg21_agc.h.

#define _AGC_LNAMIXCODE0_LNAMIXSLICE3_DEFAULT   0x00000024UL

Mode DEFAULT for AGC_LNAMIXCODE0

Definition at line 794 of file efr32bg21_agc.h.

#define _AGC_LNAMIXCODE0_LNAMIXSLICE3_MASK   0x3F000UL

Bit mask for AGC_LNAMIXSLICE3

Definition at line 793 of file efr32bg21_agc.h.

#define _AGC_LNAMIXCODE0_LNAMIXSLICE3_SHIFT   12

Shift value for AGC_LNAMIXSLICE3

Definition at line 792 of file efr32bg21_agc.h.

#define _AGC_LNAMIXCODE0_LNAMIXSLICE4_DEFAULT   0x0000001CUL

Mode DEFAULT for AGC_LNAMIXCODE0

Definition at line 798 of file efr32bg21_agc.h.

#define _AGC_LNAMIXCODE0_LNAMIXSLICE4_MASK   0xFC0000UL

Bit mask for AGC_LNAMIXSLICE4

Definition at line 797 of file efr32bg21_agc.h.

#define _AGC_LNAMIXCODE0_LNAMIXSLICE4_SHIFT   18

Shift value for AGC_LNAMIXSLICE4

Definition at line 796 of file efr32bg21_agc.h.

#define _AGC_LNAMIXCODE0_LNAMIXSLICE5_DEFAULT   0x00000015UL

Mode DEFAULT for AGC_LNAMIXCODE0

Definition at line 802 of file efr32bg21_agc.h.

#define _AGC_LNAMIXCODE0_LNAMIXSLICE5_MASK   0x3F000000UL

Bit mask for AGC_LNAMIXSLICE5

Definition at line 801 of file efr32bg21_agc.h.

#define _AGC_LNAMIXCODE0_LNAMIXSLICE5_SHIFT   24

Shift value for AGC_LNAMIXSLICE5

Definition at line 800 of file efr32bg21_agc.h.

#define _AGC_LNAMIXCODE0_MASK   0x3FFFFFFFUL

Mask for AGC_LNAMIXCODE0

Definition at line 783 of file efr32bg21_agc.h.

#define _AGC_LNAMIXCODE0_RESETVALUE   0x15724BBDUL

Default value for AGC_LNAMIXCODE0

Definition at line 782 of file efr32bg21_agc.h.

#define _AGC_LNAMIXCODE1_LNAMIXSLICE10_DEFAULT   0x00000005UL

Mode DEFAULT for AGC_LNAMIXCODE1

Definition at line 826 of file efr32bg21_agc.h.

#define _AGC_LNAMIXCODE1_LNAMIXSLICE10_MASK   0x3F000000UL

Bit mask for AGC_LNAMIXSLICE10

Definition at line 825 of file efr32bg21_agc.h.

#define _AGC_LNAMIXCODE1_LNAMIXSLICE10_SHIFT   24

Shift value for AGC_LNAMIXSLICE10

Definition at line 824 of file efr32bg21_agc.h.

#define _AGC_LNAMIXCODE1_LNAMIXSLICE6_DEFAULT   0x00000011UL

Mode DEFAULT for AGC_LNAMIXCODE1

Definition at line 810 of file efr32bg21_agc.h.

#define _AGC_LNAMIXCODE1_LNAMIXSLICE6_MASK   0x3FUL

Bit mask for AGC_LNAMIXSLICE6

Definition at line 809 of file efr32bg21_agc.h.

#define _AGC_LNAMIXCODE1_LNAMIXSLICE6_SHIFT   0

Shift value for AGC_LNAMIXSLICE6

Definition at line 808 of file efr32bg21_agc.h.

#define _AGC_LNAMIXCODE1_LNAMIXSLICE7_DEFAULT   0x0000000CUL

Mode DEFAULT for AGC_LNAMIXCODE1

Definition at line 814 of file efr32bg21_agc.h.

#define _AGC_LNAMIXCODE1_LNAMIXSLICE7_MASK   0xFC0UL

Bit mask for AGC_LNAMIXSLICE7

Definition at line 813 of file efr32bg21_agc.h.

#define _AGC_LNAMIXCODE1_LNAMIXSLICE7_SHIFT   6

Shift value for AGC_LNAMIXSLICE7

Definition at line 812 of file efr32bg21_agc.h.

#define _AGC_LNAMIXCODE1_LNAMIXSLICE8_DEFAULT   0x0000000AUL

Mode DEFAULT for AGC_LNAMIXCODE1

Definition at line 818 of file efr32bg21_agc.h.

#define _AGC_LNAMIXCODE1_LNAMIXSLICE8_MASK   0x3F000UL

Bit mask for AGC_LNAMIXSLICE8

Definition at line 817 of file efr32bg21_agc.h.

#define _AGC_LNAMIXCODE1_LNAMIXSLICE8_SHIFT   12

Shift value for AGC_LNAMIXSLICE8

Definition at line 816 of file efr32bg21_agc.h.

#define _AGC_LNAMIXCODE1_LNAMIXSLICE9_DEFAULT   0x00000006UL

Mode DEFAULT for AGC_LNAMIXCODE1

Definition at line 822 of file efr32bg21_agc.h.

#define _AGC_LNAMIXCODE1_LNAMIXSLICE9_MASK   0xFC0000UL

Bit mask for AGC_LNAMIXSLICE9

Definition at line 821 of file efr32bg21_agc.h.

#define _AGC_LNAMIXCODE1_LNAMIXSLICE9_SHIFT   18

Shift value for AGC_LNAMIXSLICE9

Definition at line 820 of file efr32bg21_agc.h.

#define _AGC_LNAMIXCODE1_MASK   0x3FFFFFFFUL

Mask for AGC_LNAMIXCODE1

Definition at line 807 of file efr32bg21_agc.h.

#define _AGC_LNAMIXCODE1_RESETVALUE   0x0518A311UL

Default value for AGC_LNAMIXCODE1

Definition at line 806 of file efr32bg21_agc.h.

#define _AGC_MIRRORIF_IFMIRRORCLEAR_DEFAULT   0x00000000UL

Mode DEFAULT for AGC_MIRRORIF

Definition at line 925 of file efr32bg21_agc.h.

#define _AGC_MIRRORIF_IFMIRRORCLEAR_MASK   0x8UL

Bit mask for AGC_IFMIRRORCLEAR

Definition at line 924 of file efr32bg21_agc.h.

#define _AGC_MIRRORIF_IFMIRRORCLEAR_SHIFT   3

Shift value for AGC_IFMIRRORCLEAR

Definition at line 923 of file efr32bg21_agc.h.

#define _AGC_MIRRORIF_MASK   0x0000000FUL

Mask for AGC_MIRRORIF

Definition at line 906 of file efr32bg21_agc.h.

#define _AGC_MIRRORIF_RESETVALUE   0x00000000UL

Default value for AGC_MIRRORIF

Definition at line 905 of file efr32bg21_agc.h.

#define _AGC_MIRRORIF_RSSINEGSTEPM_DEFAULT   0x00000000UL

Mode DEFAULT for AGC_MIRRORIF

Definition at line 915 of file efr32bg21_agc.h.

#define _AGC_MIRRORIF_RSSINEGSTEPM_MASK   0x2UL

Bit mask for AGC_RSSINEGSTEPM

Definition at line 914 of file efr32bg21_agc.h.

#define _AGC_MIRRORIF_RSSINEGSTEPM_SHIFT   1

Shift value for AGC_RSSINEGSTEPM

Definition at line 913 of file efr32bg21_agc.h.

#define _AGC_MIRRORIF_RSSIPOSSTEPM_DEFAULT   0x00000000UL

Mode DEFAULT for AGC_MIRRORIF

Definition at line 910 of file efr32bg21_agc.h.

#define _AGC_MIRRORIF_RSSIPOSSTEPM_MASK   0x1UL

Bit mask for AGC_RSSIPOSSTEPM

Definition at line 909 of file efr32bg21_agc.h.

#define _AGC_MIRRORIF_RSSIPOSSTEPM_SHIFT   0

Shift value for AGC_RSSIPOSSTEPM

Definition at line 908 of file efr32bg21_agc.h.

#define _AGC_MIRRORIF_SHORTRSSIPOSSTEPM_DEFAULT   0x00000000UL

Mode DEFAULT for AGC_MIRRORIF

Definition at line 920 of file efr32bg21_agc.h.

#define _AGC_MIRRORIF_SHORTRSSIPOSSTEPM_MASK   0x4UL

Bit mask for AGC_SHORTRSSIPOSSTEPM

Definition at line 919 of file efr32bg21_agc.h.

#define _AGC_MIRRORIF_SHORTRSSIPOSSTEPM_SHIFT   2

Shift value for AGC_SHORTRSSIPOSSTEPM

Definition at line 918 of file efr32bg21_agc.h.

#define _AGC_PGACODE0_MASK   0xFFFFFFFFUL

Mask for AGC_PGACODE0

Definition at line 831 of file efr32bg21_agc.h.

#define _AGC_PGACODE0_PGAGAIN1_DEFAULT   0x00000000UL

Mode DEFAULT for AGC_PGACODE0

Definition at line 834 of file efr32bg21_agc.h.

#define _AGC_PGACODE0_PGAGAIN1_MASK   0xFUL

Bit mask for AGC_PGAGAIN1

Definition at line 833 of file efr32bg21_agc.h.

#define _AGC_PGACODE0_PGAGAIN1_SHIFT   0

Shift value for AGC_PGAGAIN1

Definition at line 832 of file efr32bg21_agc.h.

#define _AGC_PGACODE0_PGAGAIN2_DEFAULT   0x00000001UL

Mode DEFAULT for AGC_PGACODE0

Definition at line 838 of file efr32bg21_agc.h.

#define _AGC_PGACODE0_PGAGAIN2_MASK   0xF0UL

Bit mask for AGC_PGAGAIN2

Definition at line 837 of file efr32bg21_agc.h.

#define _AGC_PGACODE0_PGAGAIN2_SHIFT   4

Shift value for AGC_PGAGAIN2

Definition at line 836 of file efr32bg21_agc.h.

#define _AGC_PGACODE0_PGAGAIN3_DEFAULT   0x00000002UL

Mode DEFAULT for AGC_PGACODE0

Definition at line 842 of file efr32bg21_agc.h.

#define _AGC_PGACODE0_PGAGAIN3_MASK   0xF00UL

Bit mask for AGC_PGAGAIN3

Definition at line 841 of file efr32bg21_agc.h.

#define _AGC_PGACODE0_PGAGAIN3_SHIFT   8

Shift value for AGC_PGAGAIN3

Definition at line 840 of file efr32bg21_agc.h.

#define _AGC_PGACODE0_PGAGAIN4_DEFAULT   0x00000003UL

Mode DEFAULT for AGC_PGACODE0

Definition at line 846 of file efr32bg21_agc.h.

#define _AGC_PGACODE0_PGAGAIN4_MASK   0xF000UL

Bit mask for AGC_PGAGAIN4

Definition at line 845 of file efr32bg21_agc.h.

#define _AGC_PGACODE0_PGAGAIN4_SHIFT   12

Shift value for AGC_PGAGAIN4

Definition at line 844 of file efr32bg21_agc.h.

#define _AGC_PGACODE0_PGAGAIN5_DEFAULT   0x00000004UL

Mode DEFAULT for AGC_PGACODE0

Definition at line 850 of file efr32bg21_agc.h.

#define _AGC_PGACODE0_PGAGAIN5_MASK   0xF0000UL

Bit mask for AGC_PGAGAIN5

Definition at line 849 of file efr32bg21_agc.h.

#define _AGC_PGACODE0_PGAGAIN5_SHIFT   16

Shift value for AGC_PGAGAIN5

Definition at line 848 of file efr32bg21_agc.h.

#define _AGC_PGACODE0_PGAGAIN6_DEFAULT   0x00000005UL

Mode DEFAULT for AGC_PGACODE0

Definition at line 854 of file efr32bg21_agc.h.

#define _AGC_PGACODE0_PGAGAIN6_MASK   0xF00000UL

Bit mask for AGC_PGAGAIN6

Definition at line 853 of file efr32bg21_agc.h.

#define _AGC_PGACODE0_PGAGAIN6_SHIFT   20

Shift value for AGC_PGAGAIN6

Definition at line 852 of file efr32bg21_agc.h.

#define _AGC_PGACODE0_PGAGAIN7_DEFAULT   0x00000006UL

Mode DEFAULT for AGC_PGACODE0

Definition at line 858 of file efr32bg21_agc.h.

#define _AGC_PGACODE0_PGAGAIN7_MASK   0xF000000UL

Bit mask for AGC_PGAGAIN7

Definition at line 857 of file efr32bg21_agc.h.

#define _AGC_PGACODE0_PGAGAIN7_SHIFT   24

Shift value for AGC_PGAGAIN7

Definition at line 856 of file efr32bg21_agc.h.

#define _AGC_PGACODE0_PGAGAIN8_DEFAULT   0x00000007UL

Mode DEFAULT for AGC_PGACODE0

Definition at line 862 of file efr32bg21_agc.h.

#define _AGC_PGACODE0_PGAGAIN8_MASK   0xF0000000UL

Bit mask for AGC_PGAGAIN8

Definition at line 861 of file efr32bg21_agc.h.

#define _AGC_PGACODE0_PGAGAIN8_SHIFT   28

Shift value for AGC_PGAGAIN8

Definition at line 860 of file efr32bg21_agc.h.

#define _AGC_PGACODE0_RESETVALUE   0x76543210UL

Default value for AGC_PGACODE0

Definition at line 830 of file efr32bg21_agc.h.

#define _AGC_PGACODE1_MASK   0x00000FFFUL

Mask for AGC_PGACODE1

Definition at line 867 of file efr32bg21_agc.h.

#define _AGC_PGACODE1_PGAGAIN10_DEFAULT   0x00000009UL

Mode DEFAULT for AGC_PGACODE1

Definition at line 874 of file efr32bg21_agc.h.

#define _AGC_PGACODE1_PGAGAIN10_MASK   0xF0UL

Bit mask for AGC_PGAGAIN10

Definition at line 873 of file efr32bg21_agc.h.

#define _AGC_PGACODE1_PGAGAIN10_SHIFT   4

Shift value for AGC_PGAGAIN10

Definition at line 872 of file efr32bg21_agc.h.

#define _AGC_PGACODE1_PGAGAIN11_DEFAULT   0x0000000AUL

Mode DEFAULT for AGC_PGACODE1

Definition at line 878 of file efr32bg21_agc.h.

#define _AGC_PGACODE1_PGAGAIN11_MASK   0xF00UL

Bit mask for AGC_PGAGAIN11

Definition at line 877 of file efr32bg21_agc.h.

#define _AGC_PGACODE1_PGAGAIN11_SHIFT   8

Shift value for AGC_PGAGAIN11

Definition at line 876 of file efr32bg21_agc.h.

#define _AGC_PGACODE1_PGAGAIN9_DEFAULT   0x00000008UL

Mode DEFAULT for AGC_PGACODE1

Definition at line 870 of file efr32bg21_agc.h.

#define _AGC_PGACODE1_PGAGAIN9_MASK   0xFUL

Bit mask for AGC_PGAGAIN9

Definition at line 869 of file efr32bg21_agc.h.

#define _AGC_PGACODE1_PGAGAIN9_SHIFT   0

Shift value for AGC_PGAGAIN9

Definition at line 868 of file efr32bg21_agc.h.

#define _AGC_PGACODE1_RESETVALUE   0x00000A98UL

Default value for AGC_PGACODE1

Definition at line 866 of file efr32bg21_agc.h.

#define _AGC_PNRFATT0_LNAMIXRFATT1_DEFAULT   0x00000000UL

Mode DEFAULT for AGC_PNRFATT0

Definition at line 718 of file efr32bg21_agc.h.

#define _AGC_PNRFATT0_LNAMIXRFATT1_MASK   0x3FUL

Bit mask for AGC_LNAMIXRFATT1

Definition at line 717 of file efr32bg21_agc.h.

#define _AGC_PNRFATT0_LNAMIXRFATT1_SHIFT   0

Shift value for AGC_LNAMIXRFATT1

Definition at line 716 of file efr32bg21_agc.h.

#define _AGC_PNRFATT0_LNAMIXRFATT2_DEFAULT   0x00000001UL

Mode DEFAULT for AGC_PNRFATT0

Definition at line 722 of file efr32bg21_agc.h.

#define _AGC_PNRFATT0_LNAMIXRFATT2_MASK   0xFC0UL

Bit mask for AGC_LNAMIXRFATT2

Definition at line 721 of file efr32bg21_agc.h.

#define _AGC_PNRFATT0_LNAMIXRFATT2_SHIFT   6

Shift value for AGC_LNAMIXRFATT2

Definition at line 720 of file efr32bg21_agc.h.

#define _AGC_PNRFATT0_LNAMIXRFATT3_DEFAULT   0x00000002UL

Mode DEFAULT for AGC_PNRFATT0

Definition at line 726 of file efr32bg21_agc.h.

#define _AGC_PNRFATT0_LNAMIXRFATT3_MASK   0x3F000UL

Bit mask for AGC_LNAMIXRFATT3

Definition at line 725 of file efr32bg21_agc.h.

#define _AGC_PNRFATT0_LNAMIXRFATT3_SHIFT   12

Shift value for AGC_LNAMIXRFATT3

Definition at line 724 of file efr32bg21_agc.h.

#define _AGC_PNRFATT0_LNAMIXRFATT4_DEFAULT   0x00000004UL

Mode DEFAULT for AGC_PNRFATT0

Definition at line 730 of file efr32bg21_agc.h.

#define _AGC_PNRFATT0_LNAMIXRFATT4_MASK   0xFC0000UL

Bit mask for AGC_LNAMIXRFATT4

Definition at line 729 of file efr32bg21_agc.h.

#define _AGC_PNRFATT0_LNAMIXRFATT4_SHIFT   18

Shift value for AGC_LNAMIXRFATT4

Definition at line 728 of file efr32bg21_agc.h.

#define _AGC_PNRFATT0_LNAMIXRFATT5_DEFAULT   0x00000006UL

Mode DEFAULT for AGC_PNRFATT0

Definition at line 734 of file efr32bg21_agc.h.

#define _AGC_PNRFATT0_LNAMIXRFATT5_MASK   0x3F000000UL

Bit mask for AGC_LNAMIXRFATT5

Definition at line 733 of file efr32bg21_agc.h.

#define _AGC_PNRFATT0_LNAMIXRFATT5_SHIFT   24

Shift value for AGC_LNAMIXRFATT5

Definition at line 732 of file efr32bg21_agc.h.

#define _AGC_PNRFATT0_MASK   0x3FFFFFFFUL

Mask for AGC_PNRFATT0

Definition at line 715 of file efr32bg21_agc.h.

#define _AGC_PNRFATT0_RESETVALUE   0x06102040UL

Default value for AGC_PNRFATT0

Definition at line 714 of file efr32bg21_agc.h.

#define _AGC_PNRFATT1_LNAMIXRFATT10_DEFAULT   0x00000018UL

Mode DEFAULT for AGC_PNRFATT1

Definition at line 758 of file efr32bg21_agc.h.

#define _AGC_PNRFATT1_LNAMIXRFATT10_MASK   0x3F000000UL

Bit mask for AGC_LNAMIXRFATT10

Definition at line 757 of file efr32bg21_agc.h.

#define _AGC_PNRFATT1_LNAMIXRFATT10_SHIFT   24

Shift value for AGC_LNAMIXRFATT10

Definition at line 756 of file efr32bg21_agc.h.

#define _AGC_PNRFATT1_LNAMIXRFATT6_DEFAULT   0x00000008UL

Mode DEFAULT for AGC_PNRFATT1

Definition at line 742 of file efr32bg21_agc.h.

#define _AGC_PNRFATT1_LNAMIXRFATT6_MASK   0x3FUL

Bit mask for AGC_LNAMIXRFATT6

Definition at line 741 of file efr32bg21_agc.h.

#define _AGC_PNRFATT1_LNAMIXRFATT6_SHIFT   0

Shift value for AGC_LNAMIXRFATT6

Definition at line 740 of file efr32bg21_agc.h.

#define _AGC_PNRFATT1_LNAMIXRFATT7_DEFAULT   0x0000000BUL

Mode DEFAULT for AGC_PNRFATT1

Definition at line 746 of file efr32bg21_agc.h.

#define _AGC_PNRFATT1_LNAMIXRFATT7_MASK   0xFC0UL

Bit mask for AGC_LNAMIXRFATT7

Definition at line 745 of file efr32bg21_agc.h.

#define _AGC_PNRFATT1_LNAMIXRFATT7_SHIFT   6

Shift value for AGC_LNAMIXRFATT7

Definition at line 744 of file efr32bg21_agc.h.

#define _AGC_PNRFATT1_LNAMIXRFATT8_DEFAULT   0x0000000FUL

Mode DEFAULT for AGC_PNRFATT1

Definition at line 750 of file efr32bg21_agc.h.

#define _AGC_PNRFATT1_LNAMIXRFATT8_MASK   0x3F000UL

Bit mask for AGC_LNAMIXRFATT8

Definition at line 749 of file efr32bg21_agc.h.

#define _AGC_PNRFATT1_LNAMIXRFATT8_SHIFT   12

Shift value for AGC_LNAMIXRFATT8

Definition at line 748 of file efr32bg21_agc.h.

#define _AGC_PNRFATT1_LNAMIXRFATT9_DEFAULT   0x00000012UL

Mode DEFAULT for AGC_PNRFATT1

Definition at line 754 of file efr32bg21_agc.h.

#define _AGC_PNRFATT1_LNAMIXRFATT9_MASK   0xFC0000UL

Bit mask for AGC_LNAMIXRFATT9

Definition at line 753 of file efr32bg21_agc.h.

#define _AGC_PNRFATT1_LNAMIXRFATT9_SHIFT   18

Shift value for AGC_LNAMIXRFATT9

Definition at line 752 of file efr32bg21_agc.h.

#define _AGC_PNRFATT1_MASK   0x3FFFFFFFUL

Mask for AGC_PNRFATT1

Definition at line 739 of file efr32bg21_agc.h.

#define _AGC_PNRFATT1_RESETVALUE   0x1848F2C8UL

Default value for AGC_PNRFATT1

Definition at line 738 of file efr32bg21_agc.h.

#define _AGC_PNRFATT2_LNAMIXRFATT11_DEFAULT   0x0000001FUL

Mode DEFAULT for AGC_PNRFATT2

Definition at line 766 of file efr32bg21_agc.h.

#define _AGC_PNRFATT2_LNAMIXRFATT11_MASK   0x3FUL

Bit mask for AGC_LNAMIXRFATT11

Definition at line 765 of file efr32bg21_agc.h.

#define _AGC_PNRFATT2_LNAMIXRFATT11_SHIFT   0

Shift value for AGC_LNAMIXRFATT11

Definition at line 764 of file efr32bg21_agc.h.

#define _AGC_PNRFATT2_LNAMIXRFATT12_DEFAULT   0x00000020UL

Mode DEFAULT for AGC_PNRFATT2

Definition at line 770 of file efr32bg21_agc.h.

#define _AGC_PNRFATT2_LNAMIXRFATT12_MASK   0xFC0UL

Bit mask for AGC_LNAMIXRFATT12

Definition at line 769 of file efr32bg21_agc.h.

#define _AGC_PNRFATT2_LNAMIXRFATT12_SHIFT   6

Shift value for AGC_LNAMIXRFATT12

Definition at line 768 of file efr32bg21_agc.h.

#define _AGC_PNRFATT2_LNAMIXRFATT13_DEFAULT   0x0000002EUL

Mode DEFAULT for AGC_PNRFATT2

Definition at line 774 of file efr32bg21_agc.h.

#define _AGC_PNRFATT2_LNAMIXRFATT13_MASK   0x3F000UL

Bit mask for AGC_LNAMIXRFATT13

Definition at line 773 of file efr32bg21_agc.h.

#define _AGC_PNRFATT2_LNAMIXRFATT13_SHIFT   12

Shift value for AGC_LNAMIXRFATT13

Definition at line 772 of file efr32bg21_agc.h.

#define _AGC_PNRFATT2_LNAMIXRFATT14_DEFAULT   0x0000003DUL

Mode DEFAULT for AGC_PNRFATT2

Definition at line 778 of file efr32bg21_agc.h.

#define _AGC_PNRFATT2_LNAMIXRFATT14_MASK   0xFC0000UL

Bit mask for AGC_LNAMIXRFATT14

Definition at line 777 of file efr32bg21_agc.h.

#define _AGC_PNRFATT2_LNAMIXRFATT14_SHIFT   18

Shift value for AGC_LNAMIXRFATT14

Definition at line 776 of file efr32bg21_agc.h.

#define _AGC_PNRFATT2_MASK   0x00FFFFFFUL

Mask for AGC_PNRFATT2

Definition at line 763 of file efr32bg21_agc.h.

#define _AGC_PNRFATT2_RESETVALUE   0x00F6E81FUL

Default value for AGC_PNRFATT2

Definition at line 762 of file efr32bg21_agc.h.

#define _AGC_RSSI_MASK   0x0000FFC0UL

Mask for AGC_RSSI

Definition at line 260 of file efr32bg21_agc.h.

#define _AGC_RSSI_RESETVALUE   0x00008000UL

Default value for AGC_RSSI

Definition at line 259 of file efr32bg21_agc.h.

#define _AGC_RSSI_RSSIFRAC_DEFAULT   0x00000000UL

Mode DEFAULT for AGC_RSSI

Definition at line 263 of file efr32bg21_agc.h.

#define _AGC_RSSI_RSSIFRAC_MASK   0xC0UL

Bit mask for AGC_RSSIFRAC

Definition at line 262 of file efr32bg21_agc.h.

#define _AGC_RSSI_RSSIFRAC_SHIFT   6

Shift value for AGC_RSSIFRAC

Definition at line 261 of file efr32bg21_agc.h.

#define _AGC_RSSI_RSSIINT_DEFAULT   0x00000080UL

Mode DEFAULT for AGC_RSSI

Definition at line 267 of file efr32bg21_agc.h.

#define _AGC_RSSI_RSSIINT_MASK   0xFF00UL

Bit mask for AGC_RSSIINT

Definition at line 266 of file efr32bg21_agc.h.

#define _AGC_RSSI_RSSIINT_SHIFT   8

Shift value for AGC_RSSIINT

Definition at line 265 of file efr32bg21_agc.h.

#define _AGC_RSSISTEPTHR_DEMODRESTARTPER_DEFAULT   0x00000000UL

Mode DEFAULT for AGC_RSSISTEPTHR

Definition at line 504 of file efr32bg21_agc.h.

#define _AGC_RSSISTEPTHR_DEMODRESTARTPER_MASK   0x1E0000UL

Bit mask for AGC_DEMODRESTARTPER

Definition at line 503 of file efr32bg21_agc.h.

#define _AGC_RSSISTEPTHR_DEMODRESTARTPER_SHIFT   17

Shift value for AGC_DEMODRESTARTPER

Definition at line 502 of file efr32bg21_agc.h.

#define _AGC_RSSISTEPTHR_DEMODRESTARTTHR_DEFAULT   0x00000000UL

Mode DEFAULT for AGC_RSSISTEPTHR

Definition at line 508 of file efr32bg21_agc.h.

#define _AGC_RSSISTEPTHR_DEMODRESTARTTHR_MASK   0x1FE00000UL

Bit mask for AGC_DEMODRESTARTTHR

Definition at line 507 of file efr32bg21_agc.h.

#define _AGC_RSSISTEPTHR_DEMODRESTARTTHR_SHIFT   21

Shift value for AGC_DEMODRESTARTTHR

Definition at line 506 of file efr32bg21_agc.h.

#define _AGC_RSSISTEPTHR_MASK   0x3FFFFFFFUL

Mask for AGC_RSSISTEPTHR

Definition at line 488 of file efr32bg21_agc.h.

#define _AGC_RSSISTEPTHR_NEGSTEPTHR_DEFAULT   0x00000000UL

Mode DEFAULT for AGC_RSSISTEPTHR

Definition at line 495 of file efr32bg21_agc.h.

#define _AGC_RSSISTEPTHR_NEGSTEPTHR_MASK   0xFF00UL

Bit mask for AGC_NEGSTEPTHR

Definition at line 494 of file efr32bg21_agc.h.

#define _AGC_RSSISTEPTHR_NEGSTEPTHR_SHIFT   8

Shift value for AGC_NEGSTEPTHR

Definition at line 493 of file efr32bg21_agc.h.

#define _AGC_RSSISTEPTHR_POSSTEPTHR_DEFAULT   0x00000000UL

Mode DEFAULT for AGC_RSSISTEPTHR

Definition at line 491 of file efr32bg21_agc.h.

#define _AGC_RSSISTEPTHR_POSSTEPTHR_MASK   0xFFUL

Bit mask for AGC_POSSTEPTHR

Definition at line 490 of file efr32bg21_agc.h.

#define _AGC_RSSISTEPTHR_POSSTEPTHR_SHIFT   0

Shift value for AGC_POSSTEPTHR

Definition at line 489 of file efr32bg21_agc.h.

#define _AGC_RSSISTEPTHR_RESETVALUE   0x00000000UL

Default value for AGC_RSSISTEPTHR

Definition at line 487 of file efr32bg21_agc.h.

#define _AGC_RSSISTEPTHR_RSSIFAST_DEFAULT   0x00000000UL

Mode DEFAULT for AGC_RSSISTEPTHR

Definition at line 513 of file efr32bg21_agc.h.

#define _AGC_RSSISTEPTHR_RSSIFAST_MASK   0x20000000UL

Bit mask for AGC_RSSIFAST

Definition at line 512 of file efr32bg21_agc.h.

#define _AGC_RSSISTEPTHR_RSSIFAST_SHIFT   29

Shift value for AGC_RSSIFAST

Definition at line 511 of file efr32bg21_agc.h.

#define _AGC_RSSISTEPTHR_STEPPER_DEFAULT   0x00000000UL

Mode DEFAULT for AGC_RSSISTEPTHR

Definition at line 500 of file efr32bg21_agc.h.

#define _AGC_RSSISTEPTHR_STEPPER_MASK   0x10000UL

Bit mask for AGC_STEPPER

Definition at line 499 of file efr32bg21_agc.h.

#define _AGC_RSSISTEPTHR_STEPPER_SHIFT   16

Shift value for AGC_STEPPER

Definition at line 498 of file efr32bg21_agc.h.

#define _AGC_STATUS0_ADCINDEX_DEFAULT   0x00000000UL

Mode DEFAULT for AGC_STATUS0

Definition at line 255 of file efr32bg21_agc.h.

#define _AGC_STATUS0_ADCINDEX_MASK   0x1800000UL

Bit mask for AGC_ADCINDEX

Definition at line 254 of file efr32bg21_agc.h.

#define _AGC_STATUS0_ADCINDEX_SHIFT   23

Shift value for AGC_ADCINDEX

Definition at line 253 of file efr32bg21_agc.h.

#define _AGC_STATUS0_CCA_DEFAULT   0x00000000UL

Mode DEFAULT for AGC_STATUS0

Definition at line 234 of file efr32bg21_agc.h.

#define _AGC_STATUS0_CCA_MASK   0x200UL

Bit mask for AGC_CCA

Definition at line 233 of file efr32bg21_agc.h.

#define _AGC_STATUS0_CCA_SHIFT   9

Shift value for AGC_CCA

Definition at line 232 of file efr32bg21_agc.h.

#define _AGC_STATUS0_GAININDEX_DEFAULT   0x00000000UL

Mode DEFAULT for AGC_STATUS0

Definition at line 214 of file efr32bg21_agc.h.

#define _AGC_STATUS0_GAININDEX_MASK   0x3FUL

Bit mask for AGC_GAININDEX

Definition at line 213 of file efr32bg21_agc.h.

#define _AGC_STATUS0_GAININDEX_SHIFT   0

Shift value for AGC_GAININDEX

Definition at line 212 of file efr32bg21_agc.h.

#define _AGC_STATUS0_GAINOK_DEFAULT   0x00000000UL

Mode DEFAULT for AGC_STATUS0

Definition at line 239 of file efr32bg21_agc.h.

#define _AGC_STATUS0_GAINOK_MASK   0x400UL

Bit mask for AGC_GAINOK

Definition at line 238 of file efr32bg21_agc.h.

#define _AGC_STATUS0_GAINOK_SHIFT   10

Shift value for AGC_GAINOK

Definition at line 237 of file efr32bg21_agc.h.

#define _AGC_STATUS0_IFPKDHILAT_DEFAULT   0x00000000UL

Mode DEFAULT for AGC_STATUS0

Definition at line 229 of file efr32bg21_agc.h.

#define _AGC_STATUS0_IFPKDHILAT_MASK   0x100UL

Bit mask for AGC_IFPKDHILAT

Definition at line 228 of file efr32bg21_agc.h.

#define _AGC_STATUS0_IFPKDHILAT_SHIFT   8

Shift value for AGC_IFPKDHILAT

Definition at line 227 of file efr32bg21_agc.h.

#define _AGC_STATUS0_IFPKDLOLAT_DEFAULT   0x00000000UL

Mode DEFAULT for AGC_STATUS0

Definition at line 224 of file efr32bg21_agc.h.

#define _AGC_STATUS0_IFPKDLOLAT_MASK   0x80UL

Bit mask for AGC_IFPKDLOLAT

Definition at line 223 of file efr32bg21_agc.h.

#define _AGC_STATUS0_IFPKDLOLAT_SHIFT   7

Shift value for AGC_IFPKDLOLAT

Definition at line 222 of file efr32bg21_agc.h.

#define _AGC_STATUS0_LNAINDEX_DEFAULT   0x00000000UL

Mode DEFAULT for AGC_STATUS0

Definition at line 247 of file efr32bg21_agc.h.

#define _AGC_STATUS0_LNAINDEX_MASK   0x78000UL

Bit mask for AGC_LNAINDEX

Definition at line 246 of file efr32bg21_agc.h.

#define _AGC_STATUS0_LNAINDEX_SHIFT   15

Shift value for AGC_LNAINDEX

Definition at line 245 of file efr32bg21_agc.h.

#define _AGC_STATUS0_MASK   0x01FFFFFFUL

Mask for AGC_STATUS0

Definition at line 211 of file efr32bg21_agc.h.

#define _AGC_STATUS0_PGAINDEX_DEFAULT   0x00000000UL

Mode DEFAULT for AGC_STATUS0

Definition at line 243 of file efr32bg21_agc.h.

#define _AGC_STATUS0_PGAINDEX_MASK   0x7800UL

Bit mask for AGC_PGAINDEX

Definition at line 242 of file efr32bg21_agc.h.

#define _AGC_STATUS0_PGAINDEX_SHIFT   11

Shift value for AGC_PGAINDEX

Definition at line 241 of file efr32bg21_agc.h.

#define _AGC_STATUS0_PNINDEX_DEFAULT   0x00000000UL

Mode DEFAULT for AGC_STATUS0

Definition at line 251 of file efr32bg21_agc.h.

#define _AGC_STATUS0_PNINDEX_MASK   0x780000UL

Bit mask for AGC_PNINDEX

Definition at line 250 of file efr32bg21_agc.h.

#define _AGC_STATUS0_PNINDEX_SHIFT   19

Shift value for AGC_PNINDEX

Definition at line 249 of file efr32bg21_agc.h.

#define _AGC_STATUS0_RESETVALUE   0x00000000UL

Default value for AGC_STATUS0

Definition at line 210 of file efr32bg21_agc.h.

#define _AGC_STATUS0_RFPKDLAT_DEFAULT   0x00000000UL

Mode DEFAULT for AGC_STATUS0

Definition at line 219 of file efr32bg21_agc.h.

#define _AGC_STATUS0_RFPKDLAT_MASK   0x40UL

Bit mask for AGC_RFPKDLAT

Definition at line 218 of file efr32bg21_agc.h.

#define _AGC_STATUS0_RFPKDLAT_SHIFT   6

Shift value for AGC_RFPKDLAT

Definition at line 217 of file efr32bg21_agc.h.

#define _AGC_STEPDWN_MASK   0x0003FFFFUL

Mask for AGC_STEPDWN

Definition at line 662 of file efr32bg21_agc.h.

#define _AGC_STEPDWN_RESETVALUE   0x00036D11UL

Default value for AGC_STEPDWN

Definition at line 661 of file efr32bg21_agc.h.

#define _AGC_STEPDWN_STEPDWN0_DEFAULT   0x00000001UL

Mode DEFAULT for AGC_STEPDWN

Definition at line 665 of file efr32bg21_agc.h.

#define _AGC_STEPDWN_STEPDWN0_MASK   0x7UL

Bit mask for AGC_STEPDWN0

Definition at line 664 of file efr32bg21_agc.h.

#define _AGC_STEPDWN_STEPDWN0_SHIFT   0

Shift value for AGC_STEPDWN0

Definition at line 663 of file efr32bg21_agc.h.

#define _AGC_STEPDWN_STEPDWN1_DEFAULT   0x00000002UL

Mode DEFAULT for AGC_STEPDWN

Definition at line 669 of file efr32bg21_agc.h.

#define _AGC_STEPDWN_STEPDWN1_MASK   0x38UL

Bit mask for AGC_STEPDWN1

Definition at line 668 of file efr32bg21_agc.h.

#define _AGC_STEPDWN_STEPDWN1_SHIFT   3

Shift value for AGC_STEPDWN1

Definition at line 667 of file efr32bg21_agc.h.

#define _AGC_STEPDWN_STEPDWN2_DEFAULT   0x00000004UL

Mode DEFAULT for AGC_STEPDWN

Definition at line 673 of file efr32bg21_agc.h.

#define _AGC_STEPDWN_STEPDWN2_MASK   0x1C0UL

Bit mask for AGC_STEPDWN2

Definition at line 672 of file efr32bg21_agc.h.

#define _AGC_STEPDWN_STEPDWN2_SHIFT   6

Shift value for AGC_STEPDWN2

Definition at line 671 of file efr32bg21_agc.h.

#define _AGC_STEPDWN_STEPDWN3_DEFAULT   0x00000006UL

Mode DEFAULT for AGC_STEPDWN

Definition at line 677 of file efr32bg21_agc.h.

#define _AGC_STEPDWN_STEPDWN3_MASK   0xE00UL

Bit mask for AGC_STEPDWN3

Definition at line 676 of file efr32bg21_agc.h.

#define _AGC_STEPDWN_STEPDWN3_SHIFT   9

Shift value for AGC_STEPDWN3

Definition at line 675 of file efr32bg21_agc.h.

#define _AGC_STEPDWN_STEPDWN4_DEFAULT   0x00000006UL

Mode DEFAULT for AGC_STEPDWN

Definition at line 681 of file efr32bg21_agc.h.

#define _AGC_STEPDWN_STEPDWN4_MASK   0x7000UL

Bit mask for AGC_STEPDWN4

Definition at line 680 of file efr32bg21_agc.h.

#define _AGC_STEPDWN_STEPDWN4_SHIFT   12

Shift value for AGC_STEPDWN4

Definition at line 679 of file efr32bg21_agc.h.

#define _AGC_STEPDWN_STEPDWN5_DEFAULT   0x00000006UL

Mode DEFAULT for AGC_STEPDWN

Definition at line 685 of file efr32bg21_agc.h.

#define _AGC_STEPDWN_STEPDWN5_MASK   0x38000UL

Bit mask for AGC_STEPDWN5

Definition at line 684 of file efr32bg21_agc.h.

#define _AGC_STEPDWN_STEPDWN5_SHIFT   15

Shift value for AGC_STEPDWN5

Definition at line 683 of file efr32bg21_agc.h.

#define AGC_AGCPERIOD_MAXHICNTTHD_DEFAULT   (_AGC_AGCPERIOD_MAXHICNTTHD_DEFAULT << 16)

Shifted mode DEFAULT for AGC_AGCPERIOD

Definition at line 626 of file efr32bg21_agc.h.

#define AGC_AGCPERIOD_PERIODHI_DEFAULT   (_AGC_AGCPERIOD_PERIODHI_DEFAULT << 0)

Shifted mode DEFAULT for AGC_AGCPERIOD

Definition at line 618 of file efr32bg21_agc.h.

#define AGC_AGCPERIOD_PERIODLO_DEFAULT   (_AGC_AGCPERIOD_PERIODLO_DEFAULT << 8)

Shifted mode DEFAULT for AGC_AGCPERIOD

Definition at line 622 of file efr32bg21_agc.h.

#define AGC_AGCPERIOD_SETTLETIMEIF_DEFAULT   (_AGC_AGCPERIOD_SETTLETIMEIF_DEFAULT << 24)

Shifted mode DEFAULT for AGC_AGCPERIOD

Definition at line 630 of file efr32bg21_agc.h.

#define AGC_AGCPERIOD_SETTLETIMERF_DEFAULT   (_AGC_AGCPERIOD_SETTLETIMERF_DEFAULT << 28)

Shifted mode DEFAULT for AGC_AGCPERIOD

Definition at line 634 of file efr32bg21_agc.h.

#define AGC_CTRL0_ADCATTENCODE_DEFAULT   (_AGC_CTRL0_ADCATTENCODE_DEFAULT << 25)

Shifted mode DEFAULT for AGC_CTRL0

Definition at line 332 of file efr32bg21_agc.h.

#define AGC_CTRL0_ADCATTENMODE   (0x1UL << 23)

ADC Attenuator mode

Definition at line 320 of file efr32bg21_agc.h.

#define AGC_CTRL0_ADCATTENMODE_DEFAULT   (_AGC_CTRL0_ADCATTENMODE_DEFAULT << 23)

Shifted mode DEFAULT for AGC_CTRL0

Definition at line 326 of file efr32bg21_agc.h.

#define AGC_CTRL0_ADCATTENMODE_DISABLE   (_AGC_CTRL0_ADCATTENMODE_DISABLE << 23)

Shifted mode DISABLE for AGC_CTRL0

Definition at line 327 of file efr32bg21_agc.h.

#define AGC_CTRL0_ADCATTENMODE_NOTMAXGAIN   (_AGC_CTRL0_ADCATTENMODE_NOTMAXGAIN << 23)

Shifted mode NOTMAXGAIN for AGC_CTRL0

Definition at line 328 of file efr32bg21_agc.h.

#define AGC_CTRL0_AGCCLKUNDIVREQ   (0x1UL << 21)

Enable CLKUNDIV to AGC

Definition at line 310 of file efr32bg21_agc.h.

#define AGC_CTRL0_AGCCLKUNDIVREQ_DEFAULT   (_AGC_CTRL0_AGCCLKUNDIVREQ_DEFAULT << 21)

Shifted mode DEFAULT for AGC_CTRL0

Definition at line 314 of file efr32bg21_agc.h.

#define AGC_CTRL0_AGCRST   (0x1UL << 31)

AGC reset

Definition at line 353 of file efr32bg21_agc.h.

#define AGC_CTRL0_AGCRST_DEFAULT   (_AGC_CTRL0_AGCRST_DEFAULT << 31)

Shifted mode DEFAULT for AGC_CTRL0

Definition at line 357 of file efr32bg21_agc.h.

#define AGC_CTRL0_DISCFLOOPADJ   (0x1UL << 19)

Disable gain adjustment by CFLOOP

Definition at line 305 of file efr32bg21_agc.h.

#define AGC_CTRL0_DISCFLOOPADJ_DEFAULT   (_AGC_CTRL0_DISCFLOOPADJ_DEFAULT << 19)

Shifted mode DEFAULT for AGC_CTRL0

Definition at line 309 of file efr32bg21_agc.h.

#define AGC_CTRL0_DISPNDWNCOMP   (0x1UL << 30)

Disable PN gain decrease compensation

Definition at line 348 of file efr32bg21_agc.h.

#define AGC_CTRL0_DISPNDWNCOMP_DEFAULT   (_AGC_CTRL0_DISPNDWNCOMP_DEFAULT << 30)

Shifted mode DEFAULT for AGC_CTRL0

Definition at line 352 of file efr32bg21_agc.h.

#define AGC_CTRL0_DISPNGAINUP   (0x1UL << 29)

Disable PN gain increase

Definition at line 343 of file efr32bg21_agc.h.

#define AGC_CTRL0_DISPNGAINUP_DEFAULT   (_AGC_CTRL0_DISPNGAINUP_DEFAULT << 29)

Shifted mode DEFAULT for AGC_CTRL0

Definition at line 347 of file efr32bg21_agc.h.

#define AGC_CTRL0_DISRESETCHPWR   (0x1UL << 22)

Disable Reset of CHPWR

Definition at line 315 of file efr32bg21_agc.h.

#define AGC_CTRL0_DISRESETCHPWR_DEFAULT   (_AGC_CTRL0_DISRESETCHPWR_DEFAULT << 22)

Shifted mode DEFAULT for AGC_CTRL0

Definition at line 319 of file efr32bg21_agc.h.

#define AGC_CTRL0_DSADISCFLOOP   (0x1UL << 28)

Disable channel filter loop

Definition at line 338 of file efr32bg21_agc.h.

#define AGC_CTRL0_DSADISCFLOOP_DEFAULT   (_AGC_CTRL0_DSADISCFLOOP_DEFAULT << 28)

Shifted mode DEFAULT for AGC_CTRL0

Definition at line 342 of file efr32bg21_agc.h.

#define AGC_CTRL0_ENRSSIRESET   (0x1UL << 27)

Enables reset of RSSI and CCA

Definition at line 333 of file efr32bg21_agc.h.

#define AGC_CTRL0_ENRSSIRESET_DEFAULT   (_AGC_CTRL0_ENRSSIRESET_DEFAULT << 27)

Shifted mode DEFAULT for AGC_CTRL0

Definition at line 337 of file efr32bg21_agc.h.

#define AGC_CTRL0_MODE_CONT   (_AGC_CTRL0_MODE_CONT << 8)

Shifted mode CONT for AGC_CTRL0

Definition at line 297 of file efr32bg21_agc.h.

#define AGC_CTRL0_MODE_DEFAULT   (_AGC_CTRL0_MODE_DEFAULT << 8)

Shifted mode DEFAULT for AGC_CTRL0

Definition at line 296 of file efr32bg21_agc.h.

#define AGC_CTRL0_MODE_LOCKDSA   (_AGC_CTRL0_MODE_LOCKDSA << 8)

Shifted mode LOCKDSA for AGC_CTRL0

Definition at line 300 of file efr32bg21_agc.h.

#define AGC_CTRL0_MODE_LOCKFRAMEDET   (_AGC_CTRL0_MODE_LOCKFRAMEDET << 8)

Shifted mode LOCKFRAMEDET for AGC_CTRL0

Definition at line 299 of file efr32bg21_agc.h.

#define AGC_CTRL0_MODE_LOCKPREDET   (_AGC_CTRL0_MODE_LOCKPREDET << 8)

Shifted mode LOCKPREDET for AGC_CTRL0

Definition at line 298 of file efr32bg21_agc.h.

#define AGC_CTRL0_PWRTARGET_DEFAULT   (_AGC_CTRL0_PWRTARGET_DEFAULT << 0)

Shifted mode DEFAULT for AGC_CTRL0

Definition at line 288 of file efr32bg21_agc.h.

#define AGC_CTRL0_RSSISHIFT_DEFAULT   (_AGC_CTRL0_RSSISHIFT_DEFAULT << 11)

Shifted mode DEFAULT for AGC_CTRL0

Definition at line 304 of file efr32bg21_agc.h.

#define AGC_CTRL1_CCATHRSH_DEFAULT   (_AGC_CTRL1_CCATHRSH_DEFAULT << 0)

Shifted mode DEFAULT for AGC_CTRL1

Definition at line 365 of file efr32bg21_agc.h.

#define AGC_CTRL1_PWRPERIOD_DEFAULT   (_AGC_CTRL1_PWRPERIOD_DEFAULT << 12)

Shifted mode DEFAULT for AGC_CTRL1

Definition at line 373 of file efr32bg21_agc.h.

#define AGC_CTRL1_RSSIPERIOD_DEFAULT   (_AGC_CTRL1_RSSIPERIOD_DEFAULT << 8)

Shifted mode DEFAULT for AGC_CTRL1

Definition at line 369 of file efr32bg21_agc.h.

#define AGC_CTRL1_SUBDEN_DEFAULT   (_AGC_CTRL1_SUBDEN_DEFAULT << 21)

Shifted mode DEFAULT for AGC_CTRL1

Definition at line 386 of file efr32bg21_agc.h.

#define AGC_CTRL1_SUBINT_DEFAULT   (_AGC_CTRL1_SUBINT_DEFAULT << 26)

Shifted mode DEFAULT for AGC_CTRL1

Definition at line 390 of file efr32bg21_agc.h.

#define AGC_CTRL1_SUBNUM_DEFAULT   (_AGC_CTRL1_SUBNUM_DEFAULT << 16)

Shifted mode DEFAULT for AGC_CTRL1

Definition at line 382 of file efr32bg21_agc.h.

#define AGC_CTRL1_SUBPERIOD   (0x1UL << 15)

Subperiod

Definition at line 374 of file efr32bg21_agc.h.

#define AGC_CTRL1_SUBPERIOD_DEFAULT   (_AGC_CTRL1_SUBPERIOD_DEFAULT << 15)

Shifted mode DEFAULT for AGC_CTRL1

Definition at line 378 of file efr32bg21_agc.h.

#define AGC_CTRL2_DISRFPKD   (0x1UL << 31)

Disable RF PEAKDET

Definition at line 442 of file efr32bg21_agc.h.

#define AGC_CTRL2_DISRFPKD_DEFAULT   (_AGC_CTRL2_DISRFPKD_DEFAULT << 31)

Shifted mode DEFAULT for AGC_CTRL2

Definition at line 446 of file efr32bg21_agc.h.

#define AGC_CTRL2_DMASEL   (0x1UL << 0)

DMA select

Definition at line 395 of file efr32bg21_agc.h.

#define AGC_CTRL2_DMASEL_DEFAULT   (_AGC_CTRL2_DMASEL_DEFAULT << 0)

Shifted mode DEFAULT for AGC_CTRL2

Definition at line 401 of file efr32bg21_agc.h.

#define AGC_CTRL2_DMASEL_GAIN   (_AGC_CTRL2_DMASEL_GAIN << 0)

Shifted mode GAIN for AGC_CTRL2

Definition at line 403 of file efr32bg21_agc.h.

#define AGC_CTRL2_DMASEL_RSSI   (_AGC_CTRL2_DMASEL_RSSI << 0)

Shifted mode RSSI for AGC_CTRL2

Definition at line 402 of file efr32bg21_agc.h.

#define AGC_CTRL2_PRSDEBUGEN   (0x1UL << 30)

PRS Debug Enable

Definition at line 437 of file efr32bg21_agc.h.

#define AGC_CTRL2_PRSDEBUGEN_DEFAULT   (_AGC_CTRL2_PRSDEBUGEN_DEFAULT << 30)

Shifted mode DEFAULT for AGC_CTRL2

Definition at line 441 of file efr32bg21_agc.h.

#define AGC_CTRL2_REHICNTTHD_DEFAULT   (_AGC_CTRL2_REHICNTTHD_DEFAULT << 5)

Shifted mode DEFAULT for AGC_CTRL2

Definition at line 416 of file efr32bg21_agc.h.

#define AGC_CTRL2_RELBYCHPWR_DEFAULT   (_AGC_CTRL2_RELBYCHPWR_DEFAULT << 16)

Shifted mode DEFAULT for AGC_CTRL2

Definition at line 428 of file efr32bg21_agc.h.

#define AGC_CTRL2_RELBYCHPWR_LO_CNT   (_AGC_CTRL2_RELBYCHPWR_LO_CNT << 16)

Shifted mode LO_CNT for AGC_CTRL2

Definition at line 429 of file efr32bg21_agc.h.

#define AGC_CTRL2_RELBYCHPWR_LO_CNT_AND_PWR   (_AGC_CTRL2_RELBYCHPWR_LO_CNT_AND_PWR << 16)

Shifted mode LO_CNT_AND_PWR for AGC_CTRL2

Definition at line 432 of file efr32bg21_agc.h.

#define AGC_CTRL2_RELBYCHPWR_LO_CNT_PWR   (_AGC_CTRL2_RELBYCHPWR_LO_CNT_PWR << 16)

Shifted mode LO_CNT_PWR for AGC_CTRL2

Definition at line 431 of file efr32bg21_agc.h.

#define AGC_CTRL2_RELBYCHPWR_PWR   (_AGC_CTRL2_RELBYCHPWR_PWR << 16)

Shifted mode PWR for AGC_CTRL2

Definition at line 430 of file efr32bg21_agc.h.

#define AGC_CTRL2_RELOTHD_DEFAULT   (_AGC_CTRL2_RELOTHD_DEFAULT << 13)

Shifted mode DEFAULT for AGC_CTRL2

Definition at line 420 of file efr32bg21_agc.h.

#define AGC_CTRL2_RELTARGETPWR_DEFAULT   (_AGC_CTRL2_RELTARGETPWR_DEFAULT << 18)

Shifted mode DEFAULT for AGC_CTRL2

Definition at line 436 of file efr32bg21_agc.h.

#define AGC_CTRL2_SAFEMODE   (0x1UL << 1)

AGC safe mode

Definition at line 404 of file efr32bg21_agc.h.

#define AGC_CTRL2_SAFEMODE_DEFAULT   (_AGC_CTRL2_SAFEMODE_DEFAULT << 1)

Shifted mode DEFAULT for AGC_CTRL2

Definition at line 408 of file efr32bg21_agc.h.

#define AGC_CTRL2_SAFEMODETHD_DEFAULT   (_AGC_CTRL2_SAFEMODETHD_DEFAULT << 2)

Shifted mode DEFAULT for AGC_CTRL2

Definition at line 412 of file efr32bg21_agc.h.

#define AGC_CTRL3_IFPKDDEB   (0x1UL << 0)

IF PEAKDET debounce mode enable

Definition at line 451 of file efr32bg21_agc.h.

#define AGC_CTRL3_IFPKDDEB_DEFAULT   (_AGC_CTRL3_IFPKDDEB_DEFAULT << 0)

Shifted mode DEFAULT for AGC_CTRL3

Definition at line 455 of file efr32bg21_agc.h.

#define AGC_CTRL3_IFPKDDEBPRD_DEFAULT   (_AGC_CTRL3_IFPKDDEBPRD_DEFAULT << 3)

Shifted mode DEFAULT for AGC_CTRL3

Definition at line 463 of file efr32bg21_agc.h.

#define AGC_CTRL3_IFPKDDEBRST_DEFAULT   (_AGC_CTRL3_IFPKDDEBRST_DEFAULT << 9)

Shifted mode DEFAULT for AGC_CTRL3

Definition at line 467 of file efr32bg21_agc.h.

#define AGC_CTRL3_IFPKDDEBTHD_DEFAULT   (_AGC_CTRL3_IFPKDDEBTHD_DEFAULT << 1)

Shifted mode DEFAULT for AGC_CTRL3

Definition at line 459 of file efr32bg21_agc.h.

#define AGC_CTRL3_RFPKDDEB   (0x1UL << 13)

RF PEAKDET debounce mode enable

Definition at line 468 of file efr32bg21_agc.h.

#define AGC_CTRL3_RFPKDDEB_DEFAULT   (_AGC_CTRL3_RFPKDDEB_DEFAULT << 13)

Shifted mode DEFAULT for AGC_CTRL3

Definition at line 472 of file efr32bg21_agc.h.

#define AGC_CTRL3_RFPKDDEBPRD_DEFAULT   (_AGC_CTRL3_RFPKDDEBPRD_DEFAULT << 16)

Shifted mode DEFAULT for AGC_CTRL3

Definition at line 480 of file efr32bg21_agc.h.

#define AGC_CTRL3_RFPKDDEBRST_DEFAULT   (_AGC_CTRL3_RFPKDDEBRST_DEFAULT << 22)

Shifted mode DEFAULT for AGC_CTRL3

Definition at line 484 of file efr32bg21_agc.h.

#define AGC_CTRL3_RFPKDDEBTHD_DEFAULT   (_AGC_CTRL3_RFPKDDEBTHD_DEFAULT << 14)

Shifted mode DEFAULT for AGC_CTRL3

Definition at line 476 of file efr32bg21_agc.h.

#define AGC_EN_EN   (0x1UL << 0)

Enable peripheral clock to this module

Definition at line 203 of file efr32bg21_agc.h.

#define AGC_EN_EN_DEFAULT   (_AGC_EN_EN_DEFAULT << 0)

Shifted mode DEFAULT for AGC_EN

Definition at line 207 of file efr32bg21_agc.h.

#define AGC_FRAMERSSI_FRAMERSSIFRAC_DEFAULT   (_AGC_FRAMERSSI_FRAMERSSIFRAC_DEFAULT << 6)

Shifted mode DEFAULT for AGC_FRAMERSSI

Definition at line 276 of file efr32bg21_agc.h.

#define AGC_FRAMERSSI_FRAMERSSIINT_DEFAULT   (_AGC_FRAMERSSI_FRAMERSSIINT_DEFAULT << 8)

Shifted mode DEFAULT for AGC_FRAMERSSI

Definition at line 280 of file efr32bg21_agc.h.

#define AGC_GAINRANGE_BOOSTLNA   (0x1UL << 26)

LNA GAIN BOOST mode

Definition at line 601 of file efr32bg21_agc.h.

#define AGC_GAINRANGE_BOOSTLNA_DEFAULT   (_AGC_GAINRANGE_BOOSTLNA_DEFAULT << 26)

Shifted mode DEFAULT for AGC_GAINRANGE

Definition at line 605 of file efr32bg21_agc.h.

#define AGC_GAINRANGE_GAININCSTEP_DEFAULT   (_AGC_GAINRANGE_GAININCSTEP_DEFAULT << 8)

Shifted mode DEFAULT for AGC_GAINRANGE

Definition at line 588 of file efr32bg21_agc.h.

#define AGC_GAINRANGE_HIPWRTHD_DEFAULT   (_AGC_GAINRANGE_HIPWRTHD_DEFAULT << 20)

Shifted mode DEFAULT for AGC_GAINRANGE

Definition at line 600 of file efr32bg21_agc.h.

#define AGC_GAINRANGE_LATCHEDHISTEP_DEFAULT   (_AGC_GAINRANGE_LATCHEDHISTEP_DEFAULT << 16)

Shifted mode DEFAULT for AGC_GAINRANGE

Definition at line 596 of file efr32bg21_agc.h.

#define AGC_GAINRANGE_LNABWADJ   (0x1UL << 27)

LNA BW ADJUST

Definition at line 606 of file efr32bg21_agc.h.

#define AGC_GAINRANGE_LNABWADJ_DEFAULT   (_AGC_GAINRANGE_LNABWADJ_DEFAULT << 27)

Shifted mode DEFAULT for AGC_GAINRANGE

Definition at line 610 of file efr32bg21_agc.h.

#define AGC_GAINRANGE_LNAINDEXBORDER_DEFAULT   (_AGC_GAINRANGE_LNAINDEXBORDER_DEFAULT << 0)

Shifted mode DEFAULT for AGC_GAINRANGE

Definition at line 580 of file efr32bg21_agc.h.

#define AGC_GAINRANGE_PGAINDEXBORDER_DEFAULT   (_AGC_GAINRANGE_PGAINDEXBORDER_DEFAULT << 4)

Shifted mode DEFAULT for AGC_GAINRANGE

Definition at line 584 of file efr32bg21_agc.h.

#define AGC_GAINRANGE_PNGAINSTEP_DEFAULT   (_AGC_GAINRANGE_PNGAINSTEP_DEFAULT << 12)

Shifted mode DEFAULT for AGC_GAINRANGE

Definition at line 592 of file efr32bg21_agc.h.

#define AGC_GAINSTEPLIM_CFLOOPDEL_DEFAULT   (_AGC_GAINSTEPLIM_CFLOOPDEL_DEFAULT << 5)

Shifted mode DEFAULT for AGC_GAINSTEPLIM

Definition at line 698 of file efr32bg21_agc.h.

#define AGC_GAINSTEPLIM_CFLOOPSTEPMAX_DEFAULT   (_AGC_GAINSTEPLIM_CFLOOPSTEPMAX_DEFAULT << 0)

Shifted mode DEFAULT for AGC_GAINSTEPLIM

Definition at line 694 of file efr32bg21_agc.h.

#define AGC_GAINSTEPLIM_HYST_DEFAULT   (_AGC_GAINSTEPLIM_HYST_DEFAULT << 12)

Shifted mode DEFAULT for AGC_GAINSTEPLIM

Definition at line 702 of file efr32bg21_agc.h.

#define AGC_GAINSTEPLIM_MAXPWRVAR_DEFAULT   (_AGC_GAINSTEPLIM_MAXPWRVAR_DEFAULT << 16)

Shifted mode DEFAULT for AGC_GAINSTEPLIM

Definition at line 706 of file efr32bg21_agc.h.

#define AGC_GAINSTEPLIM_TRANRSTAGC   (0x1UL << 24)

power transient detector Reset AGC

Definition at line 707 of file efr32bg21_agc.h.

#define AGC_GAINSTEPLIM_TRANRSTAGC_DEFAULT   (_AGC_GAINSTEPLIM_TRANRSTAGC_DEFAULT << 24)

Shifted mode DEFAULT for AGC_GAINSTEPLIM

Definition at line 711 of file efr32bg21_agc.h.

#define AGC_HICNTREGION_HICNTREGION0_DEFAULT   (_AGC_HICNTREGION_HICNTREGION0_DEFAULT << 0)

Shifted mode DEFAULT for AGC_HICNTREGION

Definition at line 642 of file efr32bg21_agc.h.

#define AGC_HICNTREGION_HICNTREGION1_DEFAULT   (_AGC_HICNTREGION_HICNTREGION1_DEFAULT << 4)

Shifted mode DEFAULT for AGC_HICNTREGION

Definition at line 646 of file efr32bg21_agc.h.

#define AGC_HICNTREGION_HICNTREGION2_DEFAULT   (_AGC_HICNTREGION_HICNTREGION2_DEFAULT << 8)

Shifted mode DEFAULT for AGC_HICNTREGION

Definition at line 650 of file efr32bg21_agc.h.

#define AGC_HICNTREGION_HICNTREGION3_DEFAULT   (_AGC_HICNTREGION_HICNTREGION3_DEFAULT << 16)

Shifted mode DEFAULT for AGC_HICNTREGION

Definition at line 654 of file efr32bg21_agc.h.

#define AGC_HICNTREGION_HICNTREGION4_DEFAULT   (_AGC_HICNTREGION_HICNTREGION4_DEFAULT << 24)

Shifted mode DEFAULT for AGC_HICNTREGION

Definition at line 658 of file efr32bg21_agc.h.

#define AGC_IEN_CCA   (0x1UL << 2)

CCA Interrupt Enable

Definition at line 553 of file efr32bg21_agc.h.

#define AGC_IEN_CCA_DEFAULT   (_AGC_IEN_CCA_DEFAULT << 2)

Shifted mode DEFAULT for AGC_IEN

Definition at line 557 of file efr32bg21_agc.h.

#define AGC_IEN_RSSINEGSTEP   (0x1UL << 4)

RSSINEGSTEP Interrupt Enable

Definition at line 563 of file efr32bg21_agc.h.

#define AGC_IEN_RSSINEGSTEP_DEFAULT   (_AGC_IEN_RSSINEGSTEP_DEFAULT << 4)

Shifted mode DEFAULT for AGC_IEN

Definition at line 567 of file efr32bg21_agc.h.

#define AGC_IEN_RSSIPOSSTEP   (0x1UL << 3)

RSSIPOSSTEP Interrupt Enable

Definition at line 558 of file efr32bg21_agc.h.

#define AGC_IEN_RSSIPOSSTEP_DEFAULT   (_AGC_IEN_RSSIPOSSTEP_DEFAULT << 3)

Shifted mode DEFAULT for AGC_IEN

Definition at line 562 of file efr32bg21_agc.h.

#define AGC_IEN_RSSIVALID   (0x1UL << 0)

RSSIVALID Interrupt Enable

Definition at line 548 of file efr32bg21_agc.h.

#define AGC_IEN_RSSIVALID_DEFAULT   (_AGC_IEN_RSSIVALID_DEFAULT << 0)

Shifted mode DEFAULT for AGC_IEN

Definition at line 552 of file efr32bg21_agc.h.

#define AGC_IEN_SHORTRSSIPOSSTEP   (0x1UL << 6)

SHORTRSSIPOSSTEP Interrupt Enable

Definition at line 568 of file efr32bg21_agc.h.

#define AGC_IEN_SHORTRSSIPOSSTEP_DEFAULT   (_AGC_IEN_SHORTRSSIPOSSTEP_DEFAULT << 6)

Shifted mode DEFAULT for AGC_IEN

Definition at line 572 of file efr32bg21_agc.h.

#define AGC_IF_CCA   (0x1UL << 2)

Clear Channel Assessment

Definition at line 524 of file efr32bg21_agc.h.

#define AGC_IF_CCA_DEFAULT   (_AGC_IF_CCA_DEFAULT << 2)

Shifted mode DEFAULT for AGC_IF

Definition at line 528 of file efr32bg21_agc.h.

#define AGC_IF_RSSINEGSTEP   (0x1UL << 4)

Negative RSSI Step Detected

Definition at line 534 of file efr32bg21_agc.h.

#define AGC_IF_RSSINEGSTEP_DEFAULT   (_AGC_IF_RSSINEGSTEP_DEFAULT << 4)

Shifted mode DEFAULT for AGC_IF

Definition at line 538 of file efr32bg21_agc.h.

#define AGC_IF_RSSIPOSSTEP   (0x1UL << 3)

Positive RSSI Step Detected

Definition at line 529 of file efr32bg21_agc.h.

#define AGC_IF_RSSIPOSSTEP_DEFAULT   (_AGC_IF_RSSIPOSSTEP_DEFAULT << 3)

Shifted mode DEFAULT for AGC_IF

Definition at line 533 of file efr32bg21_agc.h.

#define AGC_IF_RSSIVALID   (0x1UL << 0)

RSSI Value is Valid

Definition at line 519 of file efr32bg21_agc.h.

#define AGC_IF_RSSIVALID_DEFAULT   (_AGC_IF_RSSIVALID_DEFAULT << 0)

Shifted mode DEFAULT for AGC_IF

Definition at line 523 of file efr32bg21_agc.h.

#define AGC_IF_SHORTRSSIPOSSTEP   (0x1UL << 6)

Short-term Positive RSSI Step Detected

Definition at line 539 of file efr32bg21_agc.h.

#define AGC_IF_SHORTRSSIPOSSTEP_DEFAULT   (_AGC_IF_SHORTRSSIPOSSTEP_DEFAULT << 6)

Shifted mode DEFAULT for AGC_IF

Definition at line 543 of file efr32bg21_agc.h.

#define AGC_IPVERSION_IPVERSION_DEFAULT   (_AGC_IPVERSION_IPVERSION_DEFAULT << 0)

Shifted mode DEFAULT for AGC_IPVERSION

Definition at line 198 of file efr32bg21_agc.h.

#define AGC_LBT_CCARSSIPERIOD_DEFAULT   (_AGC_LBT_CCARSSIPERIOD_DEFAULT << 0)

Shifted mode DEFAULT for AGC_LBT

Definition at line 887 of file efr32bg21_agc.h.

#define AGC_LBT_ENCCAGAINREDUCED   (0x1UL << 5)

CCA gain reduced

Definition at line 893 of file efr32bg21_agc.h.

#define AGC_LBT_ENCCAGAINREDUCED_DEFAULT   (_AGC_LBT_ENCCAGAINREDUCED_DEFAULT << 5)

Shifted mode DEFAULT for AGC_LBT

Definition at line 897 of file efr32bg21_agc.h.

#define AGC_LBT_ENCCARSSIMAX   (0x1UL << 6)

Use RSSIMAX to indicate CCA

Definition at line 898 of file efr32bg21_agc.h.

#define AGC_LBT_ENCCARSSIMAX_DEFAULT   (_AGC_LBT_ENCCARSSIMAX_DEFAULT << 6)

Shifted mode DEFAULT for AGC_LBT

Definition at line 902 of file efr32bg21_agc.h.

#define AGC_LBT_ENCCARSSIPERIOD   (0x1UL << 4)

RSSI PERIOD during CCA measurements

Definition at line 888 of file efr32bg21_agc.h.

#define AGC_LBT_ENCCARSSIPERIOD_DEFAULT   (_AGC_LBT_ENCCARSSIPERIOD_DEFAULT << 4)

Shifted mode DEFAULT for AGC_LBT

Definition at line 892 of file efr32bg21_agc.h.

#define AGC_LNAMIXCODE0_LNAMIXSLICE1_DEFAULT   (_AGC_LNAMIXCODE0_LNAMIXSLICE1_DEFAULT << 0)

Shifted mode DEFAULT for AGC_LNAMIXCODE0

Definition at line 787 of file efr32bg21_agc.h.

#define AGC_LNAMIXCODE0_LNAMIXSLICE2_DEFAULT   (_AGC_LNAMIXCODE0_LNAMIXSLICE2_DEFAULT << 6)

Shifted mode DEFAULT for AGC_LNAMIXCODE0

Definition at line 791 of file efr32bg21_agc.h.

#define AGC_LNAMIXCODE0_LNAMIXSLICE3_DEFAULT   (_AGC_LNAMIXCODE0_LNAMIXSLICE3_DEFAULT << 12)

Shifted mode DEFAULT for AGC_LNAMIXCODE0

Definition at line 795 of file efr32bg21_agc.h.

#define AGC_LNAMIXCODE0_LNAMIXSLICE4_DEFAULT   (_AGC_LNAMIXCODE0_LNAMIXSLICE4_DEFAULT << 18)

Shifted mode DEFAULT for AGC_LNAMIXCODE0

Definition at line 799 of file efr32bg21_agc.h.

#define AGC_LNAMIXCODE0_LNAMIXSLICE5_DEFAULT   (_AGC_LNAMIXCODE0_LNAMIXSLICE5_DEFAULT << 24)

Shifted mode DEFAULT for AGC_LNAMIXCODE0

Definition at line 803 of file efr32bg21_agc.h.

#define AGC_LNAMIXCODE1_LNAMIXSLICE10_DEFAULT   (_AGC_LNAMIXCODE1_LNAMIXSLICE10_DEFAULT << 24)

Shifted mode DEFAULT for AGC_LNAMIXCODE1

Definition at line 827 of file efr32bg21_agc.h.

#define AGC_LNAMIXCODE1_LNAMIXSLICE6_DEFAULT   (_AGC_LNAMIXCODE1_LNAMIXSLICE6_DEFAULT << 0)

Shifted mode DEFAULT for AGC_LNAMIXCODE1

Definition at line 811 of file efr32bg21_agc.h.

#define AGC_LNAMIXCODE1_LNAMIXSLICE7_DEFAULT   (_AGC_LNAMIXCODE1_LNAMIXSLICE7_DEFAULT << 6)

Shifted mode DEFAULT for AGC_LNAMIXCODE1

Definition at line 815 of file efr32bg21_agc.h.

#define AGC_LNAMIXCODE1_LNAMIXSLICE8_DEFAULT   (_AGC_LNAMIXCODE1_LNAMIXSLICE8_DEFAULT << 12)

Shifted mode DEFAULT for AGC_LNAMIXCODE1

Definition at line 819 of file efr32bg21_agc.h.

#define AGC_LNAMIXCODE1_LNAMIXSLICE9_DEFAULT   (_AGC_LNAMIXCODE1_LNAMIXSLICE9_DEFAULT << 18)

Shifted mode DEFAULT for AGC_LNAMIXCODE1

Definition at line 823 of file efr32bg21_agc.h.

#define AGC_MIRRORIF_IFMIRRORCLEAR   (0x1UL << 3)

Clear bit for the AGC IF MIRROR Register

Definition at line 922 of file efr32bg21_agc.h.

#define AGC_MIRRORIF_IFMIRRORCLEAR_DEFAULT   (_AGC_MIRRORIF_IFMIRRORCLEAR_DEFAULT << 3)

Shifted mode DEFAULT for AGC_MIRRORIF

Definition at line 926 of file efr32bg21_agc.h.

#define AGC_MIRRORIF_RSSINEGSTEPM   (0x1UL << 1)

Negative RSSI Step Detected

Definition at line 912 of file efr32bg21_agc.h.

#define AGC_MIRRORIF_RSSINEGSTEPM_DEFAULT   (_AGC_MIRRORIF_RSSINEGSTEPM_DEFAULT << 1)

Shifted mode DEFAULT for AGC_MIRRORIF

Definition at line 916 of file efr32bg21_agc.h.

#define AGC_MIRRORIF_RSSIPOSSTEPM   (0x1UL << 0)

Positive RSSI Step Detected

Definition at line 907 of file efr32bg21_agc.h.

#define AGC_MIRRORIF_RSSIPOSSTEPM_DEFAULT   (_AGC_MIRRORIF_RSSIPOSSTEPM_DEFAULT << 0)

Shifted mode DEFAULT for AGC_MIRRORIF

Definition at line 911 of file efr32bg21_agc.h.

#define AGC_MIRRORIF_SHORTRSSIPOSSTEPM   (0x1UL << 2)

Short-term Positive RSSI Step Detected

Definition at line 917 of file efr32bg21_agc.h.

#define AGC_MIRRORIF_SHORTRSSIPOSSTEPM_DEFAULT   (_AGC_MIRRORIF_SHORTRSSIPOSSTEPM_DEFAULT << 2)

Shifted mode DEFAULT for AGC_MIRRORIF

Definition at line 921 of file efr32bg21_agc.h.

#define AGC_PGACODE0_PGAGAIN1_DEFAULT   (_AGC_PGACODE0_PGAGAIN1_DEFAULT << 0)

Shifted mode DEFAULT for AGC_PGACODE0

Definition at line 835 of file efr32bg21_agc.h.

#define AGC_PGACODE0_PGAGAIN2_DEFAULT   (_AGC_PGACODE0_PGAGAIN2_DEFAULT << 4)

Shifted mode DEFAULT for AGC_PGACODE0

Definition at line 839 of file efr32bg21_agc.h.

#define AGC_PGACODE0_PGAGAIN3_DEFAULT   (_AGC_PGACODE0_PGAGAIN3_DEFAULT << 8)

Shifted mode DEFAULT for AGC_PGACODE0

Definition at line 843 of file efr32bg21_agc.h.

#define AGC_PGACODE0_PGAGAIN4_DEFAULT   (_AGC_PGACODE0_PGAGAIN4_DEFAULT << 12)

Shifted mode DEFAULT for AGC_PGACODE0

Definition at line 847 of file efr32bg21_agc.h.

#define AGC_PGACODE0_PGAGAIN5_DEFAULT   (_AGC_PGACODE0_PGAGAIN5_DEFAULT << 16)

Shifted mode DEFAULT for AGC_PGACODE0

Definition at line 851 of file efr32bg21_agc.h.

#define AGC_PGACODE0_PGAGAIN6_DEFAULT   (_AGC_PGACODE0_PGAGAIN6_DEFAULT << 20)

Shifted mode DEFAULT for AGC_PGACODE0

Definition at line 855 of file efr32bg21_agc.h.

#define AGC_PGACODE0_PGAGAIN7_DEFAULT   (_AGC_PGACODE0_PGAGAIN7_DEFAULT << 24)

Shifted mode DEFAULT for AGC_PGACODE0

Definition at line 859 of file efr32bg21_agc.h.

#define AGC_PGACODE0_PGAGAIN8_DEFAULT   (_AGC_PGACODE0_PGAGAIN8_DEFAULT << 28)

Shifted mode DEFAULT for AGC_PGACODE0

Definition at line 863 of file efr32bg21_agc.h.

#define AGC_PGACODE1_PGAGAIN10_DEFAULT   (_AGC_PGACODE1_PGAGAIN10_DEFAULT << 4)

Shifted mode DEFAULT for AGC_PGACODE1

Definition at line 875 of file efr32bg21_agc.h.

#define AGC_PGACODE1_PGAGAIN11_DEFAULT   (_AGC_PGACODE1_PGAGAIN11_DEFAULT << 8)

Shifted mode DEFAULT for AGC_PGACODE1

Definition at line 879 of file efr32bg21_agc.h.

#define AGC_PGACODE1_PGAGAIN9_DEFAULT   (_AGC_PGACODE1_PGAGAIN9_DEFAULT << 0)

Shifted mode DEFAULT for AGC_PGACODE1

Definition at line 871 of file efr32bg21_agc.h.

#define AGC_PNRFATT0_LNAMIXRFATT1_DEFAULT   (_AGC_PNRFATT0_LNAMIXRFATT1_DEFAULT << 0)

Shifted mode DEFAULT for AGC_PNRFATT0

Definition at line 719 of file efr32bg21_agc.h.

#define AGC_PNRFATT0_LNAMIXRFATT2_DEFAULT   (_AGC_PNRFATT0_LNAMIXRFATT2_DEFAULT << 6)

Shifted mode DEFAULT for AGC_PNRFATT0

Definition at line 723 of file efr32bg21_agc.h.

#define AGC_PNRFATT0_LNAMIXRFATT3_DEFAULT   (_AGC_PNRFATT0_LNAMIXRFATT3_DEFAULT << 12)

Shifted mode DEFAULT for AGC_PNRFATT0

Definition at line 727 of file efr32bg21_agc.h.

#define AGC_PNRFATT0_LNAMIXRFATT4_DEFAULT   (_AGC_PNRFATT0_LNAMIXRFATT4_DEFAULT << 18)

Shifted mode DEFAULT for AGC_PNRFATT0

Definition at line 731 of file efr32bg21_agc.h.

#define AGC_PNRFATT0_LNAMIXRFATT5_DEFAULT   (_AGC_PNRFATT0_LNAMIXRFATT5_DEFAULT << 24)

Shifted mode DEFAULT for AGC_PNRFATT0

Definition at line 735 of file efr32bg21_agc.h.

#define AGC_PNRFATT1_LNAMIXRFATT10_DEFAULT   (_AGC_PNRFATT1_LNAMIXRFATT10_DEFAULT << 24)

Shifted mode DEFAULT for AGC_PNRFATT1

Definition at line 759 of file efr32bg21_agc.h.

#define AGC_PNRFATT1_LNAMIXRFATT6_DEFAULT   (_AGC_PNRFATT1_LNAMIXRFATT6_DEFAULT << 0)

Shifted mode DEFAULT for AGC_PNRFATT1

Definition at line 743 of file efr32bg21_agc.h.

#define AGC_PNRFATT1_LNAMIXRFATT7_DEFAULT   (_AGC_PNRFATT1_LNAMIXRFATT7_DEFAULT << 6)

Shifted mode DEFAULT for AGC_PNRFATT1

Definition at line 747 of file efr32bg21_agc.h.

#define AGC_PNRFATT1_LNAMIXRFATT8_DEFAULT   (_AGC_PNRFATT1_LNAMIXRFATT8_DEFAULT << 12)

Shifted mode DEFAULT for AGC_PNRFATT1

Definition at line 751 of file efr32bg21_agc.h.

#define AGC_PNRFATT1_LNAMIXRFATT9_DEFAULT   (_AGC_PNRFATT1_LNAMIXRFATT9_DEFAULT << 18)

Shifted mode DEFAULT for AGC_PNRFATT1

Definition at line 755 of file efr32bg21_agc.h.

#define AGC_PNRFATT2_LNAMIXRFATT11_DEFAULT   (_AGC_PNRFATT2_LNAMIXRFATT11_DEFAULT << 0)

Shifted mode DEFAULT for AGC_PNRFATT2

Definition at line 767 of file efr32bg21_agc.h.

#define AGC_PNRFATT2_LNAMIXRFATT12_DEFAULT   (_AGC_PNRFATT2_LNAMIXRFATT12_DEFAULT << 6)

Shifted mode DEFAULT for AGC_PNRFATT2

Definition at line 771 of file efr32bg21_agc.h.

#define AGC_PNRFATT2_LNAMIXRFATT13_DEFAULT   (_AGC_PNRFATT2_LNAMIXRFATT13_DEFAULT << 12)

Shifted mode DEFAULT for AGC_PNRFATT2

Definition at line 775 of file efr32bg21_agc.h.

#define AGC_PNRFATT2_LNAMIXRFATT14_DEFAULT   (_AGC_PNRFATT2_LNAMIXRFATT14_DEFAULT << 18)

Shifted mode DEFAULT for AGC_PNRFATT2

Definition at line 779 of file efr32bg21_agc.h.

#define AGC_RSSI_RSSIFRAC_DEFAULT   (_AGC_RSSI_RSSIFRAC_DEFAULT << 6)

Shifted mode DEFAULT for AGC_RSSI

Definition at line 264 of file efr32bg21_agc.h.

#define AGC_RSSI_RSSIINT_DEFAULT   (_AGC_RSSI_RSSIINT_DEFAULT << 8)

Shifted mode DEFAULT for AGC_RSSI

Definition at line 268 of file efr32bg21_agc.h.

#define AGC_RSSISTEPTHR_DEMODRESTARTPER_DEFAULT   (_AGC_RSSISTEPTHR_DEMODRESTARTPER_DEFAULT << 17)

Shifted mode DEFAULT for AGC_RSSISTEPTHR

Definition at line 505 of file efr32bg21_agc.h.

#define AGC_RSSISTEPTHR_DEMODRESTARTTHR_DEFAULT   (_AGC_RSSISTEPTHR_DEMODRESTARTTHR_DEFAULT << 21)

Shifted mode DEFAULT for AGC_RSSISTEPTHR

Definition at line 509 of file efr32bg21_agc.h.

#define AGC_RSSISTEPTHR_NEGSTEPTHR_DEFAULT   (_AGC_RSSISTEPTHR_NEGSTEPTHR_DEFAULT << 8)

Shifted mode DEFAULT for AGC_RSSISTEPTHR

Definition at line 496 of file efr32bg21_agc.h.

#define AGC_RSSISTEPTHR_POSSTEPTHR_DEFAULT   (_AGC_RSSISTEPTHR_POSSTEPTHR_DEFAULT << 0)

Shifted mode DEFAULT for AGC_RSSISTEPTHR

Definition at line 492 of file efr32bg21_agc.h.

#define AGC_RSSISTEPTHR_RSSIFAST   (0x1UL << 29)

RSSI fast startup

Definition at line 510 of file efr32bg21_agc.h.

#define AGC_RSSISTEPTHR_RSSIFAST_DEFAULT   (_AGC_RSSISTEPTHR_RSSIFAST_DEFAULT << 29)

Shifted mode DEFAULT for AGC_RSSISTEPTHR

Definition at line 514 of file efr32bg21_agc.h.

#define AGC_RSSISTEPTHR_STEPPER   (0x1UL << 16)

Step Period

Definition at line 497 of file efr32bg21_agc.h.

#define AGC_RSSISTEPTHR_STEPPER_DEFAULT   (_AGC_RSSISTEPTHR_STEPPER_DEFAULT << 16)

Shifted mode DEFAULT for AGC_RSSISTEPTHR

Definition at line 501 of file efr32bg21_agc.h.

#define AGC_STATUS0_ADCINDEX_DEFAULT   (_AGC_STATUS0_ADCINDEX_DEFAULT << 23)

Shifted mode DEFAULT for AGC_STATUS0

Definition at line 256 of file efr32bg21_agc.h.

#define AGC_STATUS0_CCA   (0x1UL << 9)

Clear Channel Assessment

Definition at line 231 of file efr32bg21_agc.h.

#define AGC_STATUS0_CCA_DEFAULT   (_AGC_STATUS0_CCA_DEFAULT << 9)

Shifted mode DEFAULT for AGC_STATUS0

Definition at line 235 of file efr32bg21_agc.h.

#define AGC_STATUS0_GAININDEX_DEFAULT   (_AGC_STATUS0_GAININDEX_DEFAULT << 0)

Shifted mode DEFAULT for AGC_STATUS0

Definition at line 215 of file efr32bg21_agc.h.

#define AGC_STATUS0_GAINOK   (0x1UL << 10)

Gain OK

Definition at line 236 of file efr32bg21_agc.h.

#define AGC_STATUS0_GAINOK_DEFAULT   (_AGC_STATUS0_GAINOK_DEFAULT << 10)

Shifted mode DEFAULT for AGC_STATUS0

Definition at line 240 of file efr32bg21_agc.h.

#define AGC_STATUS0_IFPKDHILAT   (0x1UL << 8)

IFPKD Hi threshold pass Latch

Definition at line 226 of file efr32bg21_agc.h.

#define AGC_STATUS0_IFPKDHILAT_DEFAULT   (_AGC_STATUS0_IFPKDHILAT_DEFAULT << 8)

Shifted mode DEFAULT for AGC_STATUS0

Definition at line 230 of file efr32bg21_agc.h.

#define AGC_STATUS0_IFPKDLOLAT   (0x1UL << 7)

IFPKD Lo threshold pass Latch

Definition at line 221 of file efr32bg21_agc.h.

#define AGC_STATUS0_IFPKDLOLAT_DEFAULT   (_AGC_STATUS0_IFPKDLOLAT_DEFAULT << 7)

Shifted mode DEFAULT for AGC_STATUS0

Definition at line 225 of file efr32bg21_agc.h.

#define AGC_STATUS0_LNAINDEX_DEFAULT   (_AGC_STATUS0_LNAINDEX_DEFAULT << 15)

Shifted mode DEFAULT for AGC_STATUS0

Definition at line 248 of file efr32bg21_agc.h.

#define AGC_STATUS0_PGAINDEX_DEFAULT   (_AGC_STATUS0_PGAINDEX_DEFAULT << 11)

Shifted mode DEFAULT for AGC_STATUS0

Definition at line 244 of file efr32bg21_agc.h.

#define AGC_STATUS0_PNINDEX_DEFAULT   (_AGC_STATUS0_PNINDEX_DEFAULT << 19)

Shifted mode DEFAULT for AGC_STATUS0

Definition at line 252 of file efr32bg21_agc.h.

#define AGC_STATUS0_RFPKDLAT   (0x1UL << 6)

RFPKD Latch

Definition at line 216 of file efr32bg21_agc.h.

#define AGC_STATUS0_RFPKDLAT_DEFAULT   (_AGC_STATUS0_RFPKDLAT_DEFAULT << 6)

Shifted mode DEFAULT for AGC_STATUS0

Definition at line 220 of file efr32bg21_agc.h.

#define AGC_STEPDWN_STEPDWN0_DEFAULT   (_AGC_STEPDWN_STEPDWN0_DEFAULT << 0)

Shifted mode DEFAULT for AGC_STEPDWN

Definition at line 666 of file efr32bg21_agc.h.

#define AGC_STEPDWN_STEPDWN1_DEFAULT   (_AGC_STEPDWN_STEPDWN1_DEFAULT << 3)

Shifted mode DEFAULT for AGC_STEPDWN

Definition at line 670 of file efr32bg21_agc.h.

#define AGC_STEPDWN_STEPDWN2_DEFAULT   (_AGC_STEPDWN_STEPDWN2_DEFAULT << 6)

Shifted mode DEFAULT for AGC_STEPDWN

Definition at line 674 of file efr32bg21_agc.h.

#define AGC_STEPDWN_STEPDWN3_DEFAULT   (_AGC_STEPDWN_STEPDWN3_DEFAULT << 9)

Shifted mode DEFAULT for AGC_STEPDWN

Definition at line 678 of file efr32bg21_agc.h.

#define AGC_STEPDWN_STEPDWN4_DEFAULT   (_AGC_STEPDWN_STEPDWN4_DEFAULT << 12)

Shifted mode DEFAULT for AGC_STEPDWN

Definition at line 682 of file efr32bg21_agc.h.

#define AGC_STEPDWN_STEPDWN5_DEFAULT   (_AGC_STEPDWN_STEPDWN5_DEFAULT << 15)

Shifted mode DEFAULT for AGC_STEPDWN

Definition at line 686 of file efr32bg21_agc.h.