MSC Bit FieldsDevices > MSC

Macros

#define _MSC_ADDRB_ADDRB_DEFAULT   0x00000000UL
 
#define _MSC_ADDRB_ADDRB_MASK   0xFFFFFFFFUL
 
#define _MSC_ADDRB_ADDRB_SHIFT   0
 
#define _MSC_ADDRB_MASK   0xFFFFFFFFUL
 
#define _MSC_ADDRB_RESETVALUE   0x00000000UL
 
#define _MSC_CMD_MASK   0x00000001UL
 
#define _MSC_CMD_PWRUP_DEFAULT   0x00000000UL
 
#define _MSC_CMD_PWRUP_MASK   0x1UL
 
#define _MSC_CMD_PWRUP_SHIFT   0
 
#define _MSC_CMD_RESETVALUE   0x00000000UL
 
#define _MSC_IEN_ERASE_DEFAULT   0x00000000UL
 
#define _MSC_IEN_ERASE_MASK   0x1UL
 
#define _MSC_IEN_ERASE_SHIFT   0
 
#define _MSC_IEN_MASK   0x00000107UL
 
#define _MSC_IEN_PWRUPF_DEFAULT   0x00000000UL
 
#define _MSC_IEN_PWRUPF_MASK   0x100UL
 
#define _MSC_IEN_PWRUPF_SHIFT   8
 
#define _MSC_IEN_RESETVALUE   0x00000000UL
 
#define _MSC_IEN_WDATAOV_DEFAULT   0x00000000UL
 
#define _MSC_IEN_WDATAOV_MASK   0x4UL
 
#define _MSC_IEN_WDATAOV_SHIFT   2
 
#define _MSC_IEN_WRITE_DEFAULT   0x00000000UL
 
#define _MSC_IEN_WRITE_MASK   0x2UL
 
#define _MSC_IEN_WRITE_SHIFT   1
 
#define _MSC_IF_ERASE_DEFAULT   0x00000000UL
 
#define _MSC_IF_ERASE_MASK   0x1UL
 
#define _MSC_IF_ERASE_SHIFT   0
 
#define _MSC_IF_MASK   0x00000107UL
 
#define _MSC_IF_PWRUPF_DEFAULT   0x00000000UL
 
#define _MSC_IF_PWRUPF_MASK   0x100UL
 
#define _MSC_IF_PWRUPF_SHIFT   8
 
#define _MSC_IF_RESETVALUE   0x00000000UL
 
#define _MSC_IF_WDATAOV_DEFAULT   0x00000000UL
 
#define _MSC_IF_WDATAOV_MASK   0x4UL
 
#define _MSC_IF_WDATAOV_SHIFT   2
 
#define _MSC_IF_WRITE_DEFAULT   0x00000000UL
 
#define _MSC_IF_WRITE_MASK   0x2UL
 
#define _MSC_IF_WRITE_SHIFT   1
 
#define _MSC_IPVERSION_IPVERSION_DEFAULT   0x00000000UL
 
#define _MSC_IPVERSION_IPVERSION_MASK   0xFFFFFFFFUL
 
#define _MSC_IPVERSION_IPVERSION_SHIFT   0
 
#define _MSC_IPVERSION_MASK   0xFFFFFFFFUL
 
#define _MSC_IPVERSION_RESETVALUE   0x00000000UL
 
#define _MSC_LOCK_LOCKKEY_DEFAULT   0x00000000UL
 
#define _MSC_LOCK_LOCKKEY_LOCK   0x00000000UL
 
#define _MSC_LOCK_LOCKKEY_MASK   0xFFFFUL
 
#define _MSC_LOCK_LOCKKEY_SHIFT   0
 
#define _MSC_LOCK_LOCKKEY_UNLOCK   0x00001B71UL
 
#define _MSC_LOCK_MASK   0x0000FFFFUL
 
#define _MSC_LOCK_RESETVALUE   0x00000000UL
 
#define _MSC_MISCLOCKWORD_MASK   0x00000011UL
 
#define _MSC_MISCLOCKWORD_MELOCKBIT_DEFAULT   0x00000001UL
 
#define _MSC_MISCLOCKWORD_MELOCKBIT_MASK   0x1UL
 
#define _MSC_MISCLOCKWORD_MELOCKBIT_SHIFT   0
 
#define _MSC_MISCLOCKWORD_RESETVALUE   0x00000011UL
 
#define _MSC_MISCLOCKWORD_UDLOCKBIT_DEFAULT   0x00000001UL
 
#define _MSC_MISCLOCKWORD_UDLOCKBIT_MASK   0x10UL
 
#define _MSC_MISCLOCKWORD_UDLOCKBIT_SHIFT   4
 
#define _MSC_PAGELOCK0_LOCKBIT_DEFAULT   0x00000000UL
 
#define _MSC_PAGELOCK0_LOCKBIT_MASK   0xFFFFFFFFUL
 
#define _MSC_PAGELOCK0_LOCKBIT_SHIFT   0
 
#define _MSC_PAGELOCK0_MASK   0xFFFFFFFFUL
 
#define _MSC_PAGELOCK0_RESETVALUE   0x00000000UL
 
#define _MSC_PAGELOCK1_LOCKBIT_DEFAULT   0x00000000UL
 
#define _MSC_PAGELOCK1_LOCKBIT_MASK   0xFFFFFFFFUL
 
#define _MSC_PAGELOCK1_LOCKBIT_SHIFT   0
 
#define _MSC_PAGELOCK1_MASK   0xFFFFFFFFUL
 
#define _MSC_PAGELOCK1_RESETVALUE   0x00000000UL
 
#define _MSC_PAGELOCK2_LOCKBIT_DEFAULT   0x00000000UL
 
#define _MSC_PAGELOCK2_LOCKBIT_MASK   0xFFFFFFFFUL
 
#define _MSC_PAGELOCK2_LOCKBIT_SHIFT   0
 
#define _MSC_PAGELOCK2_MASK   0xFFFFFFFFUL
 
#define _MSC_PAGELOCK2_RESETVALUE   0x00000000UL
 
#define _MSC_PAGELOCK3_LOCKBIT_DEFAULT   0x00000000UL
 
#define _MSC_PAGELOCK3_LOCKBIT_MASK   0xFFFFFFFFUL
 
#define _MSC_PAGELOCK3_LOCKBIT_SHIFT   0
 
#define _MSC_PAGELOCK3_MASK   0xFFFFFFFFUL
 
#define _MSC_PAGELOCK3_RESETVALUE   0x00000000UL
 
#define _MSC_READCTRL_DOUTBUFEN_DEFAULT   0x00000000UL
 
#define _MSC_READCTRL_DOUTBUFEN_MASK   0x1000UL
 
#define _MSC_READCTRL_DOUTBUFEN_SHIFT   12
 
#define _MSC_READCTRL_MASK   0x00301002UL
 
#define _MSC_READCTRL_MODE_DEFAULT   0x00000002UL
 
#define _MSC_READCTRL_MODE_MASK   0x300000UL
 
#define _MSC_READCTRL_MODE_SHIFT   20
 
#define _MSC_READCTRL_MODE_WS0   0x00000000UL
 
#define _MSC_READCTRL_MODE_WS1   0x00000001UL
 
#define _MSC_READCTRL_MODE_WS2   0x00000002UL
 
#define _MSC_READCTRL_MODE_WS3   0x00000003UL
 
#define _MSC_READCTRL_RESETVALUE   0x00200000UL
 
#define _MSC_STATUS_BUSY_DEFAULT   0x00000000UL
 
#define _MSC_STATUS_BUSY_MASK   0x1UL
 
#define _MSC_STATUS_BUSY_SHIFT   0
 
#define _MSC_STATUS_ERASEABORTED_DEFAULT   0x00000000UL
 
#define _MSC_STATUS_ERASEABORTED_MASK   0x10UL
 
#define _MSC_STATUS_ERASEABORTED_SHIFT   4
 
#define _MSC_STATUS_INVADDR_DEFAULT   0x00000000UL
 
#define _MSC_STATUS_INVADDR_MASK   0x4UL
 
#define _MSC_STATUS_INVADDR_SHIFT   2
 
#define _MSC_STATUS_LOCKED_DEFAULT   0x00000000UL
 
#define _MSC_STATUS_LOCKED_MASK   0x2UL
 
#define _MSC_STATUS_LOCKED_SHIFT   1
 
#define _MSC_STATUS_MASK   0xF801007FUL
 
#define _MSC_STATUS_PENDING_DEFAULT   0x00000000UL
 
#define _MSC_STATUS_PENDING_MASK   0x20UL
 
#define _MSC_STATUS_PENDING_SHIFT   5
 
#define _MSC_STATUS_PWRUPCKBDFAILCOUNT_DEFAULT   0x00000000UL
 
#define _MSC_STATUS_PWRUPCKBDFAILCOUNT_MASK   0xF0000000UL
 
#define _MSC_STATUS_PWRUPCKBDFAILCOUNT_SHIFT   28
 
#define _MSC_STATUS_REGLOCK_DEFAULT   0x00000000UL
 
#define _MSC_STATUS_REGLOCK_LOCKED   0x00000001UL
 
#define _MSC_STATUS_REGLOCK_MASK   0x10000UL
 
#define _MSC_STATUS_REGLOCK_SHIFT   16
 
#define _MSC_STATUS_REGLOCK_UNLOCKED   0x00000000UL
 
#define _MSC_STATUS_RESETVALUE   0x08000008UL
 
#define _MSC_STATUS_TIMEOUT_DEFAULT   0x00000000UL
 
#define _MSC_STATUS_TIMEOUT_MASK   0x40UL
 
#define _MSC_STATUS_TIMEOUT_SHIFT   6
 
#define _MSC_STATUS_WDATAREADY_DEFAULT   0x00000001UL
 
#define _MSC_STATUS_WDATAREADY_MASK   0x8UL
 
#define _MSC_STATUS_WDATAREADY_SHIFT   3
 
#define _MSC_STATUS_WREADY_DEFAULT   0x00000001UL
 
#define _MSC_STATUS_WREADY_MASK   0x8000000UL
 
#define _MSC_STATUS_WREADY_SHIFT   27
 
#define _MSC_TESTCTRL_MASK   0xD9BF11FFUL
 
#define _MSC_TESTCTRL_RESETVALUE   0x00000100UL
 
#define _MSC_TESTCTRL_XADRINC_DEFAULT   0x00000000UL
 
#define _MSC_TESTCTRL_XADRINC_MASK   0x800000UL
 
#define _MSC_TESTCTRL_XADRINC_ONE   0x00000000UL
 
#define _MSC_TESTCTRL_XADRINC_SHIFT   23
 
#define _MSC_TESTCTRL_XADRINC_TWO   0x00000001UL
 
#define _MSC_USERDATASIZE_MASK   0x0000003FUL
 
#define _MSC_USERDATASIZE_RESETVALUE   0x00000004UL
 
#define _MSC_USERDATASIZE_USERDATASIZE_DEFAULT   0x00000004UL
 
#define _MSC_USERDATASIZE_USERDATASIZE_MASK   0x3FUL
 
#define _MSC_USERDATASIZE_USERDATASIZE_SHIFT   0
 
#define _MSC_WDATA_DATAW_DEFAULT   0x00000000UL
 
#define _MSC_WDATA_DATAW_MASK   0xFFFFFFFFUL
 
#define _MSC_WDATA_DATAW_SHIFT   0
 
#define _MSC_WDATA_MASK   0xFFFFFFFFUL
 
#define _MSC_WDATA_RESETVALUE   0x00000000UL
 
#define _MSC_WRITECMD_CLEARWDATA_DEFAULT   0x00000000UL
 
#define _MSC_WRITECMD_CLEARWDATA_MASK   0x1000UL
 
#define _MSC_WRITECMD_CLEARWDATA_SHIFT   12
 
#define _MSC_WRITECMD_ERASEABORT_DEFAULT   0x00000000UL
 
#define _MSC_WRITECMD_ERASEABORT_MASK   0x20UL
 
#define _MSC_WRITECMD_ERASEABORT_SHIFT   5
 
#define _MSC_WRITECMD_ERASEMAIN0_DEFAULT   0x00000000UL
 
#define _MSC_WRITECMD_ERASEMAIN0_MASK   0x100UL
 
#define _MSC_WRITECMD_ERASEMAIN0_SHIFT   8
 
#define _MSC_WRITECMD_ERASEPAGE_DEFAULT   0x00000000UL
 
#define _MSC_WRITECMD_ERASEPAGE_MASK   0x2UL
 
#define _MSC_WRITECMD_ERASEPAGE_SHIFT   1
 
#define _MSC_WRITECMD_MASK   0x00001126UL
 
#define _MSC_WRITECMD_RESETVALUE   0x00000000UL
 
#define _MSC_WRITECMD_WRITEEND_DEFAULT   0x00000000UL
 
#define _MSC_WRITECMD_WRITEEND_MASK   0x4UL
 
#define _MSC_WRITECMD_WRITEEND_SHIFT   2
 
#define _MSC_WRITECTRL_IRQERASEABORT_DEFAULT   0x00000000UL
 
#define _MSC_WRITECTRL_IRQERASEABORT_MASK   0x2UL
 
#define _MSC_WRITECTRL_IRQERASEABORT_SHIFT   1
 
#define _MSC_WRITECTRL_LPWRITE_DEFAULT   0x00000000UL
 
#define _MSC_WRITECTRL_LPWRITE_MASK   0x8UL
 
#define _MSC_WRITECTRL_LPWRITE_SHIFT   3
 
#define _MSC_WRITECTRL_MASK   0x0000000BUL
 
#define _MSC_WRITECTRL_RESETVALUE   0x00000000UL
 
#define _MSC_WRITECTRL_WREN_DEFAULT   0x00000000UL
 
#define _MSC_WRITECTRL_WREN_MASK   0x1UL
 
#define _MSC_WRITECTRL_WREN_SHIFT   0
 
#define MSC_ADDRB_ADDRB_DEFAULT   (_MSC_ADDRB_ADDRB_DEFAULT << 0)
 
#define MSC_CMD_PWRUP   (0x1UL << 0)
 
#define MSC_CMD_PWRUP_DEFAULT   (_MSC_CMD_PWRUP_DEFAULT << 0)
 
#define MSC_IEN_ERASE   (0x1UL << 0)
 
#define MSC_IEN_ERASE_DEFAULT   (_MSC_IEN_ERASE_DEFAULT << 0)
 
#define MSC_IEN_PWRUPF   (0x1UL << 8)
 
#define MSC_IEN_PWRUPF_DEFAULT   (_MSC_IEN_PWRUPF_DEFAULT << 8)
 
#define MSC_IEN_WDATAOV   (0x1UL << 2)
 
#define MSC_IEN_WDATAOV_DEFAULT   (_MSC_IEN_WDATAOV_DEFAULT << 2)
 
#define MSC_IEN_WRITE   (0x1UL << 1)
 
#define MSC_IEN_WRITE_DEFAULT   (_MSC_IEN_WRITE_DEFAULT << 1)
 
#define MSC_IF_ERASE   (0x1UL << 0)
 
#define MSC_IF_ERASE_DEFAULT   (_MSC_IF_ERASE_DEFAULT << 0)
 
#define MSC_IF_PWRUPF   (0x1UL << 8)
 
#define MSC_IF_PWRUPF_DEFAULT   (_MSC_IF_PWRUPF_DEFAULT << 8)
 
#define MSC_IF_WDATAOV   (0x1UL << 2)
 
#define MSC_IF_WDATAOV_DEFAULT   (_MSC_IF_WDATAOV_DEFAULT << 2)
 
#define MSC_IF_WRITE   (0x1UL << 1)
 
#define MSC_IF_WRITE_DEFAULT   (_MSC_IF_WRITE_DEFAULT << 1)
 
#define MSC_IPVERSION_IPVERSION_DEFAULT   (_MSC_IPVERSION_IPVERSION_DEFAULT << 0)
 
#define MSC_LOCK_LOCKKEY_DEFAULT   (_MSC_LOCK_LOCKKEY_DEFAULT << 0)
 
#define MSC_LOCK_LOCKKEY_LOCK   (_MSC_LOCK_LOCKKEY_LOCK << 0)
 
#define MSC_LOCK_LOCKKEY_UNLOCK   (_MSC_LOCK_LOCKKEY_UNLOCK << 0)
 
#define MSC_MISCLOCKWORD_MELOCKBIT   (0x1UL << 0)
 
#define MSC_MISCLOCKWORD_MELOCKBIT_DEFAULT   (_MSC_MISCLOCKWORD_MELOCKBIT_DEFAULT << 0)
 
#define MSC_MISCLOCKWORD_UDLOCKBIT   (0x1UL << 4)
 
#define MSC_MISCLOCKWORD_UDLOCKBIT_DEFAULT   (_MSC_MISCLOCKWORD_UDLOCKBIT_DEFAULT << 4)
 
#define MSC_PAGELOCK0_LOCKBIT_DEFAULT   (_MSC_PAGELOCK0_LOCKBIT_DEFAULT << 0)
 
#define MSC_PAGELOCK1_LOCKBIT_DEFAULT   (_MSC_PAGELOCK1_LOCKBIT_DEFAULT << 0)
 
#define MSC_PAGELOCK2_LOCKBIT_DEFAULT   (_MSC_PAGELOCK2_LOCKBIT_DEFAULT << 0)
 
#define MSC_PAGELOCK3_LOCKBIT_DEFAULT   (_MSC_PAGELOCK3_LOCKBIT_DEFAULT << 0)
 
#define MSC_READCTRL_DOUTBUFEN   (0x1UL << 12)
 
#define MSC_READCTRL_DOUTBUFEN_DEFAULT   (_MSC_READCTRL_DOUTBUFEN_DEFAULT << 12)
 
#define MSC_READCTRL_MODE_DEFAULT   (_MSC_READCTRL_MODE_DEFAULT << 20)
 
#define MSC_READCTRL_MODE_WS0   (_MSC_READCTRL_MODE_WS0 << 20)
 
#define MSC_READCTRL_MODE_WS1   (_MSC_READCTRL_MODE_WS1 << 20)
 
#define MSC_READCTRL_MODE_WS2   (_MSC_READCTRL_MODE_WS2 << 20)
 
#define MSC_READCTRL_MODE_WS3   (_MSC_READCTRL_MODE_WS3 << 20)
 
#define MSC_STATUS_BUSY   (0x1UL << 0)
 
#define MSC_STATUS_BUSY_DEFAULT   (_MSC_STATUS_BUSY_DEFAULT << 0)
 
#define MSC_STATUS_ERASEABORTED   (0x1UL << 4)
 
#define MSC_STATUS_ERASEABORTED_DEFAULT   (_MSC_STATUS_ERASEABORTED_DEFAULT << 4)
 
#define MSC_STATUS_INVADDR   (0x1UL << 2)
 
#define MSC_STATUS_INVADDR_DEFAULT   (_MSC_STATUS_INVADDR_DEFAULT << 2)
 
#define MSC_STATUS_LOCKED   (0x1UL << 1)
 
#define MSC_STATUS_LOCKED_DEFAULT   (_MSC_STATUS_LOCKED_DEFAULT << 1)
 
#define MSC_STATUS_PENDING   (0x1UL << 5)
 
#define MSC_STATUS_PENDING_DEFAULT   (_MSC_STATUS_PENDING_DEFAULT << 5)
 
#define MSC_STATUS_PWRUPCKBDFAILCOUNT_DEFAULT   (_MSC_STATUS_PWRUPCKBDFAILCOUNT_DEFAULT << 28)
 
#define MSC_STATUS_REGLOCK   (0x1UL << 16)
 
#define MSC_STATUS_REGLOCK_DEFAULT   (_MSC_STATUS_REGLOCK_DEFAULT << 16)
 
#define MSC_STATUS_REGLOCK_LOCKED   (_MSC_STATUS_REGLOCK_LOCKED << 16)
 
#define MSC_STATUS_REGLOCK_UNLOCKED   (_MSC_STATUS_REGLOCK_UNLOCKED << 16)
 
#define MSC_STATUS_TIMEOUT   (0x1UL << 6)
 
#define MSC_STATUS_TIMEOUT_DEFAULT   (_MSC_STATUS_TIMEOUT_DEFAULT << 6)
 
#define MSC_STATUS_WDATAREADY   (0x1UL << 3)
 
#define MSC_STATUS_WDATAREADY_DEFAULT   (_MSC_STATUS_WDATAREADY_DEFAULT << 3)
 
#define MSC_STATUS_WREADY   (0x1UL << 27)
 
#define MSC_STATUS_WREADY_DEFAULT   (_MSC_STATUS_WREADY_DEFAULT << 27)
 
#define MSC_TESTCTRL_XADRINC   (0x1UL << 23)
 
#define MSC_TESTCTRL_XADRINC_DEFAULT   (_MSC_TESTCTRL_XADRINC_DEFAULT << 23)
 
#define MSC_TESTCTRL_XADRINC_ONE   (_MSC_TESTCTRL_XADRINC_ONE << 23)
 
#define MSC_TESTCTRL_XADRINC_TWO   (_MSC_TESTCTRL_XADRINC_TWO << 23)
 
#define MSC_USERDATASIZE_USERDATASIZE_DEFAULT   (_MSC_USERDATASIZE_USERDATASIZE_DEFAULT << 0)
 
#define MSC_WDATA_DATAW_DEFAULT   (_MSC_WDATA_DATAW_DEFAULT << 0)
 
#define MSC_WRITECMD_CLEARWDATA   (0x1UL << 12)
 
#define MSC_WRITECMD_CLEARWDATA_DEFAULT   (_MSC_WRITECMD_CLEARWDATA_DEFAULT << 12)
 
#define MSC_WRITECMD_ERASEABORT   (0x1UL << 5)
 
#define MSC_WRITECMD_ERASEABORT_DEFAULT   (_MSC_WRITECMD_ERASEABORT_DEFAULT << 5)
 
#define MSC_WRITECMD_ERASEMAIN0   (0x1UL << 8)
 
#define MSC_WRITECMD_ERASEMAIN0_DEFAULT   (_MSC_WRITECMD_ERASEMAIN0_DEFAULT << 8)
 
#define MSC_WRITECMD_ERASEPAGE   (0x1UL << 1)
 
#define MSC_WRITECMD_ERASEPAGE_DEFAULT   (_MSC_WRITECMD_ERASEPAGE_DEFAULT << 1)
 
#define MSC_WRITECMD_WRITEEND   (0x1UL << 2)
 
#define MSC_WRITECMD_WRITEEND_DEFAULT   (_MSC_WRITECMD_WRITEEND_DEFAULT << 2)
 
#define MSC_WRITECTRL_IRQERASEABORT   (0x1UL << 1)
 
#define MSC_WRITECTRL_IRQERASEABORT_DEFAULT   (_MSC_WRITECTRL_IRQERASEABORT_DEFAULT << 1)
 
#define MSC_WRITECTRL_LPWRITE   (0x1UL << 3)
 
#define MSC_WRITECTRL_LPWRITE_DEFAULT   (_MSC_WRITECTRL_LPWRITE_DEFAULT << 3)
 
#define MSC_WRITECTRL_WREN   (0x1UL << 0)
 
#define MSC_WRITECTRL_WREN_DEFAULT   (_MSC_WRITECTRL_WREN_DEFAULT << 0)
 

Macro Definition Documentation

#define _MSC_ADDRB_ADDRB_DEFAULT   0x00000000UL

Mode DEFAULT for MSC_ADDRB

Definition at line 246 of file efr32bg21_msc.h.

#define _MSC_ADDRB_ADDRB_MASK   0xFFFFFFFFUL

Bit mask for MSC_ADDRB

Definition at line 245 of file efr32bg21_msc.h.

#define _MSC_ADDRB_ADDRB_SHIFT   0

Shift value for MSC_ADDRB

Definition at line 244 of file efr32bg21_msc.h.

#define _MSC_ADDRB_MASK   0xFFFFFFFFUL

Mask for MSC_ADDRB

Definition at line 243 of file efr32bg21_msc.h.

#define _MSC_ADDRB_RESETVALUE   0x00000000UL

Default value for MSC_ADDRB

Definition at line 242 of file efr32bg21_msc.h.

#define _MSC_CMD_MASK   0x00000001UL

Mask for MSC_CMD

Definition at line 372 of file efr32bg21_msc.h.

#define _MSC_CMD_PWRUP_DEFAULT   0x00000000UL

Mode DEFAULT for MSC_CMD

Definition at line 376 of file efr32bg21_msc.h.

#define _MSC_CMD_PWRUP_MASK   0x1UL

Bit mask for MSC_PWRUP

Definition at line 375 of file efr32bg21_msc.h.

#define _MSC_CMD_PWRUP_SHIFT   0

Shift value for MSC_PWRUP

Definition at line 374 of file efr32bg21_msc.h.

#define _MSC_CMD_RESETVALUE   0x00000000UL

Default value for MSC_CMD

Definition at line 371 of file efr32bg21_msc.h.

#define _MSC_IEN_ERASE_DEFAULT   0x00000000UL

Mode DEFAULT for MSC_IEN

Definition at line 344 of file efr32bg21_msc.h.

#define _MSC_IEN_ERASE_MASK   0x1UL

Bit mask for MSC_ERASE

Definition at line 343 of file efr32bg21_msc.h.

#define _MSC_IEN_ERASE_SHIFT   0

Shift value for MSC_ERASE

Definition at line 342 of file efr32bg21_msc.h.

#define _MSC_IEN_MASK   0x00000107UL

Mask for MSC_IEN

Definition at line 340 of file efr32bg21_msc.h.

#define _MSC_IEN_PWRUPF_DEFAULT   0x00000000UL

Mode DEFAULT for MSC_IEN

Definition at line 359 of file efr32bg21_msc.h.

#define _MSC_IEN_PWRUPF_MASK   0x100UL

Bit mask for MSC_PWRUPF

Definition at line 358 of file efr32bg21_msc.h.

#define _MSC_IEN_PWRUPF_SHIFT   8

Shift value for MSC_PWRUPF

Definition at line 357 of file efr32bg21_msc.h.

#define _MSC_IEN_RESETVALUE   0x00000000UL

Default value for MSC_IEN

Definition at line 339 of file efr32bg21_msc.h.

#define _MSC_IEN_WDATAOV_DEFAULT   0x00000000UL

Mode DEFAULT for MSC_IEN

Definition at line 354 of file efr32bg21_msc.h.

#define _MSC_IEN_WDATAOV_MASK   0x4UL

Bit mask for MSC_WDATAOV

Definition at line 353 of file efr32bg21_msc.h.

#define _MSC_IEN_WDATAOV_SHIFT   2

Shift value for MSC_WDATAOV

Definition at line 352 of file efr32bg21_msc.h.

#define _MSC_IEN_WRITE_DEFAULT   0x00000000UL

Mode DEFAULT for MSC_IEN

Definition at line 349 of file efr32bg21_msc.h.

#define _MSC_IEN_WRITE_MASK   0x2UL

Bit mask for MSC_WRITE

Definition at line 348 of file efr32bg21_msc.h.

#define _MSC_IEN_WRITE_SHIFT   1

Shift value for MSC_WRITE

Definition at line 347 of file efr32bg21_msc.h.

#define _MSC_IF_ERASE_DEFAULT   0x00000000UL

Mode DEFAULT for MSC_IF

Definition at line 320 of file efr32bg21_msc.h.

#define _MSC_IF_ERASE_MASK   0x1UL

Bit mask for MSC_ERASE

Definition at line 319 of file efr32bg21_msc.h.

#define _MSC_IF_ERASE_SHIFT   0

Shift value for MSC_ERASE

Definition at line 318 of file efr32bg21_msc.h.

#define _MSC_IF_MASK   0x00000107UL

Mask for MSC_IF

Definition at line 316 of file efr32bg21_msc.h.

#define _MSC_IF_PWRUPF_DEFAULT   0x00000000UL

Mode DEFAULT for MSC_IF

Definition at line 335 of file efr32bg21_msc.h.

#define _MSC_IF_PWRUPF_MASK   0x100UL

Bit mask for MSC_PWRUPF

Definition at line 334 of file efr32bg21_msc.h.

#define _MSC_IF_PWRUPF_SHIFT   8

Shift value for MSC_PWRUPF

Definition at line 333 of file efr32bg21_msc.h.

#define _MSC_IF_RESETVALUE   0x00000000UL

Default value for MSC_IF

Definition at line 315 of file efr32bg21_msc.h.

#define _MSC_IF_WDATAOV_DEFAULT   0x00000000UL

Mode DEFAULT for MSC_IF

Definition at line 330 of file efr32bg21_msc.h.

#define _MSC_IF_WDATAOV_MASK   0x4UL

Bit mask for MSC_WDATAOV

Definition at line 329 of file efr32bg21_msc.h.

#define _MSC_IF_WDATAOV_SHIFT   2

Shift value for MSC_WDATAOV

Definition at line 328 of file efr32bg21_msc.h.

#define _MSC_IF_WRITE_DEFAULT   0x00000000UL

Mode DEFAULT for MSC_IF

Definition at line 325 of file efr32bg21_msc.h.

#define _MSC_IF_WRITE_MASK   0x2UL

Bit mask for MSC_WRITE

Definition at line 324 of file efr32bg21_msc.h.

#define _MSC_IF_WRITE_SHIFT   1

Shift value for MSC_WRITE

Definition at line 323 of file efr32bg21_msc.h.

#define _MSC_IPVERSION_IPVERSION_DEFAULT   0x00000000UL

Mode DEFAULT for MSC_IPVERSION

Definition at line 169 of file efr32bg21_msc.h.

#define _MSC_IPVERSION_IPVERSION_MASK   0xFFFFFFFFUL

Bit mask for MSC_IPVERSION

Definition at line 168 of file efr32bg21_msc.h.

#define _MSC_IPVERSION_IPVERSION_SHIFT   0

Shift value for MSC_IPVERSION

Definition at line 167 of file efr32bg21_msc.h.

#define _MSC_IPVERSION_MASK   0xFFFFFFFFUL

Mask for MSC_IPVERSION

Definition at line 166 of file efr32bg21_msc.h.

#define _MSC_IPVERSION_RESETVALUE   0x00000000UL

Default value for MSC_IPVERSION

Definition at line 165 of file efr32bg21_msc.h.

#define _MSC_LOCK_LOCKKEY_DEFAULT   0x00000000UL

Mode DEFAULT for MSC_LOCK

Definition at line 384 of file efr32bg21_msc.h.

#define _MSC_LOCK_LOCKKEY_LOCK   0x00000000UL

Mode LOCK for MSC_LOCK

Definition at line 385 of file efr32bg21_msc.h.

#define _MSC_LOCK_LOCKKEY_MASK   0xFFFFUL

Bit mask for MSC_LOCKKEY

Definition at line 383 of file efr32bg21_msc.h.

#define _MSC_LOCK_LOCKKEY_SHIFT   0

Shift value for MSC_LOCKKEY

Definition at line 382 of file efr32bg21_msc.h.

#define _MSC_LOCK_LOCKKEY_UNLOCK   0x00001B71UL

Mode UNLOCK for MSC_LOCK

Definition at line 386 of file efr32bg21_msc.h.

#define _MSC_LOCK_MASK   0x0000FFFFUL

Mask for MSC_LOCK

Definition at line 381 of file efr32bg21_msc.h.

#define _MSC_LOCK_RESETVALUE   0x00000000UL

Default value for MSC_LOCK

Definition at line 380 of file efr32bg21_msc.h.

#define _MSC_MISCLOCKWORD_MASK   0x00000011UL

Mask for MSC_MISCLOCKWORD

Definition at line 393 of file efr32bg21_msc.h.

#define _MSC_MISCLOCKWORD_MELOCKBIT_DEFAULT   0x00000001UL

Mode DEFAULT for MSC_MISCLOCKWORD

Definition at line 397 of file efr32bg21_msc.h.

#define _MSC_MISCLOCKWORD_MELOCKBIT_MASK   0x1UL

Bit mask for MSC_MELOCKBIT

Definition at line 396 of file efr32bg21_msc.h.

#define _MSC_MISCLOCKWORD_MELOCKBIT_SHIFT   0

Shift value for MSC_MELOCKBIT

Definition at line 395 of file efr32bg21_msc.h.

#define _MSC_MISCLOCKWORD_RESETVALUE   0x00000011UL

Default value for MSC_MISCLOCKWORD

Definition at line 392 of file efr32bg21_msc.h.

#define _MSC_MISCLOCKWORD_UDLOCKBIT_DEFAULT   0x00000001UL

Mode DEFAULT for MSC_MISCLOCKWORD

Definition at line 402 of file efr32bg21_msc.h.

#define _MSC_MISCLOCKWORD_UDLOCKBIT_MASK   0x10UL

Bit mask for MSC_UDLOCKBIT

Definition at line 401 of file efr32bg21_msc.h.

#define _MSC_MISCLOCKWORD_UDLOCKBIT_SHIFT   4

Shift value for MSC_UDLOCKBIT

Definition at line 400 of file efr32bg21_msc.h.

#define _MSC_PAGELOCK0_LOCKBIT_DEFAULT   0x00000000UL

Mode DEFAULT for MSC_PAGELOCK0

Definition at line 410 of file efr32bg21_msc.h.

#define _MSC_PAGELOCK0_LOCKBIT_MASK   0xFFFFFFFFUL

Bit mask for MSC_LOCKBIT

Definition at line 409 of file efr32bg21_msc.h.

#define _MSC_PAGELOCK0_LOCKBIT_SHIFT   0

Shift value for MSC_LOCKBIT

Definition at line 408 of file efr32bg21_msc.h.

#define _MSC_PAGELOCK0_MASK   0xFFFFFFFFUL

Mask for MSC_PAGELOCK0

Definition at line 407 of file efr32bg21_msc.h.

#define _MSC_PAGELOCK0_RESETVALUE   0x00000000UL

Default value for MSC_PAGELOCK0

Definition at line 406 of file efr32bg21_msc.h.

#define _MSC_PAGELOCK1_LOCKBIT_DEFAULT   0x00000000UL

Mode DEFAULT for MSC_PAGELOCK1

Definition at line 418 of file efr32bg21_msc.h.

#define _MSC_PAGELOCK1_LOCKBIT_MASK   0xFFFFFFFFUL

Bit mask for MSC_LOCKBIT

Definition at line 417 of file efr32bg21_msc.h.

#define _MSC_PAGELOCK1_LOCKBIT_SHIFT   0

Shift value for MSC_LOCKBIT

Definition at line 416 of file efr32bg21_msc.h.

#define _MSC_PAGELOCK1_MASK   0xFFFFFFFFUL

Mask for MSC_PAGELOCK1

Definition at line 415 of file efr32bg21_msc.h.

#define _MSC_PAGELOCK1_RESETVALUE   0x00000000UL

Default value for MSC_PAGELOCK1

Definition at line 414 of file efr32bg21_msc.h.

#define _MSC_PAGELOCK2_LOCKBIT_DEFAULT   0x00000000UL

Mode DEFAULT for MSC_PAGELOCK2

Definition at line 426 of file efr32bg21_msc.h.

#define _MSC_PAGELOCK2_LOCKBIT_MASK   0xFFFFFFFFUL

Bit mask for MSC_LOCKBIT

Definition at line 425 of file efr32bg21_msc.h.

#define _MSC_PAGELOCK2_LOCKBIT_SHIFT   0

Shift value for MSC_LOCKBIT

Definition at line 424 of file efr32bg21_msc.h.

#define _MSC_PAGELOCK2_MASK   0xFFFFFFFFUL

Mask for MSC_PAGELOCK2

Definition at line 423 of file efr32bg21_msc.h.

#define _MSC_PAGELOCK2_RESETVALUE   0x00000000UL

Default value for MSC_PAGELOCK2

Definition at line 422 of file efr32bg21_msc.h.

#define _MSC_PAGELOCK3_LOCKBIT_DEFAULT   0x00000000UL

Mode DEFAULT for MSC_PAGELOCK3

Definition at line 434 of file efr32bg21_msc.h.

#define _MSC_PAGELOCK3_LOCKBIT_MASK   0xFFFFFFFFUL

Bit mask for MSC_LOCKBIT

Definition at line 433 of file efr32bg21_msc.h.

#define _MSC_PAGELOCK3_LOCKBIT_SHIFT   0

Shift value for MSC_LOCKBIT

Definition at line 432 of file efr32bg21_msc.h.

#define _MSC_PAGELOCK3_MASK   0xFFFFFFFFUL

Mask for MSC_PAGELOCK3

Definition at line 431 of file efr32bg21_msc.h.

#define _MSC_PAGELOCK3_RESETVALUE   0x00000000UL

Default value for MSC_PAGELOCK3

Definition at line 430 of file efr32bg21_msc.h.

#define _MSC_READCTRL_DOUTBUFEN_DEFAULT   0x00000000UL

Mode DEFAULT for MSC_READCTRL

Definition at line 178 of file efr32bg21_msc.h.

#define _MSC_READCTRL_DOUTBUFEN_MASK   0x1000UL

Bit mask for MSC_DOUTBUFEN

Definition at line 177 of file efr32bg21_msc.h.

#define _MSC_READCTRL_DOUTBUFEN_SHIFT   12

Shift value for MSC_DOUTBUFEN

Definition at line 176 of file efr32bg21_msc.h.

#define _MSC_READCTRL_MASK   0x00301002UL

Mask for MSC_READCTRL

Definition at line 174 of file efr32bg21_msc.h.

#define _MSC_READCTRL_MODE_DEFAULT   0x00000002UL

Mode DEFAULT for MSC_READCTRL

Definition at line 182 of file efr32bg21_msc.h.

#define _MSC_READCTRL_MODE_MASK   0x300000UL

Bit mask for MSC_MODE

Definition at line 181 of file efr32bg21_msc.h.

Referenced by flashWaitStateControl().

#define _MSC_READCTRL_MODE_SHIFT   20

Shift value for MSC_MODE

Definition at line 180 of file efr32bg21_msc.h.

#define _MSC_READCTRL_MODE_WS0   0x00000000UL

Mode WS0 for MSC_READCTRL

Definition at line 183 of file efr32bg21_msc.h.

#define _MSC_READCTRL_MODE_WS1   0x00000001UL

Mode WS1 for MSC_READCTRL

Definition at line 184 of file efr32bg21_msc.h.

#define _MSC_READCTRL_MODE_WS2   0x00000002UL

Mode WS2 for MSC_READCTRL

Definition at line 185 of file efr32bg21_msc.h.

#define _MSC_READCTRL_MODE_WS3   0x00000003UL

Mode WS3 for MSC_READCTRL

Definition at line 186 of file efr32bg21_msc.h.

#define _MSC_READCTRL_RESETVALUE   0x00200000UL

Default value for MSC_READCTRL

Definition at line 173 of file efr32bg21_msc.h.

#define _MSC_STATUS_BUSY_DEFAULT   0x00000000UL

Mode DEFAULT for MSC_STATUS

Definition at line 263 of file efr32bg21_msc.h.

#define _MSC_STATUS_BUSY_MASK   0x1UL

Bit mask for MSC_BUSY

Definition at line 262 of file efr32bg21_msc.h.

#define _MSC_STATUS_BUSY_SHIFT   0

Shift value for MSC_BUSY

Definition at line 261 of file efr32bg21_msc.h.

#define _MSC_STATUS_ERASEABORTED_DEFAULT   0x00000000UL

Mode DEFAULT for MSC_STATUS

Definition at line 283 of file efr32bg21_msc.h.

#define _MSC_STATUS_ERASEABORTED_MASK   0x10UL

Bit mask for MSC_ERASEABORTED

Definition at line 282 of file efr32bg21_msc.h.

#define _MSC_STATUS_ERASEABORTED_SHIFT   4

Shift value for MSC_ERASEABORTED

Definition at line 281 of file efr32bg21_msc.h.

#define _MSC_STATUS_INVADDR_DEFAULT   0x00000000UL

Mode DEFAULT for MSC_STATUS

Definition at line 273 of file efr32bg21_msc.h.

#define _MSC_STATUS_INVADDR_MASK   0x4UL

Bit mask for MSC_INVADDR

Definition at line 272 of file efr32bg21_msc.h.

#define _MSC_STATUS_INVADDR_SHIFT   2

Shift value for MSC_INVADDR

Definition at line 271 of file efr32bg21_msc.h.

#define _MSC_STATUS_LOCKED_DEFAULT   0x00000000UL

Mode DEFAULT for MSC_STATUS

Definition at line 268 of file efr32bg21_msc.h.

#define _MSC_STATUS_LOCKED_MASK   0x2UL

Bit mask for MSC_LOCKED

Definition at line 267 of file efr32bg21_msc.h.

#define _MSC_STATUS_LOCKED_SHIFT   1

Shift value for MSC_LOCKED

Definition at line 266 of file efr32bg21_msc.h.

#define _MSC_STATUS_MASK   0xF801007FUL

Mask for MSC_STATUS

Definition at line 259 of file efr32bg21_msc.h.

#define _MSC_STATUS_PENDING_DEFAULT   0x00000000UL

Mode DEFAULT for MSC_STATUS

Definition at line 288 of file efr32bg21_msc.h.

#define _MSC_STATUS_PENDING_MASK   0x20UL

Bit mask for MSC_PENDING

Definition at line 287 of file efr32bg21_msc.h.

#define _MSC_STATUS_PENDING_SHIFT   5

Shift value for MSC_PENDING

Definition at line 286 of file efr32bg21_msc.h.

#define _MSC_STATUS_PWRUPCKBDFAILCOUNT_DEFAULT   0x00000000UL

Mode DEFAULT for MSC_STATUS

Definition at line 311 of file efr32bg21_msc.h.

#define _MSC_STATUS_PWRUPCKBDFAILCOUNT_MASK   0xF0000000UL

Bit mask for MSC_PWRUPCKBDFAILCOUNT

Definition at line 310 of file efr32bg21_msc.h.

#define _MSC_STATUS_PWRUPCKBDFAILCOUNT_SHIFT   28

Shift value for MSC_PWRUPCKBDFAILCOUNT

Definition at line 309 of file efr32bg21_msc.h.

#define _MSC_STATUS_REGLOCK_DEFAULT   0x00000000UL

Mode DEFAULT for MSC_STATUS

Definition at line 298 of file efr32bg21_msc.h.

#define _MSC_STATUS_REGLOCK_LOCKED   0x00000001UL

Mode LOCKED for MSC_STATUS

Definition at line 300 of file efr32bg21_msc.h.

#define _MSC_STATUS_REGLOCK_MASK   0x10000UL

Bit mask for MSC_REGLOCK

Definition at line 297 of file efr32bg21_msc.h.

Referenced by flashWaitStateControl().

#define _MSC_STATUS_REGLOCK_SHIFT   16

Shift value for MSC_REGLOCK

Definition at line 296 of file efr32bg21_msc.h.

#define _MSC_STATUS_REGLOCK_UNLOCKED   0x00000000UL

Mode UNLOCKED for MSC_STATUS

Definition at line 299 of file efr32bg21_msc.h.

#define _MSC_STATUS_RESETVALUE   0x08000008UL

Default value for MSC_STATUS

Definition at line 258 of file efr32bg21_msc.h.

#define _MSC_STATUS_TIMEOUT_DEFAULT   0x00000000UL

Mode DEFAULT for MSC_STATUS

Definition at line 293 of file efr32bg21_msc.h.

#define _MSC_STATUS_TIMEOUT_MASK   0x40UL

Bit mask for MSC_TIMEOUT

Definition at line 292 of file efr32bg21_msc.h.

#define _MSC_STATUS_TIMEOUT_SHIFT   6

Shift value for MSC_TIMEOUT

Definition at line 291 of file efr32bg21_msc.h.

#define _MSC_STATUS_WDATAREADY_DEFAULT   0x00000001UL

Mode DEFAULT for MSC_STATUS

Definition at line 278 of file efr32bg21_msc.h.

#define _MSC_STATUS_WDATAREADY_MASK   0x8UL

Bit mask for MSC_WDATAREADY

Definition at line 277 of file efr32bg21_msc.h.

#define _MSC_STATUS_WDATAREADY_SHIFT   3

Shift value for MSC_WDATAREADY

Definition at line 276 of file efr32bg21_msc.h.

#define _MSC_STATUS_WREADY_DEFAULT   0x00000001UL

Mode DEFAULT for MSC_STATUS

Definition at line 307 of file efr32bg21_msc.h.

#define _MSC_STATUS_WREADY_MASK   0x8000000UL

Bit mask for MSC_WREADY

Definition at line 306 of file efr32bg21_msc.h.

#define _MSC_STATUS_WREADY_SHIFT   27

Shift value for MSC_WREADY

Definition at line 305 of file efr32bg21_msc.h.

#define _MSC_TESTCTRL_MASK   0xD9BF11FFUL

Mask for MSC_TESTCTRL

Definition at line 439 of file efr32bg21_msc.h.

#define _MSC_TESTCTRL_RESETVALUE   0x00000100UL

Default value for MSC_TESTCTRL

Definition at line 438 of file efr32bg21_msc.h.

#define _MSC_TESTCTRL_XADRINC_DEFAULT   0x00000000UL

Mode DEFAULT for MSC_TESTCTRL

Definition at line 443 of file efr32bg21_msc.h.

#define _MSC_TESTCTRL_XADRINC_MASK   0x800000UL

Bit mask for MSC_XADRINC

Definition at line 442 of file efr32bg21_msc.h.

#define _MSC_TESTCTRL_XADRINC_ONE   0x00000000UL

Mode ONE for MSC_TESTCTRL

Definition at line 444 of file efr32bg21_msc.h.

#define _MSC_TESTCTRL_XADRINC_SHIFT   23

Shift value for MSC_XADRINC

Definition at line 441 of file efr32bg21_msc.h.

#define _MSC_TESTCTRL_XADRINC_TWO   0x00000001UL

Mode TWO for MSC_TESTCTRL

Definition at line 445 of file efr32bg21_msc.h.

#define _MSC_USERDATASIZE_MASK   0x0000003FUL

Mask for MSC_USERDATASIZE

Definition at line 364 of file efr32bg21_msc.h.

#define _MSC_USERDATASIZE_RESETVALUE   0x00000004UL

Default value for MSC_USERDATASIZE

Definition at line 363 of file efr32bg21_msc.h.

#define _MSC_USERDATASIZE_USERDATASIZE_DEFAULT   0x00000004UL

Mode DEFAULT for MSC_USERDATASIZE

Definition at line 367 of file efr32bg21_msc.h.

#define _MSC_USERDATASIZE_USERDATASIZE_MASK   0x3FUL

Bit mask for MSC_USERDATASIZE

Definition at line 366 of file efr32bg21_msc.h.

#define _MSC_USERDATASIZE_USERDATASIZE_SHIFT   0

Shift value for MSC_USERDATASIZE

Definition at line 365 of file efr32bg21_msc.h.

#define _MSC_WDATA_DATAW_DEFAULT   0x00000000UL

Mode DEFAULT for MSC_WDATA

Definition at line 254 of file efr32bg21_msc.h.

#define _MSC_WDATA_DATAW_MASK   0xFFFFFFFFUL

Bit mask for MSC_DATAW

Definition at line 253 of file efr32bg21_msc.h.

#define _MSC_WDATA_DATAW_SHIFT   0

Shift value for MSC_DATAW

Definition at line 252 of file efr32bg21_msc.h.

#define _MSC_WDATA_MASK   0xFFFFFFFFUL

Mask for MSC_WDATA

Definition at line 251 of file efr32bg21_msc.h.

#define _MSC_WDATA_RESETVALUE   0x00000000UL

Default value for MSC_WDATA

Definition at line 250 of file efr32bg21_msc.h.

#define _MSC_WRITECMD_CLEARWDATA_DEFAULT   0x00000000UL

Mode DEFAULT for MSC_WRITECMD

Definition at line 238 of file efr32bg21_msc.h.

#define _MSC_WRITECMD_CLEARWDATA_MASK   0x1000UL

Bit mask for MSC_CLEARWDATA

Definition at line 237 of file efr32bg21_msc.h.

#define _MSC_WRITECMD_CLEARWDATA_SHIFT   12

Shift value for MSC_CLEARWDATA

Definition at line 236 of file efr32bg21_msc.h.

#define _MSC_WRITECMD_ERASEABORT_DEFAULT   0x00000000UL

Mode DEFAULT for MSC_WRITECMD

Definition at line 228 of file efr32bg21_msc.h.

#define _MSC_WRITECMD_ERASEABORT_MASK   0x20UL

Bit mask for MSC_ERASEABORT

Definition at line 227 of file efr32bg21_msc.h.

#define _MSC_WRITECMD_ERASEABORT_SHIFT   5

Shift value for MSC_ERASEABORT

Definition at line 226 of file efr32bg21_msc.h.

#define _MSC_WRITECMD_ERASEMAIN0_DEFAULT   0x00000000UL

Mode DEFAULT for MSC_WRITECMD

Definition at line 233 of file efr32bg21_msc.h.

#define _MSC_WRITECMD_ERASEMAIN0_MASK   0x100UL

Bit mask for MSC_ERASEMAIN0

Definition at line 232 of file efr32bg21_msc.h.

#define _MSC_WRITECMD_ERASEMAIN0_SHIFT   8

Shift value for MSC_ERASEMAIN0

Definition at line 231 of file efr32bg21_msc.h.

#define _MSC_WRITECMD_ERASEPAGE_DEFAULT   0x00000000UL

Mode DEFAULT for MSC_WRITECMD

Definition at line 218 of file efr32bg21_msc.h.

#define _MSC_WRITECMD_ERASEPAGE_MASK   0x2UL

Bit mask for MSC_ERASEPAGE

Definition at line 217 of file efr32bg21_msc.h.

#define _MSC_WRITECMD_ERASEPAGE_SHIFT   1

Shift value for MSC_ERASEPAGE

Definition at line 216 of file efr32bg21_msc.h.

#define _MSC_WRITECMD_MASK   0x00001126UL

Mask for MSC_WRITECMD

Definition at line 214 of file efr32bg21_msc.h.

#define _MSC_WRITECMD_RESETVALUE   0x00000000UL

Default value for MSC_WRITECMD

Definition at line 213 of file efr32bg21_msc.h.

#define _MSC_WRITECMD_WRITEEND_DEFAULT   0x00000000UL

Mode DEFAULT for MSC_WRITECMD

Definition at line 223 of file efr32bg21_msc.h.

#define _MSC_WRITECMD_WRITEEND_MASK   0x4UL

Bit mask for MSC_WRITEEND

Definition at line 222 of file efr32bg21_msc.h.

#define _MSC_WRITECMD_WRITEEND_SHIFT   2

Shift value for MSC_WRITEEND

Definition at line 221 of file efr32bg21_msc.h.

#define _MSC_WRITECTRL_IRQERASEABORT_DEFAULT   0x00000000UL

Mode DEFAULT for MSC_WRITECTRL

Definition at line 204 of file efr32bg21_msc.h.

#define _MSC_WRITECTRL_IRQERASEABORT_MASK   0x2UL

Bit mask for MSC_IRQERASEABORT

Definition at line 203 of file efr32bg21_msc.h.

#define _MSC_WRITECTRL_IRQERASEABORT_SHIFT   1

Shift value for MSC_IRQERASEABORT

Definition at line 202 of file efr32bg21_msc.h.

#define _MSC_WRITECTRL_LPWRITE_DEFAULT   0x00000000UL

Mode DEFAULT for MSC_WRITECTRL

Definition at line 209 of file efr32bg21_msc.h.

#define _MSC_WRITECTRL_LPWRITE_MASK   0x8UL

Bit mask for MSC_LPWRITE

Definition at line 208 of file efr32bg21_msc.h.

#define _MSC_WRITECTRL_LPWRITE_SHIFT   3

Shift value for MSC_LPWRITE

Definition at line 207 of file efr32bg21_msc.h.

#define _MSC_WRITECTRL_MASK   0x0000000BUL

Mask for MSC_WRITECTRL

Definition at line 195 of file efr32bg21_msc.h.

#define _MSC_WRITECTRL_RESETVALUE   0x00000000UL

Default value for MSC_WRITECTRL

Definition at line 194 of file efr32bg21_msc.h.

#define _MSC_WRITECTRL_WREN_DEFAULT   0x00000000UL

Mode DEFAULT for MSC_WRITECTRL

Definition at line 199 of file efr32bg21_msc.h.

#define _MSC_WRITECTRL_WREN_MASK   0x1UL

Bit mask for MSC_WREN

Definition at line 198 of file efr32bg21_msc.h.

#define _MSC_WRITECTRL_WREN_SHIFT   0

Shift value for MSC_WREN

Definition at line 197 of file efr32bg21_msc.h.

#define MSC_ADDRB_ADDRB_DEFAULT   (_MSC_ADDRB_ADDRB_DEFAULT << 0)

Shifted mode DEFAULT for MSC_ADDRB

Definition at line 247 of file efr32bg21_msc.h.

#define MSC_CMD_PWRUP   (0x1UL << 0)

Flash Power Up Command

Definition at line 373 of file efr32bg21_msc.h.

#define MSC_CMD_PWRUP_DEFAULT   (_MSC_CMD_PWRUP_DEFAULT << 0)

Shifted mode DEFAULT for MSC_CMD

Definition at line 377 of file efr32bg21_msc.h.

#define MSC_IEN_ERASE   (0x1UL << 0)

Erase Done Interrupt enable

Definition at line 341 of file efr32bg21_msc.h.

#define MSC_IEN_ERASE_DEFAULT   (_MSC_IEN_ERASE_DEFAULT << 0)

Shifted mode DEFAULT for MSC_IEN

Definition at line 345 of file efr32bg21_msc.h.

#define MSC_IEN_PWRUPF   (0x1UL << 8)

Flash Power Up Sequence Complete

Definition at line 356 of file efr32bg21_msc.h.

#define MSC_IEN_PWRUPF_DEFAULT   (_MSC_IEN_PWRUPF_DEFAULT << 8)

Shifted mode DEFAULT for MSC_IEN

Definition at line 360 of file efr32bg21_msc.h.

#define MSC_IEN_WDATAOV   (0x1UL << 2)

write data buffer overflow irq enable

Definition at line 351 of file efr32bg21_msc.h.

#define MSC_IEN_WDATAOV_DEFAULT   (_MSC_IEN_WDATAOV_DEFAULT << 2)

Shifted mode DEFAULT for MSC_IEN

Definition at line 355 of file efr32bg21_msc.h.

#define MSC_IEN_WRITE   (0x1UL << 1)

Write Done Interrupt enable

Definition at line 346 of file efr32bg21_msc.h.

#define MSC_IEN_WRITE_DEFAULT   (_MSC_IEN_WRITE_DEFAULT << 1)

Shifted mode DEFAULT for MSC_IEN

Definition at line 350 of file efr32bg21_msc.h.

#define MSC_IF_ERASE   (0x1UL << 0)

Host Erase Done Interrupt Read Flag

Definition at line 317 of file efr32bg21_msc.h.

#define MSC_IF_ERASE_DEFAULT   (_MSC_IF_ERASE_DEFAULT << 0)

Shifted mode DEFAULT for MSC_IF

Definition at line 321 of file efr32bg21_msc.h.

#define MSC_IF_PWRUPF   (0x1UL << 8)

Flash Power Up Sequence Complete Flag

Definition at line 332 of file efr32bg21_msc.h.

#define MSC_IF_PWRUPF_DEFAULT   (_MSC_IF_PWRUPF_DEFAULT << 8)

Shifted mode DEFAULT for MSC_IF

Definition at line 336 of file efr32bg21_msc.h.

#define MSC_IF_WDATAOV   (0x1UL << 2)

Host write buffer overflow

Definition at line 327 of file efr32bg21_msc.h.

#define MSC_IF_WDATAOV_DEFAULT   (_MSC_IF_WDATAOV_DEFAULT << 2)

Shifted mode DEFAULT for MSC_IF

Definition at line 331 of file efr32bg21_msc.h.

#define MSC_IF_WRITE   (0x1UL << 1)

Host Write Done Interrupt Read Flag

Definition at line 322 of file efr32bg21_msc.h.

#define MSC_IF_WRITE_DEFAULT   (_MSC_IF_WRITE_DEFAULT << 1)

Shifted mode DEFAULT for MSC_IF

Definition at line 326 of file efr32bg21_msc.h.

#define MSC_IPVERSION_IPVERSION_DEFAULT   (_MSC_IPVERSION_IPVERSION_DEFAULT << 0)

Shifted mode DEFAULT for MSC_IPVERSION

Definition at line 170 of file efr32bg21_msc.h.

#define MSC_LOCK_LOCKKEY_DEFAULT   (_MSC_LOCK_LOCKKEY_DEFAULT << 0)

Shifted mode DEFAULT for MSC_LOCK

Definition at line 387 of file efr32bg21_msc.h.

#define MSC_LOCK_LOCKKEY_LOCK   (_MSC_LOCK_LOCKKEY_LOCK << 0)

Shifted mode LOCK for MSC_LOCK

Definition at line 388 of file efr32bg21_msc.h.

Referenced by flashWaitStateControl(), MSC_Deinit(), MSC_ErasePage(), and MSC_WriteWord().

#define MSC_LOCK_LOCKKEY_UNLOCK   (_MSC_LOCK_LOCKKEY_UNLOCK << 0)

Shifted mode UNLOCK for MSC_LOCK

Definition at line 389 of file efr32bg21_msc.h.

Referenced by flashWaitStateControl(), MSC_Deinit(), MSC_ErasePage(), MSC_Init(), and MSC_WriteWord().

#define MSC_MISCLOCKWORD_MELOCKBIT   (0x1UL << 0)

Mass Erase Lock

Definition at line 394 of file efr32bg21_msc.h.

#define MSC_MISCLOCKWORD_MELOCKBIT_DEFAULT   (_MSC_MISCLOCKWORD_MELOCKBIT_DEFAULT << 0)

Shifted mode DEFAULT for MSC_MISCLOCKWORD

Definition at line 398 of file efr32bg21_msc.h.

#define MSC_MISCLOCKWORD_UDLOCKBIT   (0x1UL << 4)

Mass Erase Lock

Definition at line 399 of file efr32bg21_msc.h.

#define MSC_MISCLOCKWORD_UDLOCKBIT_DEFAULT   (_MSC_MISCLOCKWORD_UDLOCKBIT_DEFAULT << 4)

Shifted mode DEFAULT for MSC_MISCLOCKWORD

Definition at line 403 of file efr32bg21_msc.h.

#define MSC_PAGELOCK0_LOCKBIT_DEFAULT   (_MSC_PAGELOCK0_LOCKBIT_DEFAULT << 0)

Shifted mode DEFAULT for MSC_PAGELOCK0

Definition at line 411 of file efr32bg21_msc.h.

#define MSC_PAGELOCK1_LOCKBIT_DEFAULT   (_MSC_PAGELOCK1_LOCKBIT_DEFAULT << 0)

Shifted mode DEFAULT for MSC_PAGELOCK1

Definition at line 419 of file efr32bg21_msc.h.

#define MSC_PAGELOCK2_LOCKBIT_DEFAULT   (_MSC_PAGELOCK2_LOCKBIT_DEFAULT << 0)

Shifted mode DEFAULT for MSC_PAGELOCK2

Definition at line 427 of file efr32bg21_msc.h.

#define MSC_PAGELOCK3_LOCKBIT_DEFAULT   (_MSC_PAGELOCK3_LOCKBIT_DEFAULT << 0)

Shifted mode DEFAULT for MSC_PAGELOCK3

Definition at line 435 of file efr32bg21_msc.h.

#define MSC_READCTRL_DOUTBUFEN   (0x1UL << 12)

Flash dout pipeline buffer enable

Definition at line 175 of file efr32bg21_msc.h.

Referenced by MSC_ExecConfigSet().

#define MSC_READCTRL_DOUTBUFEN_DEFAULT   (_MSC_READCTRL_DOUTBUFEN_DEFAULT << 12)

Shifted mode DEFAULT for MSC_READCTRL

Definition at line 179 of file efr32bg21_msc.h.

#define MSC_READCTRL_MODE_DEFAULT   (_MSC_READCTRL_MODE_DEFAULT << 20)

Shifted mode DEFAULT for MSC_READCTRL

Definition at line 187 of file efr32bg21_msc.h.

#define MSC_READCTRL_MODE_WS0   (_MSC_READCTRL_MODE_WS0 << 20)

Shifted mode WS0 for MSC_READCTRL

Definition at line 188 of file efr32bg21_msc.h.

Referenced by flashWaitStateControl().

#define MSC_READCTRL_MODE_WS1   (_MSC_READCTRL_MODE_WS1 << 20)

Shifted mode WS1 for MSC_READCTRL

Definition at line 189 of file efr32bg21_msc.h.

Referenced by flashWaitStateControl().

#define MSC_READCTRL_MODE_WS2   (_MSC_READCTRL_MODE_WS2 << 20)

Shifted mode WS2 for MSC_READCTRL

Definition at line 190 of file efr32bg21_msc.h.

#define MSC_READCTRL_MODE_WS3   (_MSC_READCTRL_MODE_WS3 << 20)

Shifted mode WS3 for MSC_READCTRL

Definition at line 191 of file efr32bg21_msc.h.

#define MSC_STATUS_BUSY   (0x1UL << 0)

Erase/Write Busy

Definition at line 260 of file efr32bg21_msc.h.

Referenced by MSC_ErasePage().

#define MSC_STATUS_BUSY_DEFAULT   (_MSC_STATUS_BUSY_DEFAULT << 0)

Shifted mode DEFAULT for MSC_STATUS

Definition at line 264 of file efr32bg21_msc.h.

#define MSC_STATUS_ERASEABORTED   (0x1UL << 4)

The Current Flash Erase Operation Aborted

Definition at line 280 of file efr32bg21_msc.h.

#define MSC_STATUS_ERASEABORTED_DEFAULT   (_MSC_STATUS_ERASEABORTED_DEFAULT << 4)

Shifted mode DEFAULT for MSC_STATUS

Definition at line 284 of file efr32bg21_msc.h.

#define MSC_STATUS_INVADDR   (0x1UL << 2)

Invalid Write Address or Erase Page

Definition at line 270 of file efr32bg21_msc.h.

#define MSC_STATUS_INVADDR_DEFAULT   (_MSC_STATUS_INVADDR_DEFAULT << 2)

Shifted mode DEFAULT for MSC_STATUS

Definition at line 274 of file efr32bg21_msc.h.

#define MSC_STATUS_LOCKED   (0x1UL << 1)

Access Locked

Definition at line 265 of file efr32bg21_msc.h.

#define MSC_STATUS_LOCKED_DEFAULT   (_MSC_STATUS_LOCKED_DEFAULT << 1)

Shifted mode DEFAULT for MSC_STATUS

Definition at line 269 of file efr32bg21_msc.h.

#define MSC_STATUS_PENDING   (0x1UL << 5)

Write command is in queue

Definition at line 285 of file efr32bg21_msc.h.

Referenced by MSC_ErasePage().

#define MSC_STATUS_PENDING_DEFAULT   (_MSC_STATUS_PENDING_DEFAULT << 5)

Shifted mode DEFAULT for MSC_STATUS

Definition at line 289 of file efr32bg21_msc.h.

#define MSC_STATUS_PWRUPCKBDFAILCOUNT_DEFAULT   (_MSC_STATUS_PWRUPCKBDFAILCOUNT_DEFAULT << 28)

Shifted mode DEFAULT for MSC_STATUS

Definition at line 312 of file efr32bg21_msc.h.

#define MSC_STATUS_REGLOCK   (0x1UL << 16)

Register Lock Status

Definition at line 295 of file efr32bg21_msc.h.

#define MSC_STATUS_REGLOCK_DEFAULT   (_MSC_STATUS_REGLOCK_DEFAULT << 16)

Shifted mode DEFAULT for MSC_STATUS

Definition at line 301 of file efr32bg21_msc.h.

#define MSC_STATUS_REGLOCK_LOCKED   (_MSC_STATUS_REGLOCK_LOCKED << 16)

Shifted mode LOCKED for MSC_STATUS

Definition at line 303 of file efr32bg21_msc.h.

Referenced by flashWaitStateControl().

#define MSC_STATUS_REGLOCK_UNLOCKED   (_MSC_STATUS_REGLOCK_UNLOCKED << 16)

Shifted mode UNLOCKED for MSC_STATUS

Definition at line 302 of file efr32bg21_msc.h.

#define MSC_STATUS_TIMEOUT   (0x1UL << 6)

Write command timeout flag

Definition at line 290 of file efr32bg21_msc.h.

#define MSC_STATUS_TIMEOUT_DEFAULT   (_MSC_STATUS_TIMEOUT_DEFAULT << 6)

Shifted mode DEFAULT for MSC_STATUS

Definition at line 294 of file efr32bg21_msc.h.

#define MSC_STATUS_WDATAREADY   (0x1UL << 3)

WDATA Write Ready

Definition at line 275 of file efr32bg21_msc.h.

#define MSC_STATUS_WDATAREADY_DEFAULT   (_MSC_STATUS_WDATAREADY_DEFAULT << 3)

Shifted mode DEFAULT for MSC_STATUS

Definition at line 279 of file efr32bg21_msc.h.

#define MSC_STATUS_WREADY   (0x1UL << 27)

Flash Write Ready

Definition at line 304 of file efr32bg21_msc.h.

#define MSC_STATUS_WREADY_DEFAULT   (_MSC_STATUS_WREADY_DEFAULT << 27)

Shifted mode DEFAULT for MSC_STATUS

Definition at line 308 of file efr32bg21_msc.h.

#define MSC_TESTCTRL_XADRINC   (0x1UL << 23)

Pattern check XADR Inc Mode

Definition at line 440 of file efr32bg21_msc.h.

#define MSC_TESTCTRL_XADRINC_DEFAULT   (_MSC_TESTCTRL_XADRINC_DEFAULT << 23)

Shifted mode DEFAULT for MSC_TESTCTRL

Definition at line 446 of file efr32bg21_msc.h.

#define MSC_TESTCTRL_XADRINC_ONE   (_MSC_TESTCTRL_XADRINC_ONE << 23)

Shifted mode ONE for MSC_TESTCTRL

Definition at line 447 of file efr32bg21_msc.h.

#define MSC_TESTCTRL_XADRINC_TWO   (_MSC_TESTCTRL_XADRINC_TWO << 23)

Shifted mode TWO for MSC_TESTCTRL

Definition at line 448 of file efr32bg21_msc.h.

#define MSC_USERDATASIZE_USERDATASIZE_DEFAULT   (_MSC_USERDATASIZE_USERDATASIZE_DEFAULT << 0)

Shifted mode DEFAULT for MSC_USERDATASIZE

Definition at line 368 of file efr32bg21_msc.h.

#define MSC_WDATA_DATAW_DEFAULT   (_MSC_WDATA_DATAW_DEFAULT << 0)

Shifted mode DEFAULT for MSC_WDATA

Definition at line 255 of file efr32bg21_msc.h.

#define MSC_WRITECMD_CLEARWDATA   (0x1UL << 12)

Clear WDATA state

Definition at line 235 of file efr32bg21_msc.h.

#define MSC_WRITECMD_CLEARWDATA_DEFAULT   (_MSC_WRITECMD_CLEARWDATA_DEFAULT << 12)

Shifted mode DEFAULT for MSC_WRITECMD

Definition at line 239 of file efr32bg21_msc.h.

#define MSC_WRITECMD_ERASEABORT   (0x1UL << 5)

Abort erase sequence

Definition at line 225 of file efr32bg21_msc.h.

#define MSC_WRITECMD_ERASEABORT_DEFAULT   (_MSC_WRITECMD_ERASEABORT_DEFAULT << 5)

Shifted mode DEFAULT for MSC_WRITECMD

Definition at line 229 of file efr32bg21_msc.h.

#define MSC_WRITECMD_ERASEMAIN0   (0x1UL << 8)

Mass erase region 0

Definition at line 230 of file efr32bg21_msc.h.

#define MSC_WRITECMD_ERASEMAIN0_DEFAULT   (_MSC_WRITECMD_ERASEMAIN0_DEFAULT << 8)

Shifted mode DEFAULT for MSC_WRITECMD

Definition at line 234 of file efr32bg21_msc.h.

#define MSC_WRITECMD_ERASEPAGE   (0x1UL << 1)

Erase Page

Definition at line 215 of file efr32bg21_msc.h.

Referenced by MSC_ErasePage().

#define MSC_WRITECMD_ERASEPAGE_DEFAULT   (_MSC_WRITECMD_ERASEPAGE_DEFAULT << 1)

Shifted mode DEFAULT for MSC_WRITECMD

Definition at line 219 of file efr32bg21_msc.h.

#define MSC_WRITECMD_WRITEEND   (0x1UL << 2)

End Write Mode

Definition at line 220 of file efr32bg21_msc.h.

#define MSC_WRITECMD_WRITEEND_DEFAULT   (_MSC_WRITECMD_WRITEEND_DEFAULT << 2)

Shifted mode DEFAULT for MSC_WRITECMD

Definition at line 224 of file efr32bg21_msc.h.

#define MSC_WRITECTRL_IRQERASEABORT   (0x1UL << 1)

Abort Page Erase on Interrupt

Definition at line 201 of file efr32bg21_msc.h.

#define MSC_WRITECTRL_IRQERASEABORT_DEFAULT   (_MSC_WRITECTRL_IRQERASEABORT_DEFAULT << 1)

Shifted mode DEFAULT for MSC_WRITECTRL

Definition at line 205 of file efr32bg21_msc.h.

#define MSC_WRITECTRL_LPWRITE   (0x1UL << 3)

Low-Power Erase

Definition at line 206 of file efr32bg21_msc.h.

#define MSC_WRITECTRL_LPWRITE_DEFAULT   (_MSC_WRITECTRL_LPWRITE_DEFAULT << 3)

Shifted mode DEFAULT for MSC_WRITECTRL

Definition at line 210 of file efr32bg21_msc.h.

#define MSC_WRITECTRL_WREN   (0x1UL << 0)

Enable Write/Erase Controller

Definition at line 196 of file efr32bg21_msc.h.

Referenced by MSC_Deinit(), MSC_ErasePage(), MSC_Init(), and MSC_WriteWord().

#define MSC_WRITECTRL_WREN_DEFAULT   (_MSC_WRITECTRL_WREN_DEFAULT << 0)

Shifted mode DEFAULT for MSC_WRITECTRL

Definition at line 200 of file efr32bg21_msc.h.