EFM32LG_WDOG_BitFieldsDevices

Macros

#define _WDOG_CMD_CLEAR_CLEARED   0x00000001UL
 
#define _WDOG_CMD_CLEAR_DEFAULT   0x00000000UL
 
#define _WDOG_CMD_CLEAR_MASK   0x1UL
 
#define _WDOG_CMD_CLEAR_SHIFT   0
 
#define _WDOG_CMD_CLEAR_UNCHANGED   0x00000000UL
 
#define _WDOG_CMD_MASK   0x00000001UL
 
#define _WDOG_CMD_RESETVALUE   0x00000000UL
 
#define _WDOG_CTRL_CLKSEL_DEFAULT   0x00000000UL
 
#define _WDOG_CTRL_CLKSEL_LFRCO   0x00000001UL
 
#define _WDOG_CTRL_CLKSEL_LFXO   0x00000002UL
 
#define _WDOG_CTRL_CLKSEL_MASK   0x3000UL
 
#define _WDOG_CTRL_CLKSEL_SHIFT   12
 
#define _WDOG_CTRL_CLKSEL_ULFRCO   0x00000000UL
 
#define _WDOG_CTRL_DEBUGRUN_DEFAULT   0x00000000UL
 
#define _WDOG_CTRL_DEBUGRUN_MASK   0x2UL
 
#define _WDOG_CTRL_DEBUGRUN_SHIFT   1
 
#define _WDOG_CTRL_EM2RUN_DEFAULT   0x00000000UL
 
#define _WDOG_CTRL_EM2RUN_MASK   0x4UL
 
#define _WDOG_CTRL_EM2RUN_SHIFT   2
 
#define _WDOG_CTRL_EM3RUN_DEFAULT   0x00000000UL
 
#define _WDOG_CTRL_EM3RUN_MASK   0x8UL
 
#define _WDOG_CTRL_EM3RUN_SHIFT   3
 
#define _WDOG_CTRL_EM4BLOCK_DEFAULT   0x00000000UL
 
#define _WDOG_CTRL_EM4BLOCK_MASK   0x20UL
 
#define _WDOG_CTRL_EM4BLOCK_SHIFT   5
 
#define _WDOG_CTRL_EN_DEFAULT   0x00000000UL
 
#define _WDOG_CTRL_EN_MASK   0x1UL
 
#define _WDOG_CTRL_EN_SHIFT   0
 
#define _WDOG_CTRL_LOCK_DEFAULT   0x00000000UL
 
#define _WDOG_CTRL_LOCK_MASK   0x10UL
 
#define _WDOG_CTRL_LOCK_SHIFT   4
 
#define _WDOG_CTRL_MASK   0x00003F7FUL
 
#define _WDOG_CTRL_PERSEL_DEFAULT   0x0000000FUL
 
#define _WDOG_CTRL_PERSEL_MASK   0xF00UL
 
#define _WDOG_CTRL_PERSEL_SHIFT   8
 
#define _WDOG_CTRL_RESETVALUE   0x00000F00UL
 
#define _WDOG_CTRL_SWOSCBLOCK_DEFAULT   0x00000000UL
 
#define _WDOG_CTRL_SWOSCBLOCK_MASK   0x40UL
 
#define _WDOG_CTRL_SWOSCBLOCK_SHIFT   6
 
#define _WDOG_SYNCBUSY_CMD_DEFAULT   0x00000000UL
 
#define _WDOG_SYNCBUSY_CMD_MASK   0x2UL
 
#define _WDOG_SYNCBUSY_CMD_SHIFT   1
 
#define _WDOG_SYNCBUSY_CTRL_DEFAULT   0x00000000UL
 
#define _WDOG_SYNCBUSY_CTRL_MASK   0x1UL
 
#define _WDOG_SYNCBUSY_CTRL_SHIFT   0
 
#define _WDOG_SYNCBUSY_MASK   0x00000003UL
 
#define _WDOG_SYNCBUSY_RESETVALUE   0x00000000UL
 
#define WDOG_CMD_CLEAR   (0x1UL << 0)
 
#define WDOG_CMD_CLEAR_CLEARED   (_WDOG_CMD_CLEAR_CLEARED << 0)
 
#define WDOG_CMD_CLEAR_DEFAULT   (_WDOG_CMD_CLEAR_DEFAULT << 0)
 
#define WDOG_CMD_CLEAR_UNCHANGED   (_WDOG_CMD_CLEAR_UNCHANGED << 0)
 
#define WDOG_CTRL_CLKSEL_DEFAULT   (_WDOG_CTRL_CLKSEL_DEFAULT << 12)
 
#define WDOG_CTRL_CLKSEL_LFRCO   (_WDOG_CTRL_CLKSEL_LFRCO << 12)
 
#define WDOG_CTRL_CLKSEL_LFXO   (_WDOG_CTRL_CLKSEL_LFXO << 12)
 
#define WDOG_CTRL_CLKSEL_ULFRCO   (_WDOG_CTRL_CLKSEL_ULFRCO << 12)
 
#define WDOG_CTRL_DEBUGRUN   (0x1UL << 1)
 
#define WDOG_CTRL_DEBUGRUN_DEFAULT   (_WDOG_CTRL_DEBUGRUN_DEFAULT << 1)
 
#define WDOG_CTRL_EM2RUN   (0x1UL << 2)
 
#define WDOG_CTRL_EM2RUN_DEFAULT   (_WDOG_CTRL_EM2RUN_DEFAULT << 2)
 
#define WDOG_CTRL_EM3RUN   (0x1UL << 3)
 
#define WDOG_CTRL_EM3RUN_DEFAULT   (_WDOG_CTRL_EM3RUN_DEFAULT << 3)
 
#define WDOG_CTRL_EM4BLOCK   (0x1UL << 5)
 
#define WDOG_CTRL_EM4BLOCK_DEFAULT   (_WDOG_CTRL_EM4BLOCK_DEFAULT << 5)
 
#define WDOG_CTRL_EN   (0x1UL << 0)
 
#define WDOG_CTRL_EN_DEFAULT   (_WDOG_CTRL_EN_DEFAULT << 0)
 
#define WDOG_CTRL_LOCK   (0x1UL << 4)
 
#define WDOG_CTRL_LOCK_DEFAULT   (_WDOG_CTRL_LOCK_DEFAULT << 4)
 
#define WDOG_CTRL_PERSEL_DEFAULT   (_WDOG_CTRL_PERSEL_DEFAULT << 8)
 
#define WDOG_CTRL_SWOSCBLOCK   (0x1UL << 6)
 
#define WDOG_CTRL_SWOSCBLOCK_DEFAULT   (_WDOG_CTRL_SWOSCBLOCK_DEFAULT << 6)
 
#define WDOG_SYNCBUSY_CMD   (0x1UL << 1)
 
#define WDOG_SYNCBUSY_CMD_DEFAULT   (_WDOG_SYNCBUSY_CMD_DEFAULT << 1)
 
#define WDOG_SYNCBUSY_CTRL   (0x1UL << 0)
 
#define WDOG_SYNCBUSY_CTRL_DEFAULT   (_WDOG_SYNCBUSY_CTRL_DEFAULT << 0)
 

Macro Definition Documentation

#define _WDOG_CMD_CLEAR_CLEARED   0x00000001UL

Mode CLEARED for WDOG_CMD

Definition at line 121 of file efm32lg_wdog.h.

#define _WDOG_CMD_CLEAR_DEFAULT   0x00000000UL

Mode DEFAULT for WDOG_CMD

Definition at line 119 of file efm32lg_wdog.h.

#define _WDOG_CMD_CLEAR_MASK   0x1UL

Bit mask for WDOG_CLEAR

Definition at line 118 of file efm32lg_wdog.h.

#define _WDOG_CMD_CLEAR_SHIFT   0

Shift value for WDOG_CLEAR

Definition at line 117 of file efm32lg_wdog.h.

#define _WDOG_CMD_CLEAR_UNCHANGED   0x00000000UL

Mode UNCHANGED for WDOG_CMD

Definition at line 120 of file efm32lg_wdog.h.

#define _WDOG_CMD_MASK   0x00000001UL

Mask for WDOG_CMD

Definition at line 115 of file efm32lg_wdog.h.

#define _WDOG_CMD_RESETVALUE   0x00000000UL

Default value for WDOG_CMD

Definition at line 114 of file efm32lg_wdog.h.

#define _WDOG_CTRL_CLKSEL_DEFAULT   0x00000000UL

Mode DEFAULT for WDOG_CTRL

Definition at line 104 of file efm32lg_wdog.h.

#define _WDOG_CTRL_CLKSEL_LFRCO   0x00000001UL

Mode LFRCO for WDOG_CTRL

Definition at line 106 of file efm32lg_wdog.h.

#define _WDOG_CTRL_CLKSEL_LFXO   0x00000002UL

Mode LFXO for WDOG_CTRL

Definition at line 107 of file efm32lg_wdog.h.

#define _WDOG_CTRL_CLKSEL_MASK   0x3000UL

Bit mask for WDOG_CLKSEL

Definition at line 103 of file efm32lg_wdog.h.

#define _WDOG_CTRL_CLKSEL_SHIFT   12

Shift value for WDOG_CLKSEL

Definition at line 102 of file efm32lg_wdog.h.

Referenced by WDOGn_Init().

#define _WDOG_CTRL_CLKSEL_ULFRCO   0x00000000UL

Mode ULFRCO for WDOG_CTRL

Definition at line 105 of file efm32lg_wdog.h.

#define _WDOG_CTRL_DEBUGRUN_DEFAULT   0x00000000UL

Mode DEFAULT for WDOG_CTRL

Definition at line 71 of file efm32lg_wdog.h.

#define _WDOG_CTRL_DEBUGRUN_MASK   0x2UL

Bit mask for WDOG_DEBUGRUN

Definition at line 70 of file efm32lg_wdog.h.

#define _WDOG_CTRL_DEBUGRUN_SHIFT   1

Shift value for WDOG_DEBUGRUN

Definition at line 69 of file efm32lg_wdog.h.

#define _WDOG_CTRL_EM2RUN_DEFAULT   0x00000000UL

Mode DEFAULT for WDOG_CTRL

Definition at line 76 of file efm32lg_wdog.h.

#define _WDOG_CTRL_EM2RUN_MASK   0x4UL

Bit mask for WDOG_EM2RUN

Definition at line 75 of file efm32lg_wdog.h.

#define _WDOG_CTRL_EM2RUN_SHIFT   2

Shift value for WDOG_EM2RUN

Definition at line 74 of file efm32lg_wdog.h.

#define _WDOG_CTRL_EM3RUN_DEFAULT   0x00000000UL

Mode DEFAULT for WDOG_CTRL

Definition at line 81 of file efm32lg_wdog.h.

#define _WDOG_CTRL_EM3RUN_MASK   0x8UL

Bit mask for WDOG_EM3RUN

Definition at line 80 of file efm32lg_wdog.h.

#define _WDOG_CTRL_EM3RUN_SHIFT   3

Shift value for WDOG_EM3RUN

Definition at line 79 of file efm32lg_wdog.h.

#define _WDOG_CTRL_EM4BLOCK_DEFAULT   0x00000000UL

Mode DEFAULT for WDOG_CTRL

Definition at line 91 of file efm32lg_wdog.h.

#define _WDOG_CTRL_EM4BLOCK_MASK   0x20UL

Bit mask for WDOG_EM4BLOCK

Definition at line 90 of file efm32lg_wdog.h.

#define _WDOG_CTRL_EM4BLOCK_SHIFT   5

Shift value for WDOG_EM4BLOCK

Definition at line 89 of file efm32lg_wdog.h.

#define _WDOG_CTRL_EN_DEFAULT   0x00000000UL

Mode DEFAULT for WDOG_CTRL

Definition at line 66 of file efm32lg_wdog.h.

#define _WDOG_CTRL_EN_MASK   0x1UL

Bit mask for WDOG_EN

Definition at line 65 of file efm32lg_wdog.h.

Referenced by WDOGn_IsEnabled().

#define _WDOG_CTRL_EN_SHIFT   0

Shift value for WDOG_EN

Definition at line 64 of file efm32lg_wdog.h.

Referenced by WDOGn_Enable().

#define _WDOG_CTRL_LOCK_DEFAULT   0x00000000UL

Mode DEFAULT for WDOG_CTRL

Definition at line 86 of file efm32lg_wdog.h.

#define _WDOG_CTRL_LOCK_MASK   0x10UL

Bit mask for WDOG_LOCK

Definition at line 85 of file efm32lg_wdog.h.

Referenced by WDOGn_IsLocked().

#define _WDOG_CTRL_LOCK_SHIFT   4

Shift value for WDOG_LOCK

Definition at line 84 of file efm32lg_wdog.h.

Referenced by WDOGn_Lock().

#define _WDOG_CTRL_MASK   0x00003F7FUL

Mask for WDOG_CTRL

Definition at line 62 of file efm32lg_wdog.h.

#define _WDOG_CTRL_PERSEL_DEFAULT   0x0000000FUL

Mode DEFAULT for WDOG_CTRL

Definition at line 100 of file efm32lg_wdog.h.

#define _WDOG_CTRL_PERSEL_MASK   0xF00UL

Bit mask for WDOG_PERSEL

Definition at line 99 of file efm32lg_wdog.h.

#define _WDOG_CTRL_PERSEL_SHIFT   8

Shift value for WDOG_PERSEL

Definition at line 98 of file efm32lg_wdog.h.

Referenced by WDOGn_Init().

#define _WDOG_CTRL_RESETVALUE   0x00000F00UL

Default value for WDOG_CTRL

Definition at line 61 of file efm32lg_wdog.h.

#define _WDOG_CTRL_SWOSCBLOCK_DEFAULT   0x00000000UL

Mode DEFAULT for WDOG_CTRL

Definition at line 96 of file efm32lg_wdog.h.

#define _WDOG_CTRL_SWOSCBLOCK_MASK   0x40UL

Bit mask for WDOG_SWOSCBLOCK

Definition at line 95 of file efm32lg_wdog.h.

#define _WDOG_CTRL_SWOSCBLOCK_SHIFT   6

Shift value for WDOG_SWOSCBLOCK

Definition at line 94 of file efm32lg_wdog.h.

#define _WDOG_SYNCBUSY_CMD_DEFAULT   0x00000000UL

Mode DEFAULT for WDOG_SYNCBUSY

Definition at line 137 of file efm32lg_wdog.h.

#define _WDOG_SYNCBUSY_CMD_MASK   0x2UL

Bit mask for WDOG_CMD

Definition at line 136 of file efm32lg_wdog.h.

#define _WDOG_SYNCBUSY_CMD_SHIFT   1

Shift value for WDOG_CMD

Definition at line 135 of file efm32lg_wdog.h.

#define _WDOG_SYNCBUSY_CTRL_DEFAULT   0x00000000UL

Mode DEFAULT for WDOG_SYNCBUSY

Definition at line 132 of file efm32lg_wdog.h.

#define _WDOG_SYNCBUSY_CTRL_MASK   0x1UL

Bit mask for WDOG_CTRL

Definition at line 131 of file efm32lg_wdog.h.

#define _WDOG_SYNCBUSY_CTRL_SHIFT   0

Shift value for WDOG_CTRL

Definition at line 130 of file efm32lg_wdog.h.

#define _WDOG_SYNCBUSY_MASK   0x00000003UL

Mask for WDOG_SYNCBUSY

Definition at line 128 of file efm32lg_wdog.h.

#define _WDOG_SYNCBUSY_RESETVALUE   0x00000000UL

Default value for WDOG_SYNCBUSY

Definition at line 127 of file efm32lg_wdog.h.

#define WDOG_CMD_CLEAR   (0x1UL << 0)

Watchdog Timer Clear

Definition at line 116 of file efm32lg_wdog.h.

Referenced by WDOGn_Feed().

#define WDOG_CMD_CLEAR_CLEARED   (_WDOG_CMD_CLEAR_CLEARED << 0)

Shifted mode CLEARED for WDOG_CMD

Definition at line 124 of file efm32lg_wdog.h.

#define WDOG_CMD_CLEAR_DEFAULT   (_WDOG_CMD_CLEAR_DEFAULT << 0)

Shifted mode DEFAULT for WDOG_CMD

Definition at line 122 of file efm32lg_wdog.h.

#define WDOG_CMD_CLEAR_UNCHANGED   (_WDOG_CMD_CLEAR_UNCHANGED << 0)

Shifted mode UNCHANGED for WDOG_CMD

Definition at line 123 of file efm32lg_wdog.h.

#define WDOG_CTRL_CLKSEL_DEFAULT   (_WDOG_CTRL_CLKSEL_DEFAULT << 12)

Shifted mode DEFAULT for WDOG_CTRL

Definition at line 108 of file efm32lg_wdog.h.

#define WDOG_CTRL_CLKSEL_LFRCO   (_WDOG_CTRL_CLKSEL_LFRCO << 12)

Shifted mode LFRCO for WDOG_CTRL

Definition at line 110 of file efm32lg_wdog.h.

#define WDOG_CTRL_CLKSEL_LFXO   (_WDOG_CTRL_CLKSEL_LFXO << 12)

Shifted mode LFXO for WDOG_CTRL

Definition at line 111 of file efm32lg_wdog.h.

#define WDOG_CTRL_CLKSEL_ULFRCO   (_WDOG_CTRL_CLKSEL_ULFRCO << 12)

Shifted mode ULFRCO for WDOG_CTRL

Definition at line 109 of file efm32lg_wdog.h.

#define WDOG_CTRL_DEBUGRUN   (0x1UL << 1)

Debug Mode Run Enable

Definition at line 68 of file efm32lg_wdog.h.

Referenced by WDOGn_Init().

#define WDOG_CTRL_DEBUGRUN_DEFAULT   (_WDOG_CTRL_DEBUGRUN_DEFAULT << 1)

Shifted mode DEFAULT for WDOG_CTRL

Definition at line 72 of file efm32lg_wdog.h.

#define WDOG_CTRL_EM2RUN   (0x1UL << 2)

Energy Mode 2 Run Enable

Definition at line 73 of file efm32lg_wdog.h.

Referenced by WDOGn_Init().

#define WDOG_CTRL_EM2RUN_DEFAULT   (_WDOG_CTRL_EM2RUN_DEFAULT << 2)

Shifted mode DEFAULT for WDOG_CTRL

Definition at line 77 of file efm32lg_wdog.h.

#define WDOG_CTRL_EM3RUN   (0x1UL << 3)

Energy Mode 3 Run Enable

Definition at line 78 of file efm32lg_wdog.h.

Referenced by WDOGn_Init().

#define WDOG_CTRL_EM3RUN_DEFAULT   (_WDOG_CTRL_EM3RUN_DEFAULT << 3)

Shifted mode DEFAULT for WDOG_CTRL

Definition at line 82 of file efm32lg_wdog.h.

#define WDOG_CTRL_EM4BLOCK   (0x1UL << 5)

Energy Mode 4 Block

Definition at line 88 of file efm32lg_wdog.h.

Referenced by WDOGn_Init().

#define WDOG_CTRL_EM4BLOCK_DEFAULT   (_WDOG_CTRL_EM4BLOCK_DEFAULT << 5)

Shifted mode DEFAULT for WDOG_CTRL

Definition at line 92 of file efm32lg_wdog.h.

#define WDOG_CTRL_EN   (0x1UL << 0)

Watchdog Timer Enable

Definition at line 63 of file efm32lg_wdog.h.

Referenced by WDOGn_Feed(), WDOGn_Init(), and WDOGn_IsEnabled().

#define WDOG_CTRL_EN_DEFAULT   (_WDOG_CTRL_EN_DEFAULT << 0)

Shifted mode DEFAULT for WDOG_CTRL

Definition at line 67 of file efm32lg_wdog.h.

#define WDOG_CTRL_LOCK   (0x1UL << 4)

Configuration lock

Definition at line 83 of file efm32lg_wdog.h.

Referenced by WDOGn_Enable(), WDOGn_Init(), and WDOGn_IsLocked().

#define WDOG_CTRL_LOCK_DEFAULT   (_WDOG_CTRL_LOCK_DEFAULT << 4)

Shifted mode DEFAULT for WDOG_CTRL

Definition at line 87 of file efm32lg_wdog.h.

#define WDOG_CTRL_PERSEL_DEFAULT   (_WDOG_CTRL_PERSEL_DEFAULT << 8)

Shifted mode DEFAULT for WDOG_CTRL

Definition at line 101 of file efm32lg_wdog.h.

#define WDOG_CTRL_SWOSCBLOCK   (0x1UL << 6)

Software Oscillator Disable Block

Definition at line 93 of file efm32lg_wdog.h.

Referenced by WDOGn_Init().

#define WDOG_CTRL_SWOSCBLOCK_DEFAULT   (_WDOG_CTRL_SWOSCBLOCK_DEFAULT << 6)

Shifted mode DEFAULT for WDOG_CTRL

Definition at line 97 of file efm32lg_wdog.h.

#define WDOG_SYNCBUSY_CMD   (0x1UL << 1)

CMD Register Busy

Definition at line 134 of file efm32lg_wdog.h.

Referenced by WDOGn_Enable(), and WDOGn_Feed().

#define WDOG_SYNCBUSY_CMD_DEFAULT   (_WDOG_SYNCBUSY_CMD_DEFAULT << 1)

Shifted mode DEFAULT for WDOG_SYNCBUSY

Definition at line 138 of file efm32lg_wdog.h.

#define WDOG_SYNCBUSY_CTRL   (0x1UL << 0)

CTRL Register Busy

Definition at line 129 of file efm32lg_wdog.h.

Referenced by WDOGn_Enable(), WDOGn_Feed(), WDOGn_Init(), and WDOGn_Lock().

#define WDOG_SYNCBUSY_CTRL_DEFAULT   (_WDOG_SYNCBUSY_CTRL_DEFAULT << 0)

Shifted mode DEFAULT for WDOG_SYNCBUSY

Definition at line 133 of file efm32lg_wdog.h.