LDMA_CH_TypeDef Struct ReferenceDevicesDevices > | LDMA

LDMA_CH LDMA CH Register

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Definition at line 47 of file efm32pg1b_ldma_ch.h.

#include <efm32pg1b_ldma_ch.h>

Data Fields

__IOM uint32_t CFG
 
__IOM uint32_t CTRL
 
__IOM uint32_t DST
 
__IOM uint32_t LINK
 
__IOM uint32_t LOOP
 
__IOM uint32_t REQSEL
 
uint32_t RESERVED0 [5U]
 
__IOM uint32_t SRC
 

Field Documentation

__IOM uint32_t LDMA_CH_TypeDef::CFG

Channel Configuration Register

Definition at line 49 of file efm32pg1b_ldma_ch.h.

__IOM uint32_t LDMA_CH_TypeDef::CTRL

Channel Descriptor Control Word Register

Definition at line 51 of file efm32pg1b_ldma_ch.h.

__IOM uint32_t LDMA_CH_TypeDef::DST

Channel Descriptor Destination Data Address Register

Definition at line 53 of file efm32pg1b_ldma_ch.h.

__IOM uint32_t LDMA_CH_TypeDef::LINK

Channel Descriptor Link Structure Address Register

Definition at line 54 of file efm32pg1b_ldma_ch.h.

__IOM uint32_t LDMA_CH_TypeDef::LOOP

Channel Loop Counter Register

Definition at line 50 of file efm32pg1b_ldma_ch.h.

__IOM uint32_t LDMA_CH_TypeDef::REQSEL

Channel Peripheral Request Select Register

Definition at line 48 of file efm32pg1b_ldma_ch.h.

uint32_t LDMA_CH_TypeDef::RESERVED0[5U]

Reserved future

Definition at line 55 of file efm32pg1b_ldma_ch.h.

__IOM uint32_t LDMA_CH_TypeDef::SRC

Channel Descriptor Source Data Address Register

Definition at line 52 of file efm32pg1b_ldma_ch.h.


The documentation for this struct was generated from the following file:
  • C:/repos/embsw_super_h1/platform/Device/SiliconLabs/EFM32PG1B/Include/efm32pg1b_ldma_ch.h