Peripheral Memory MapDevices > EFM32TG11B520F128GM80

Macros

#define ACMP0_BASE   (0x40080000UL)
 
#define ACMP1_BASE   (0x40080400UL)
 
#define ADC0_BASE   (0x40082000UL)
 
#define CAN0_BASE   (0x40004000UL)
 
#define CMU_BASE   (0x400E4000UL)
 
#define CRYOTIMER_BASE   (0x4008F000UL)
 
#define CRYPTO0_BASE   (0x400F0000UL)
 
#define CSEN_BASE   (0x4008E000UL)
 
#define DEVINFO_BASE   (0x0FE081B0UL)
 
#define EMU_BASE   (0x400E3000UL)
 
#define GPCRC_BASE   (0x4001C000UL)
 
#define GPIO_BASE   (0x40088000UL)
 
#define I2C0_BASE   (0x40089000UL)
 
#define I2C1_BASE   (0x40089400UL)
 
#define LCD_BASE   (0x40054000UL)
 
#define LDMA_BASE   (0x40002000UL)
 
#define LESENSE_BASE   (0x40055000UL)
 
#define LETIMER0_BASE   (0x40066000UL)
 
#define LEUART0_BASE   (0x4006A000UL)
 
#define LOCKBITS_BASE   (0x0FE04000UL)
 
#define MSC_BASE   (0x40000000UL)
 
#define MTB_BASE   (0xF0040000UL)
 
#define PCNT0_BASE   (0x4006E000UL)
 
#define PRS_BASE   (0x400E6000UL)
 
#define RMU_BASE   (0x400E5000UL)
 
#define ROMTABLE_BASE   (0xF00FFFD0UL)
 
#define RTCC_BASE   (0x40062000UL)
 
#define SMU_BASE   (0x40020000UL)
 
#define TIMER0_BASE   (0x40018000UL)
 
#define TIMER1_BASE   (0x40018400UL)
 
#define TRNG0_BASE   (0x4001D000UL)
 
#define UART0_BASE   (0x40014000UL)
 
#define USART0_BASE   (0x40010000UL)
 
#define USART1_BASE   (0x40010400UL)
 
#define USART2_BASE   (0x40010800UL)
 
#define USART3_BASE   (0x40010C00UL)
 
#define USERDATA_BASE   (0x0FE00000UL)
 
#define VDAC0_BASE   (0x40086000UL)
 
#define WDOG0_BASE   (0x40052000UL)
 
#define WTIMER0_BASE   (0x4001A000UL)
 
#define WTIMER1_BASE   (0x4001A400UL)
 

Macro Definition Documentation

#define ACMP0_BASE   (0x40080000UL)

ACMP0 base address

Definition at line 377 of file efm32tg11b520f128gm80.h.

#define ACMP1_BASE   (0x40080400UL)

ACMP1 base address

Definition at line 378 of file efm32tg11b520f128gm80.h.

#define ADC0_BASE   (0x40082000UL)

ADC0 base address

Definition at line 376 of file efm32tg11b520f128gm80.h.

#define CAN0_BASE   (0x40004000UL)

CAN0 base address

Definition at line 360 of file efm32tg11b520f128gm80.h.

#define CMU_BASE   (0x400E4000UL)

CMU base address

Definition at line 353 of file efm32tg11b520f128gm80.h.

Referenced by CHIP_Init().

#define CRYOTIMER_BASE   (0x4008F000UL)

CRYOTIMER base address

Definition at line 372 of file efm32tg11b520f128gm80.h.

#define CRYPTO0_BASE   (0x400F0000UL)

CRYPTO0 base address

Definition at line 354 of file efm32tg11b520f128gm80.h.

#define CSEN_BASE   (0x4008E000UL)

CSEN base address

Definition at line 380 of file efm32tg11b520f128gm80.h.

#define DEVINFO_BASE   (0x0FE081B0UL)

DEVINFO base address

Definition at line 387 of file efm32tg11b520f128gm80.h.

Referenced by SYSTEM_GetCalibrationValue().

#define EMU_BASE   (0x400E3000UL)

EMU base address

Definition at line 351 of file efm32tg11b520f128gm80.h.

Referenced by CHIP_Init(), EMU_EnterEM4(), and RMU_ResetCauseGet().

#define GPCRC_BASE   (0x4001C000UL)

GPCRC base address

Definition at line 359 of file efm32tg11b520f128gm80.h.

#define GPIO_BASE   (0x40088000UL)

GPIO base address

Definition at line 356 of file efm32tg11b520f128gm80.h.

#define I2C0_BASE   (0x40089000UL)

I2C0 base address

Definition at line 374 of file efm32tg11b520f128gm80.h.

#define I2C1_BASE   (0x40089400UL)

I2C1 base address

Definition at line 375 of file efm32tg11b520f128gm80.h.

#define LCD_BASE   (0x40054000UL)

LCD base address

Definition at line 381 of file efm32tg11b520f128gm80.h.

Referenced by CHIP_Init().

#define LDMA_BASE   (0x40002000UL)

LDMA base address

Definition at line 358 of file efm32tg11b520f128gm80.h.

#define LESENSE_BASE   (0x40055000UL)

LESENSE base address

Definition at line 355 of file efm32tg11b520f128gm80.h.

#define LETIMER0_BASE   (0x40066000UL)

LETIMER0 base address

Definition at line 371 of file efm32tg11b520f128gm80.h.

#define LEUART0_BASE   (0x4006A000UL)

LEUART0 base address

Definition at line 370 of file efm32tg11b520f128gm80.h.

#define LOCKBITS_BASE   (0x0FE04000UL)

Lock-bits page base address

Definition at line 389 of file efm32tg11b520f128gm80.h.

#define MSC_BASE   (0x40000000UL)

MSC base address

Definition at line 350 of file efm32tg11b520f128gm80.h.

#define MTB_BASE   (0xF0040000UL)

MTB base address

Definition at line 386 of file efm32tg11b520f128gm80.h.

#define PCNT0_BASE   (0x4006E000UL)

PCNT0 base address

Definition at line 373 of file efm32tg11b520f128gm80.h.

#define PRS_BASE   (0x400E6000UL)

PRS base address

Definition at line 357 of file efm32tg11b520f128gm80.h.

#define RMU_BASE   (0x400E5000UL)

RMU base address

Definition at line 352 of file efm32tg11b520f128gm80.h.

#define ROMTABLE_BASE   (0xF00FFFD0UL)

ROMTABLE base address

Definition at line 388 of file efm32tg11b520f128gm80.h.

#define RTCC_BASE   (0x40062000UL)

RTCC base address

Definition at line 382 of file efm32tg11b520f128gm80.h.

#define SMU_BASE   (0x40020000UL)

SMU base address

Definition at line 384 of file efm32tg11b520f128gm80.h.

#define TIMER0_BASE   (0x40018000UL)

TIMER0 base address

Definition at line 361 of file efm32tg11b520f128gm80.h.

#define TIMER1_BASE   (0x40018400UL)

TIMER1 base address

Definition at line 362 of file efm32tg11b520f128gm80.h.

#define TRNG0_BASE   (0x4001D000UL)

TRNG0 base address

Definition at line 385 of file efm32tg11b520f128gm80.h.

#define UART0_BASE   (0x40014000UL)

UART0 base address

Definition at line 369 of file efm32tg11b520f128gm80.h.

#define USART0_BASE   (0x40010000UL)

USART0 base address

Definition at line 365 of file efm32tg11b520f128gm80.h.

#define USART1_BASE   (0x40010400UL)

USART1 base address

Definition at line 366 of file efm32tg11b520f128gm80.h.

#define USART2_BASE   (0x40010800UL)

USART2 base address

Definition at line 367 of file efm32tg11b520f128gm80.h.

#define USART3_BASE   (0x40010C00UL)

USART3 base address

Definition at line 368 of file efm32tg11b520f128gm80.h.

#define USERDATA_BASE   (0x0FE00000UL)

User data page base address

Definition at line 390 of file efm32tg11b520f128gm80.h.

#define VDAC0_BASE   (0x40086000UL)

VDAC0 base address

Definition at line 379 of file efm32tg11b520f128gm80.h.

#define WDOG0_BASE   (0x40052000UL)

WDOG0 base address

Definition at line 383 of file efm32tg11b520f128gm80.h.

#define WTIMER0_BASE   (0x4001A000UL)

WTIMER0 base address

Definition at line 363 of file efm32tg11b520f128gm80.h.

#define WTIMER1_BASE   (0x4001A400UL)

WTIMER1 base address

Definition at line 364 of file efm32tg11b520f128gm80.h.