SMU_TypeDef Struct ReferenceDevices > EFR32MG13P932F512GM48 > Peripheral TypeDefsDevices > EFR32MG13P932F512GM48 > | Bit Fields > SMUDevices > | SMU

SMU Register Declaration

Definition at line 527 of file efr32mg13p932f512gm48.h.

#include <efr32mg13p932f512gm48.h>

Data Fields

__IOM uint32_t IEN
 
__IM uint32_t IF
 
__IOM uint32_t IFC
 
__IOM uint32_t IFS
 
__IOM uint32_t PPUCTRL
 
__IM uint32_t PPUFS
 
__IOM uint32_t PPUPATD0
 
__IOM uint32_t PPUPATD1
 
uint32_t RESERVED0 [3U]
 
uint32_t RESERVED1 [9U]
 
uint32_t RESERVED2 [3U]
 
uint32_t RESERVED3 [14U]
 

Field Documentation

__IOM uint32_t SMU_TypeDef::IEN

Interrupt Enable Register

Definition at line 532 of file efr32mg13p932f512gm48.h.

__IM uint32_t SMU_TypeDef::IF

Interrupt Flag Register

Definition at line 529 of file efr32mg13p932f512gm48.h.

__IOM uint32_t SMU_TypeDef::IFC

Interrupt Flag Clear Register

Definition at line 531 of file efr32mg13p932f512gm48.h.

__IOM uint32_t SMU_TypeDef::IFS

Interrupt Flag Set Register

Definition at line 530 of file efr32mg13p932f512gm48.h.

__IOM uint32_t SMU_TypeDef::PPUCTRL

PPU Control Register

Definition at line 535 of file efr32mg13p932f512gm48.h.

__IM uint32_t SMU_TypeDef::PPUFS

PPU Fault Status

Definition at line 541 of file efr32mg13p932f512gm48.h.

__IOM uint32_t SMU_TypeDef::PPUPATD0

PPU Privilege Access Type Descriptor 0

Definition at line 537 of file efr32mg13p932f512gm48.h.

__IOM uint32_t SMU_TypeDef::PPUPATD1

PPU Privilege Access Type Descriptor 1

Definition at line 538 of file efr32mg13p932f512gm48.h.

uint32_t SMU_TypeDef::RESERVED0

Reserved for future use

Definition at line 528 of file efr32mg13p932f512gm48.h.

uint32_t SMU_TypeDef::RESERVED1

Reserved for future use

Definition at line 534 of file efr32mg13p932f512gm48.h.

uint32_t SMU_TypeDef::RESERVED2

Reserved for future use

Definition at line 536 of file efr32mg13p932f512gm48.h.

uint32_t SMU_TypeDef::RESERVED3

Reserved for future use

Definition at line 540 of file efr32mg13p932f512gm48.h.


The documentation for this struct was generated from the following files:
  • C:/repos/embsw_super_h1/platform/Device/SiliconLabs/EFR32MG13P/Include/efr32mg13p932f512gm48.h
  • C:/repos/embsw_super_h1/platform/Device/SiliconLabs/EFR32MG13P/Include/efr32mg13p_smu.h