Driver for Micrel KSZ8851SNL Ethernet controller.

License

SPDX-License-Identifier: Zlib

The licensor of this software is Silicon Laboratories Inc.

This software is provided 'as-is', without any express or implied warranty. In no event will the authors be held liable for any damages arising from the use of this software.

Permission is granted to anyone to use this software for any purpose, including commercial applications, and to alter it and redistribute it freely, subject to the following restrictions:

The origin of this software must not be misrepresented; you must not claim that you wrote the original software. If you use this software in a product, an acknowledgment in the product documentation would be appreciated but is not required.
Altered source versions must be plainly marked as such, and must not be misrepresented as being the original software.
This notice may not be removed or altered from any source distribution.

Definition in file ksz8851snl.c.

#include <stdio.h>
#include "ksz8851snl.h"
#include "ksz8851snl_spi.h"
#include "em_assert.h"
#include "lwip/sys.h"
#include "lwipopts.h"
#include "lwip/debug.h"

Macros
#define	AUTO_NEG 0x1000

#define	BLOCKING_RECEIVE 0

#define	BYTE_MASK 0x00FF

#define	BYTE_SIZE 0x0008

#define	CHECKSUM_VALID_FRAME_MASK 0x3C17

#define	CHIP_ID_MASK 0xFFF0

#define	CIDER 0xC0

#define	CLEAR_INT 0xFFFF

#define	DIGITAL_LOOPBACK 0x4000

#define	EXTRA_SIZE 0x0008

#define	FCHWR 0xB2

#define	FCLWR 0xB0

#define	FD_PTR_AUTO_INC 0x4000

#define	FORCE_100 0x2000

#define	FORCE_FULL_DUPLEX 0x0100

#define	FRAME_COUNT_THRESHOLD 1

#define	FRAME_ID_MASK 0x003F

#define	GLOBAL_SOFT_RESET 0x0001

#define	GRR 0x26

#define	HIGH_QMU_MAC_H 0x00

#define	HIGH_QMU_MAC_L 0x0B

#define	IACR 0xC8

#define	IADHR 0xD2

#define	IADLR 0xD0

#define	IER 0x90

#define	ISR 0x92

#define	KSZ8851SNL_CHIP_ID 0x8870

#define	LSB_MASK 0x00FF

#define	MARH 0x14

#define	MARL 0x10

#define	MARM 0x12

#define	MIB_MASK 0x1C00

#define	MIB_Rx1024to1521Octets 0x13

#define	MIB_Rx128to255Octets 0x10

#define	MIB_Rx1522to2000Octets 0x14

#define	MIB_Rx256to511Octets 0x11

#define	MIB_Rx512to1023Octets 0x12

#define	MIB_Rx64Octets 0x0E

#define	MIB_Rx65to127Octets 0x0F

#define	MIB_RxAlignmentError 0x08

#define	MIB_RxBroadcast 0x0B

#define	MIB_RxByte 0x00

#define	MIB_RxControl8808Pkts 0x09

#define	MIB_RxCRCError 0x07

#define	MIB_RxFragments 0x03

#define	MIB_RxJabbers 0x05

#define	MIB_RxMulticast 0x0C

#define	MIB_RxOversize 0x04

#define	MIB_RxPausePkts 0x0A

#define	MIB_RxSymbolError 0x06

#define	MIB_RxUndersizePkt 0x02

#define	MIB_RxUnicast 0x0D

#define	MIB_TxBroadcastPkts 0x18

#define	MIB_TxByte 0x15

#define	MIB_TxDeferred 0x1B

#define	MIB_TxExcessiveCollision 0x1D

#define	MIB_TxLateCollision 0x16

#define	MIB_TxMulticastPkts 0x19

#define	MIB_TxMultipleCollision 0x1F

#define	MIB_TxPausePkts 0x17

#define	MIB_TxSingleCollision 0x1E

#define	MIB_TxTotalCollision 0x1C

#define	MIB_TxUnicastPkts 0x1A

#define	MIB_XXX 0x01

#define	MID_QMU_MAC_H 0x57

#define	MSB_POS 0x0008

#define	NO_INT 0x0000

#define	OBCR 0x20

#define	ONE_FRAME_THRES 0x0001

#define	P1CR 0xF6

#define	P1MBCR 0xE4

#define	P1SR 0xF8

#define	PHY_RESET 0x0001

#define	PHYRR 0xD8

#define	PMECR 0xD4

#define	PORT1_AN_DONE 0x0040

#define	PORT1_AUTO_MDIX_DISABLE 0x0400

#define	PORT1_AUTO_NEG_100BTX 0x0004

#define	PORT1_AUTO_NEG_100BTX_FD 0x0008

#define	PORT1_AUTO_NEG_10BT 0x0001

#define	PORT1_AUTO_NEG_10BT_FD 0x0002

#define	PORT1_AUTO_NEG_ENABLE 0x0080

#define	PORT1_AUTO_NEG_FLOW_CTRL 0x0010

#define	PORT1_AUTO_NEG_RESTART 0x2000

#define	PORT1_CONFIG

#define	PORT1_FORCE_100_MBIT 0x0040

#define	PORT1_FORCE_FULL_DUPLEX 0x0020

#define	PORT1_FORCE_MDIX 0x0200

#define	PORT1_LED_OFF 0x8000

#define	PORT1_LINK_GOOD 0x0020

#define	PORT1_POWER_DOWN 0x0800

#define	PORT1_TX_DISABLE 0x4000

#define	QMU_MODULE_SOFT_RESET 0x0002

#define	RESTART_AUTO_NEG 0x0200

#define	RX_BYTE_CNT_MASK 0x0FFF

#define	RX_FLOW_CTRL1_CONFIG

#define	RX_FLOW_CTRL2_CONFIG

#define	RX_FLOW_CTRL_BAD_PACKET 0x0200

#define	RX_FLOW_CTRL_BLOCK_MAC 0x0001

#define	RX_FLOW_CTRL_BROADCAST_ENABLE 0x0080

#define	RX_FLOW_CTRL_BURST_LEN_16 0x0040

#define	RX_FLOW_CTRL_BURST_LEN_32 0x0060

#define	RX_FLOW_CTRL_BURST_LEN_4 0x0000

#define	RX_FLOW_CTRL_BURST_LEN_8 0x0020

#define	RX_FLOW_CTRL_BURST_LEN_FRAME 0x0080

#define	RX_FLOW_CTRL_BURST_LEN_MASK 0x00E0

#define	RX_FLOW_CTRL_FLOW_ENENABLE 0x0400

#define	RX_FLOW_CTRL_FLUSH_QUEUE 0x8000

#define	RX_FLOW_CTRL_ICMP_CHECKSUM 0x0002

#define	RX_FLOW_CTRL_INVERSE_FILTER 0x0002

#define	RX_FLOW_CTRL_IP_CHECKSUM 0x1000

#define	RX_FLOW_CTRL_IPV6_UDP_FRAG_PASS 0x0010

#define	RX_FLOW_CTRL_IPV6_UDP_ZERO_PASS 0x0008

#define	RX_FLOW_CTRL_MAC_FILTER 0x0800

#define	RX_FLOW_CTRL_MULTICAST_ENABLE 0x0040

#define	RX_FLOW_CTRL_PROMISCUOUS_MODE 0x0012

#define	RX_FLOW_CTRL_RX_ALL 0x0010

#define	RX_FLOW_CTRL_RX_ENABLE 0x0001

#define	RX_FLOW_CTRL_TCP_CHECKSUM 0x2000

#define	RX_FLOW_CTRL_UDP_CHECKSUM 0x4000

#define	RX_FLOW_CTRL_UDP_LITE_CHECKSUM 0x0004

#define	RX_FLOW_CTRL_UNICAST_ENABLE 0x0020

#define	RXCR1 0x74

#define	RXCR2 0x76

#define	RXFCTR 0x9C

#define	RXFDPR 0x86

#define	RXFHBCR 0x7E

#define	RXFHSR 0x7C

#define	RXQ_AUTO_DEQUEUE 0x0010

#define	RXQ_CMD_CONFIG

#define	RXQ_EN_ON_BYTE_CNT_INT 0x0040

#define	RXQ_EN_ON_FRAME_CNT_INT 0x0020

#define	RXQ_EN_ON_TIME_INT 0x0080

#define	RXQ_ON_BYTE_CNT_INT 0x0800

#define	RXQ_ON_FRAME_CNT_INT 0x0400

#define	RXQ_ON_TIME_INT 0x1000

#define	RXQ_RELEASE_ERROR_FRAME 0x0001

#define	RXQ_START_DMA 0x0008

#define	RXQ_TWOBYTE_OFFSET 0x0200

#define	RXQCR 0x82

#define	TX_FLOW_CTRL_CONFIG

#define	TX_FLOW_CTRL_CRC_ENABLE 0x0002

#define	TX_FLOW_CTRL_ENABLE 0x0001

#define	TX_FLOW_CTRL_FLOW_ENABLE 0x0008

#define	TX_FLOW_CTRL_FLUSH_QUEUE 0x0010

#define	TX_FLOW_CTRL_ICMP_CHECKSUM 0x0100

#define	TX_FLOW_CTRL_IP_CHECKSUM 0x0020

#define	TX_FLOW_CTRL_PAD_ENABLE 0x0004

#define	TX_FLOW_CTRL_TCP_CHECKSUM 0x0040

#define	TX_INT_on_COMPLETION 0x8000

#define	TX_MEM_AVAIL_MASK 0x1FFF

#define	TX_MEMORY_WAIT_MS 500

#define	TXCR 0x70

#define	TXFDPR 0x84

#define	TXMIR 0x78

#define	TXNTFSR 0x9E

#define	TXQ_AUTO_ENQUEUE 0x0004

#define	TXQ_ENQUEUE 0x0001

#define	TXQ_MEM_AVAILABLE_INT 0x0002

#define	TXQCR 0x80

#define	VALID_FRAME_MASK 0x8000

#define	WATERMARK_4KB 0x0400

#define	WATERMARK_6KB 0x0600

#define	WORD_SIZE 0x0004

Functions
void	KSZ8851SNL_AllRegistersDump (void)
	Prints the value of the registers of the ethernet controller.

void	KSZ8851SNL_Enable (void)
	Enable RX and TX.

uint16_t	KSZ8851SNL_FrameCounterGet (void)
	FrameCounter.

void	KSZ8851SNL_FrameCounterSet (void)
	FrameCounter.

void	KSZ8851SNL_Init (void)
	Initialize the registers of the ethernet controller.

void	KSZ8851SNL_IntClear (uint16_t flags)
	Clear interrupt flags.

void	KSZ8851SNL_IntDisable (void)
	disables the chip interrupts

void	KSZ8851SNL_IntEnable (void)
	enables the chip interrupts

uint16_t	KSZ8851SNL_IntGet (void)
	Get interrupt flags.

void	KSZ8851SNL_MacAddressGet (uint8_t *macAddress)
	Get the MAC address of the current board.

void	KSZ8851SNL_MIBCountersDump (void)
	Dumps the Management Information Base Counters.

void	KSZ8851SNL_MIBCountersUpdate (void)
	Update the Management Information Base Counters.

uint16_t	KSZ8851SNL_PHYStatusGet (void)
	Get the PHY status.

void	KSZ8851SNL_PMECRStatusClear (uint16_t flags)
	Clear PMECR (Power Management Event Control Register) flags.

uint16_t	KSZ8851SNL_Receive (uint16_t length, uint8_t *buffer)
	Performs the actual receive of a raw frame over the network.

void	KSZ8851SNL_RegistersDump (void)
	Prints the value of the registers of the ethernet controller.

uint16_t	KSZ8851SNL_RXQCRGet (void)
	Get RXQCR register.

void	KSZ8851SNL_RxQueueReset (void)
	Reset RxQueue.

void	KSZ8851SNL_Transmit (uint16_t length, const uint8_t *buffer)
	Transmit a chunk of data to the ethernet controller. The chunk can be either a full ethernet frame or a partial chunk of an ethernet frame.

bool	KSZ8851SNL_TransmitBegin (uint16_t length)
	Prepares for a transmission of an ethernet frame over the network.

void	KSZ8851SNL_TransmitEnd (uint16_t length)
	Ends a transmission of an ethernet frame to the ethernet controller.

void	KSZ8851SNL_TxQueueReset (void)
	Reset TxQueue.

static uint32_t	MIBCountersRead (uint16_t offset)
	helper function for KSZ8851SNL_UpdateMIBCounters

static void	ReleaseIncosistentFrame (void)
	Release the current frame if it is inconsistent.

Variables
static KSZ8851SLN_mib_t	mibCounters
	Copy of the current MIB counters values from the ksz8851snl. This is updated by calling KSZ8851SNL_MIBCountersUpdate.

ksz8851snl.c File Reference

License

Macros

Functions

Variables