Timer Developer Guide Appendix#

This appendix provides reference material, examples, and supporting information for working with timers, clocks, and power management in embedded systems. It includes glossary terms, acronyms, extended examples, reference tables, troubleshooting guidance, best practices, and related resources.

Glossary#

The glossary defines key terms related to timers, power management, and clock systems. Use this section to clarify technical concepts when configuring or debugging hardware timers.

Timer-Specific Terms#

Counter: A digital circuit that increments or decrements on each clock pulse. Counters measure time intervals or count events.

Prescaler: A clock divider that reduces the input clock frequency to a lower frequency for the timer counter. Prescalers extend timing periods.

Compare Match: An event that occurs when a timer counter value equals a predefined compare value. Compare match events often trigger interrupts or toggle outputs.

Capture: The process of storing the current timer counter value when an external event occurs. Capture enables precise timing measurements.

Pulse Width Modulation (PWM): A technique for generating variable-width pulses to control power delivered to electrical devices.

Duty Cycle: The percentage of time a PWM signal remains in the "on" state relative to the total period.

Jitter: Variations in timing between consecutive events. Jitter often results from clock instability or system interrupts.

Latency: The delay between when an event occurs and when the system responds.

Resolution: The smallest time increment that a timer can measure or generate.

Overflow: A condition where a timer counter reaches its maximum value and wraps back to zero.

Power Management Terms#

Power management terms describe operating states and subsystems that affect energy consumption.

Power State (PS): Different operating modes of the system, each with specific power consumption and functionality levels.

PS4 (High Power): Full operational mode with all peripherals active. This mode consumes the most power.

PS2 (Ultra-Low-Power Mode, ULP Mode): A mode with limited functionality but significantly reduced power consumption.

PS1 (Sleep Mode): A deep sleep mode where most systems suspend, but some wake sources remain active.

PS0 (Deep Sleep): The lowest power mode, with minimal power consumption and most systems suspended.

Wake Source: An event or condition that causes the system to transition from a low-power state to a higher-power state.

Ultra-Low-Power Subsystem (ULPSS): A specialized subsystem that stays active in low-power modes to perform essential functions.

Clock and Timing Terms#

These terms define sources and circuits that provide timing signals.

Clock Source: The origin of timing signals for a timer. Clock sources can include internal oscillators, external crystals, or derived clocks.

Interface Phase-Locked Loop (PLL): A circuit that generates high-frequency clock signals from lower-frequency inputs.

Resistor-Capacitor (RC) Oscillator: An oscillator based on resistors and capacitors. RC oscillators provide a clock reference but are less accurate than crystal oscillators.

Crystal Oscillator (XTAL): A high-precision oscillator that provides a stable and accurate clock reference.

Clock Divider: A circuit that divides the input clock frequency by a programmable factor.

Acronyms#

This table lists acronyms used throughout the guide and their definitions.

Acronym

Full Name

Description

CT

Configurable Timer

High-performance timer with advanced PWM and capture features

SYSRTC

System Real-Time Clock

Low-power timer for timekeeping across all power states

ULP

Ultra-Low Power

A power-efficient mode and timer type

WDT

Watchdog Timer

Reliability timer for fault detection and recovery

PWM

Pulse Width Modulation

Technique for generating variable-width electrical pulses

ICU

Input Capture Unit

Hardware unit for capturing external event timing

OCU

Output Compare Unit

Hardware unit for generating precise output timing

WFG

Waveform Generator

Hardware that generates complex waveform patterns

DMA

Direct Memory Access

High-speed data transfer without CPU involvement

GPIO

General Purpose Input/Output

Configurable digital pins for external connections

RTOS

Real-Time Operating System

Operating system designed for real-time applications

IoT

Internet of Things

Network of interconnected devices and sensors

PLL

Phase-Locked Loop

Circuit that generates stable clock frequencies

RC

Resistor-Capacitor

Type of oscillator circuit

XTAL

Crystal

High-precision timing reference

SOC

System on Chip

Integrated circuit with multiple system components

Extended Examples#

This section demonstrates how to configure timers for real-world use cases. Each example includes requirements and implementation details.

Example 1: Motor Control System with Configurable Timer#

Scenario: A three-phase motor control system requires synchronized PWM signals with precise timing.

Requirements:

  • Generate three PWM outputs with 120° phase separation

  • Support a frequency range of 1 Hz to 1 kHz

  • Provide duty cycle control from 0% to 100%

  • Enable synchronized start and stop

Implementation:

// CT configuration for three-phase motor control
void configure_motor_control_timer(void) {
    // Configure Counter0 for base timing
    CT_Config_t ctConfig = {
        .counter = CT_COUNTER_0,
        .mode = CT_MODE_UP,
        .clockSource = CT_CLOCK_SOURCE_INTERFACE_PLL,
        .prescaler = 160,  // 160 MHz / 160 = 1 MHz
        .period = 999      // 1 MHz / 1000 = 1 kHz base frequency
    };
    CT_Init(&ctConfig);
    
    // Configure three PWM channels with 120° phase separation
    // Channel 0: 0° phase
    CT_OCU_Config_t ocu0 = {
        .channel = 0,
        .mode = CT_OCU_MODE_PWM,
        .compareValue = 499,  // 50% duty cycle
        .polarity = CT_OCU_POLARITY_HIGH
    };
    CT_OCU_Init(&ocu0);
    
    // Channel 1: 120° phase (333 counts delay)
    CT_OCU_Config_t ocu1 = {
        .channel = 1,
        .mode = CT_OCU_MODE_PWM,
        .compareValue = 499,
        .polarity = CT_OCU_POLARITY_HIGH
    };
    CT_OCU_Init(&ocu1);
    CT_SetCompareValue(CT_COUNTER_0, 1, 333);  // Phase delay
    
    // Channel 2: 240° phase (666 counts delay)
    CT_OCU_Config_t ocu2 = {
        .channel = 2,
        .mode = CT_OCU_MODE_PWM,
        .compareValue = 499,
        .polarity = CT_OCU_POLARITY_HIGH
    };
    CT_OCU_Init(&ocu2);
    CT_SetCompareValue(CT_COUNTER_0, 2, 666);  // Phase delay
    
    // Start the timer
    CT_Start(CT_COUNTER_0);
}

Example 2: Low-Power Internet of Things (IoT) Device with System Real-Time Clock (SYSRTC)#

Scenario: A battery-powered IoT sensor needs to wake periodically to collect and transmit data.

Requirements:

  • Wake every 5 minutes to collect sensor data

  • Wake every hour to transmit data

  • Maintain accurate time across all power states

  • Minimize power consumption

Implementation:

// SYSRTC configuration for IoT device timing
void configure_iot_timing(void) {
    // Initialize SYSRTC with 32 kHz clock
    SYSRTC_Config_t config = {
        .clockSource = SYSRTC_CLOCK_SOURCE_32KHZ_RC,
        .prescaler = 1  // No additional division
    };
    SYSRTC_Init(&config);
    
    // Configure Group 0 for sensor sampling (5-minute intervals)
    SYSRTC_GroupConfig_t group0 = {
        .group = 0,
        .compare0Value = 5 * 60 * 32768,  // 5 minutes in 32 kHz ticks
        .compare0Mode = SYSRTC_COMPARE_MODE_PERIODIC,
        .compare0Interrupt = true
    };
    SYSRTC_ConfigureGroup(&group0);
    
    // Configure Group 1 for data transmission (hourly)
    SYSRTC_GroupConfig_t group1 = {
        .group = 1,
        .compare0Value = 60 * 60 * 32768,  // 1 hour in 32 kHz ticks
        .compare0Mode = SYSRTC_COMPARE_MODE_PERIODIC,
        .compare0Interrupt = true
    };
    SYSRTC_ConfigureGroup(&group1);
    
    // Enable interrupts
    SYSRTC_EnableInterrupt(0, SYSRTC_INT_COMPARE0);
    SYSRTC_EnableInterrupt(1, SYSRTC_INT_COMPARE0);
    
    // Start SYSRTC
    SYSRTC_Start();
}

// Interrupt handlers
void SYSRTC_Group0_Compare0_IRQHandler(void) {
    // Collect sensor data
    collect_sensor_data();
    
    // Clear interrupt flag
    SYSRTC_ClearInterrupt(0, SYSRTC_INT_COMPARE0);
}

void SYSRTC_Group1_Compare0_IRQHandler(void) {
    // Transmit collected data
    transmit_data();
    
    // Clear interrupt flag
    SYSRTC_ClearInterrupt(1, SYSRTC_INT_COMPARE0);
}

Example 3: Ultra-Low-Power (ULP) Timer for Sleep Mode Wake Scheduling#

Scenario: A wearable device must schedule precise wake events while maintaining accurate timing in sleep modes.

Requirements:

  • Wake every 100 ms for sensor sampling during light sleep

  • Wake every 1 second for system maintenance

  • Maintain microsecond accuracy

  • Operate in Ultra-Low-Power (PS2) mode

Implementation:

// ULP Timer configuration for sleep mode timing
void configure_ulp_wake_timing(void) {
    // Configure ULP Timer 0 for 100 ms sensor sampling
    ULP_TIMER_Config_t timer0_config = {
        .instance = ULP_TIMER_0,
        .clockSource = ULP_TIMER_CLOCK_SOURCE_32KHZ_RC,
        .resolution = ULP_TIMER_RESOLUTION_1US,
        .mode = ULP_TIMER_MODE_PERIODIC,
        .period = 100000  // 100 ms in microseconds
    };
    ULP_TIMER_Init(&timer0_config);
    
    // Configure ULP Timer 1 for 1 second system maintenance
    ULP_TIMER_Config_t timer1_config = {
        .instance = ULP_TIMER_1,
        .clockSource = ULP_TIMER_CLOCK_SOURCE_32KHZ_RC,
        .resolution = ULP_TIMER_RESOLUTION_1US,
        .mode = ULP_TIMER_MODE_PERIODIC,
        .period = 1000000  // 1 second in microseconds
    };
    ULP_TIMER_Init(&timer1_config);
    
    // Enable interrupts
    ULP_TIMER_EnableInterrupt(ULP_TIMER_0, ULP_TIMER_INT_PERIODIC);
    ULP_TIMER_EnableInterrupt(ULP_TIMER_1, ULP_TIMER_INT_PERIODIC);
    
    // Start timers
    ULP_TIMER_Start(ULP_TIMER_0);
    ULP_TIMER_Start(ULP_TIMER_1);
}

// Interrupt handlers
void ULP_TIMER_0_IRQHandler(void) {
    // Sample sensors
    sample_sensors();
    
    // Clear interrupt
    ULP_TIMER_ClearInterrupt(ULP_TIMER_0, ULP_TIMER_INT_PERIODIC);
}

void ULP_TIMER_1_IRQHandler(void) {
    // Perform system maintenance
    system_maintenance();
    
    // Clear interrupt
    ULP_TIMER_ClearInterrupt(ULP_TIMER_1, ULP_TIMER_INT_PERIODIC);
}

Reference Tables#

Reference tables provide quick comparisons and specifications for timers, power consumption, and clock sources.

Timer Feature Comparison#

Feature

CT

SYSRTC

ULP Timer

WDT

Counter Width

16-bit × 2

32-bit shared

32-bit × 4

Hardware

Clock Range

40-160 MHz

32 kHz

32 kHz–32 MHz

Internal

PWM Channels

8

4

0

0

Capture Channels

8

2

0

0

DMA Support

Yes

No

No

No

Power States

PS4 only

All

PS4, PS2, PS1*

All

Typical Use

High-performance

Timekeeping

Sleep timing

Reliability

*PS1: Wake source only

Power Consumption Estimates#

Timer Type

PS4 (mA)

PS2 (µA)

PS1 (µA)

PS0 (µA)

CT

2–5

N/A

N/A

N/A

SYSRTC

0.1–0.5

0.05–0.2

0.02–0.1

0.01–0.05

ULP Timer

0.05–0.2

0.02–0.1

0.01–0.05

N/A

WDT

0.01–0.05

0.01–0.05

0.01–0.05

0.01–0.05

Note: Actual values vary based on configuration and system conditions.

Clock Source Characteristics#

Source

Frequency

Accuracy

Power

Stability

Interface PLL

40–160 MHz

±0.1%

High

Excellent

32 kHz RC

32 kHz

±2%

Low

Good

32 kHz XTAL

32 kHz

±0.01%

Low

Excellent

REF 32 MHz

32 MHz

±0.5%

Medium

Good

SOC Clock

Variable

±0.1%

Medium

Excellent

Troubleshooting Guide#

The troubleshooting guide helps diagnose common issues with timers and provides practical solutions.

Common Issues and Solutions#

Timer Not Starting#

Symptoms: Timer counter remains at 0 and does not generate interrupts.

Possible Causes:

  • Clock source not enabled

  • Incorrect prescaler configuration

  • Timer not enabled after configuration

Solutions:

  • Verify the clock source is active

  • Check prescaler calculations

  • Ensure the timer is started after configuration

Incorrect Timing#

Symptoms: Timer periods appear longer or shorter than expected.

Possible Causes:

  • Wrong clock source selection

  • Incorrect prescaler value

  • Clock frequency mismatch

Solutions:

  • Verify clock source frequency

  • Recalculate prescaler values

  • Check clock configuration

Interrupts Not Firing#

Symptoms: Timer runs but does not generate interrupts.

Possible Causes:

  • Interrupt not enabled

  • Interrupt priority set too low

  • Nested Vectored Interrupt Controller (NVIC) not configured

Solutions:

  • Enable timer interrupts

  • Set appropriate interrupt priority

  • Configure NVIC for timer interrupts

Power State Issues#

Symptoms: Timer stops in low-power modes.

Possible Causes:

  • Timer incompatible with selected power state

  • Clock source suspended

  • Interrupt routing disabled

Solutions:

  • Check power state compatibility

  • Use a timer supported in the required mode

  • Verify clock and interrupt configuration

Debugging Techniques#

  1. Clock Verification: Use an oscilloscope or logic analyzer to check clock signals.

  2. Register Inspection: Monitor timer registers during operation.

  3. Interrupt Monitoring: Verify interrupt generation and handling.

  4. Power State Testing: Test across all supported power states.

  5. Timing Validation: Use an external timing reference to confirm accuracy.

Best Practices#

Follow these best practices for efficient and reliable timer use.

Timer Selection#

  • Use the Configurable Timer (CT) for high-performance applications requiring precise timing.

  • Use the System Real-Time Clock (SYSRTC) for continuous timekeeping across power states.

  • Select the Ultra-Low-Power Timer for sleep mode timing.

  • Use the Watchdog Timer (WDT) to improve system reliability.

Configuration#

  • Verify clock source availability before configuring timers.

  • Select appropriate prescaler values for required resolution.

  • Enable interrupts only when necessary to minimize power consumption.

  • Use Direct Memory Access (DMA) with CT for high-frequency operations.

Power Management#

  • Group timer operations to reduce power state transitions.

  • Use the lowest-power timer that meets requirements.

  • Disable unused timer features to reduce power consumption.

  • Schedule wake events efficiently to minimize active time.

Performance Optimization#

  • Use DMA for high-frequency data operations.

  • Minimize time spent in interrupt service routines.

  • Group related timer operations for efficiency.

  • Prefer hardware features over software-based implementations.

Related Resources#

Refer to these resources for additional guidance:

  • Timer API Reference: Function documentation

  • Power Manager Guide: Power state management and transitions

  • Clock Configuration Guide: System clock setup and management

  • Interrupt Guide: Interrupt handling and configuration

  • GPIO Guide: Pin configuration and routing

  • DMA Guide: High-performance data transfer

  • Application Notes: Real-world implementation examples

  • Development Tools: Debugging and validation utilities