QSPI Octal-SPI#

QSPI Octal-SPI Controller API.

These QSPI functions provide basic support for using the QSPI peripheral in the following configurations:

  • Direct Read/Write, used for memory mapped access to external memory.

  • STIG Command, used for configuring and executing commands on the external memory device.

Indirect read/write, PHY configuration, and Execute-In-Place (XIP) configurations are not supported.

The example below shows how to set up the QSPI for direct read and write operation:

CMU_ClockEnable(cmuClock_GPIO, true);
CMU_ClockEnable(cmuClock_QSPI0, true);

QSPI_Init_TypeDef initQspi = QSPI_INIT_DEFAULT;
QSPI_Init(QSPI0, &initQspi);

// Configure QSPI pins.
GPIO_PinModeSet(EXTFLASH_PORT_CS,   EXTFLASH_PIN_CS,   gpioModePushPull, 0);
GPIO_PinModeSet(EXTFLASH_PORT_SCLK, EXTFLASH_PIN_SCLK, gpioModePushPull, 0);
GPIO_PinModeSet(EXTFLASH_PORT_DQ0,  EXTFLASH_PIN_DQ0,  gpioModePushPull, 0);
GPIO_PinModeSet(EXTFLASH_PORT_DQ1,  EXTFLASH_PIN_DQ1,  gpioModePushPull, 0);
GPIO_PinModeSet(EXTFLASH_PORT_DQ2,  EXTFLASH_PIN_DQ2,  gpioModePushPull, 0);
GPIO_PinModeSet(EXTFLASH_PORT_DQ3,  EXTFLASH_PIN_DQ3,  gpioModePushPull, 0);

// Configure QSPI routing to GPIO.
QSPI0->ROUTELOC0 = EXTFLASH_QSPI_LOC;
QSPI0->ROUTEPEN  = QSPI_ROUTEPEN_SCLKPEN
                   | EXTFLASH_QSPI_CSPEN
                   | QSPI_ROUTEPEN_DQ0PEN
                   | QSPI_ROUTEPEN_DQ1PEN
                   | QSPI_ROUTEPEN_DQ2PEN
                   | QSPI_ROUTEPEN_DQ3PEN;

// Configure the direct read.
QSPI_ReadConfig_TypeDef readConfig = QSPI_READCONFIG_DEFAULT;

readConfig.dummyCycles  = 8;
readConfig.opCode       = 0x6B;
readConfig.instTransfer = qspiTransferSingle;
readConfig.addrTransfer = qspiTransferSingle;
readConfig.dataTransfer = qspiTransferQuad;

QSPI_ReadConfig(QSPI0, &readConfig);

// Configure the direct write.
QSPI_WriteConfig_TypeDef writeConfig = QSPI_WRITECONFIG_DEFAULT;

writeConfig.dummyCycles  = 0;
writeConfig.opCode       = 0x38;
writeConfig.addrTransfer = qspiTransferQuad;
writeConfig.dataTransfer = qspiTransferQuad;
writeConfig.autoWEL      = true;

QSPI_WriteConfig(QSPI0, &writeConfig);

To configure an external flash, commands can be set up and executed using the Software Triggered Instruction Generator (STIG) function of the QSPI, as shown in the example below:

uint8_t status;
QSPI_StigCmd_TypeDef stigCmd = {0};
stigCmd.cmdOpcode = EXTFLASH_OPCODE_READ_STATUS;
stigCmd.readDataSize = 1;
stigCmd.readBuffer = &status;
QSPI_ExecStigCmd(QSPI0, &stigCmd);

Modules#

QSPI_ReadConfig_TypeDef

QSPI_WriteConfig_TypeDef

QSPI_DelayConfig_TypeDef

QSPI_StigCmd_TypeDef

QSPI_Init_TypeDef

Enumerations#

enum
qspiTransferSingle = 0
qspiTransferDual = 1
qspiTransferQuad = 2
qspiTransferOctal = 3
}

Transfer type.

Functions#

void
QSPI_Init(QSPI_TypeDef *qspi, const QSPI_Init_TypeDef *init)

Initialize QSPI.

void
QSPI_ReadConfig(QSPI_TypeDef *qspi, const QSPI_ReadConfig_TypeDef *config)

Configure Read Operations.

void
QSPI_WriteConfig(QSPI_TypeDef *qspi, const QSPI_WriteConfig_TypeDef *config)

Configure Write Operations.

void
QSPI_ExecStigCmd(QSPI_TypeDef *qspi, const QSPI_StigCmd_TypeDef *stigCmd)

Execute a STIG command.

void
QSPI_WaitForIdle(QSPI_TypeDef *qspi)

Wait for the QSPI to go into idle state.

uint16_t
QSPI_GetWriteLevel(QSPI_TypeDef *qspi)

Get the fill level of the write partition of the QSPI internal SRAM.

uint16_t
QSPI_GetReadLevel(QSPI_TypeDef *qspi)

Get the fill level of the read partition of the QSPI internal SRAM.

void
QSPI_Enable(QSPI_TypeDef *qspi, bool enable)

Enable/disable Quad SPI.

uint32_t
QSPI_IntGet(QSPI_TypeDef *qspi)

Get the current interrupt flags.

void
QSPI_IntClear(QSPI_TypeDef *qspi, uint32_t flags)

Clear interrupt flags.

void
QSPI_IntEnable(QSPI_TypeDef *qspi, uint32_t flags)

Enable interrupts.

void
QSPI_IntDisable(QSPI_TypeDef *qspi, uint32_t flags)

Disable interrupts.

Macros#

#define

Default Read Configuration Structure.

#define

Default Write Configuration Structure.

#define

Default configuration for QSPI_Init_TypeDef structure.

Enumeration Documentation#

QSPI_TransferType_TypeDef#

QSPI_TransferType_TypeDef

Transfer type.

Enumerator
qspiTransferSingle

Single IO mode.

qspiTransferDual

Dual I/O transfer.

qspiTransferQuad

Quad I/O transfer.

qspiTransferOctal

Octal I/O transfer.


Definition at line 58 of file platform/emlib/inc/em_qspi.h

Function Documentation#

QSPI_Init#

void QSPI_Init (QSPI_TypeDef * qspi, const QSPI_Init_TypeDef * init)

Initialize QSPI.

Parameters
[in]qspi

A pointer to the QSPI peripheral register block.

[in]init

A pointer to the initialization structure used to configure QSPI.


Definition at line 128 of file platform/emlib/src/em_qspi.c

QSPI_ReadConfig#

void QSPI_ReadConfig (QSPI_TypeDef * qspi, const QSPI_ReadConfig_TypeDef * config)

Configure Read Operations.

Parameters
[in]qspi

A pointer to the QSPI peripheral register block.

[in]config

A pointer to the configuration structure for QSPI read operations.


Definition at line 150 of file platform/emlib/src/em_qspi.c

QSPI_WriteConfig#

void QSPI_WriteConfig (QSPI_TypeDef * qspi, const QSPI_WriteConfig_TypeDef * config)

Configure Write Operations.

Parameters
[in]qspi

A pointer to the QSPI peripheral register block.

[in]config

A pointer to the configuration structure for QSPI write operations.


Definition at line 172 of file platform/emlib/src/em_qspi.c

QSPI_ExecStigCmd#

void QSPI_ExecStigCmd (QSPI_TypeDef * qspi, const QSPI_StigCmd_TypeDef * stigCmd)

Execute a STIG command.

Parameters
[in]qspi

A pointer to the QSPI peripheral register block.

[in]stigCmd

A pointer to a structure that describes the STIG command.

STIG is used when the application needs to access status registers, configuration registers or perform erase functions. STIG commands can be used to perform any instruction that the flash device supports.


Definition at line 200 of file platform/emlib/src/em_qspi.c

QSPI_WaitForIdle#

void QSPI_WaitForIdle (QSPI_TypeDef * qspi)

Wait for the QSPI to go into idle state.

Parameters
[in]qspi

Pointer to QSPI peripheral register block.


Definition at line 215 of file platform/emlib/inc/em_qspi.h

QSPI_GetWriteLevel#

uint16_t QSPI_GetWriteLevel (QSPI_TypeDef * qspi)

Get the fill level of the write partition of the QSPI internal SRAM.

Parameters
[in]qspi

Pointer to QSPI peripheral register block.

Returns

  • SRAM fill level of the write partition. The value is the number of 4 byte words in the write partition.


Definition at line 232 of file platform/emlib/inc/em_qspi.h

QSPI_GetReadLevel#

uint16_t QSPI_GetReadLevel (QSPI_TypeDef * qspi)

Get the fill level of the read partition of the QSPI internal SRAM.

Parameters
[in]qspi

Pointer to QSPI peripheral register block.

Returns

  • SRAM fill level of the read partition. The value is the number of 4 byte words in the read partition.


Definition at line 249 of file platform/emlib/inc/em_qspi.h

QSPI_Enable#

void QSPI_Enable (QSPI_TypeDef * qspi, bool enable)

Enable/disable Quad SPI.

Parameters
[in]qspi

Pointer to QSPI peripheral register block.

[in]enable

true to enable Quad SPI, false to disable Quad SPI.


Definition at line 265 of file platform/emlib/inc/em_qspi.h

QSPI_IntGet#

uint32_t QSPI_IntGet (QSPI_TypeDef * qspi)

Get the current interrupt flags.

Parameters
[in]qspi

Pointer to QSPI peripheral register block.

Returns

  • This functions returns the current interrupt flags that are set.


Definition at line 280 of file platform/emlib/inc/em_qspi.h

QSPI_IntClear#

void QSPI_IntClear (QSPI_TypeDef * qspi, uint32_t flags)

Clear interrupt flags.

Parameters
[in]qspi

Pointer to QSPI peripheral register block.

[in]flags

The interrupt flags to clear.


Definition at line 295 of file platform/emlib/inc/em_qspi.h

QSPI_IntEnable#

void QSPI_IntEnable (QSPI_TypeDef * qspi, uint32_t flags)

Enable interrupts.

Parameters
[in]qspi

Pointer to QSPI peripheral register block.

[in]flags

The interrupt flags to enable.


Definition at line 310 of file platform/emlib/inc/em_qspi.h

QSPI_IntDisable#

void QSPI_IntDisable (QSPI_TypeDef * qspi, uint32_t flags)

Disable interrupts.

Parameters
[in]qspi

Pointer to QSPI peripheral register block.

[in]flags

The interrupt flags to disable.


Definition at line 325 of file platform/emlib/inc/em_qspi.h

Macro Definition Documentation#

QSPI_READCONFIG_DEFAULT#

#define QSPI_READCONFIG_DEFAULT
Value:
{ \
0x03, /* 0x03 is the standard read opcode. */ \
0, /* 0 dummy cycles. */ \
qspiTransferSingle, /* Single I/O mode. */ \
qspiTransferSingle, /* Single I/O mode. */ \
qspiTransferSingle, /* Single I/O mode. */ \
}

Default Read Configuration Structure.


Definition at line 95 of file platform/emlib/inc/em_qspi.h

QSPI_WRITECONFIG_DEFAULT#

#define QSPI_WRITECONFIG_DEFAULT
Value:
{ \
0x02, /* 0x02 is the standard write opcode. */ \
0, /* 0 dummy cycles. */ \
qspiTransferSingle, /* Single I/O mode. */ \
qspiTransferSingle, /* Single I/O mode. */ \
true, /* Send WEL command automatically. */ \
}

Default Write Configuration Structure.


Definition at line 133 of file platform/emlib/inc/em_qspi.h

QSPI_INIT_DEFAULT#

#define QSPI_INIT_DEFAULT
Value:
{ \
true, /* Enable Quad SPI. */ \
32, /* Divide QSPI clock by 32. */ \
}

Default configuration for QSPI_Init_TypeDef structure.


Definition at line 193 of file platform/emlib/inc/em_qspi.h