Configuration structure for primary or alternate descriptor (not used for scatter-gather DMA cycles).

Public Attributes#

DMA_DataInc_TypeDef
dstInc

Destination increment size for each DMA transfer.

DMA_DataInc_TypeDef
srcInc

Source increment size for each DMA transfer.

DMA_DataSize_TypeDef
size

DMA transfer unit size.

DMA_ArbiterConfig_TypeDef
arbRate

Arbitration rate, i.e., number of DMA transfers done before re-arbitration takes place.

uint8_t
hprot

HPROT signal state, refer to reference manual, DMA chapter for further details.

Public Attribute Documentation#

dstInc#

DMA_DataInc_TypeDef DMA_CfgDescr_TypeDef::dstInc

Destination increment size for each DMA transfer.


srcInc#

DMA_DataInc_TypeDef DMA_CfgDescr_TypeDef::srcInc

Source increment size for each DMA transfer.


size#

DMA_DataSize_TypeDef DMA_CfgDescr_TypeDef::size

DMA transfer unit size.


arbRate#

DMA_ArbiterConfig_TypeDef DMA_CfgDescr_TypeDef::arbRate

Arbitration rate, i.e., number of DMA transfers done before re-arbitration takes place.


hprot#

uint8_t DMA_CfgDescr_TypeDef::hprot

HPROT signal state, refer to reference manual, DMA chapter for further details.

Normally set to 0 if protection is not an issue. The following bits are available:

  • bit 0 - HPROT[1] control for source read accesses, privileged/non-privileged access.

  • bit 3 - HPROT[1] control for destination write accesses, privileged/non-privileged access.