DPLL initialization structure.

Frequency will be Fref*(N+1)/(M+1).

Public Attributes#

uint32_t

PLL frequency value, max 80 MHz.

uint16_t

Factor N.

uint16_t

Factor M.

Reference clock selector.

Reference clock edge detect selector.

DPLL lock mode selector.

bool

Enable automatic lock recovery.

bool

Enable dither functionality.

Public Attribute Documentation#

frequency#

uint32_t CMU_DPLLInit_TypeDef::frequency

PLL frequency value, max 80 MHz.


Definition at line 1159 of file platform/emlib/inc/em_cmu.h

n#

uint16_t CMU_DPLLInit_TypeDef::n

Factor N.

300 <= N <= 4095


Definition at line 1160 of file platform/emlib/inc/em_cmu.h

m#

uint16_t CMU_DPLLInit_TypeDef::m

Factor M.

M <= 4095


Definition at line 1161 of file platform/emlib/inc/em_cmu.h

refClk#

CMU_Select_TypeDef CMU_DPLLInit_TypeDef::refClk

Reference clock selector.



Definition at line 1162 of file platform/emlib/inc/em_cmu.h

edgeSel#

CMU_DPLLEdgeSel_TypeDef CMU_DPLLInit_TypeDef::edgeSel

Reference clock edge detect selector.


Definition at line 1163 of file platform/emlib/inc/em_cmu.h

lockMode#

CMU_DPLLLockMode_TypeDef CMU_DPLLInit_TypeDef::lockMode

DPLL lock mode selector.



Definition at line 1164 of file platform/emlib/inc/em_cmu.h

autoRecover#

bool CMU_DPLLInit_TypeDef::autoRecover

Enable automatic lock recovery.



Definition at line 1165 of file platform/emlib/inc/em_cmu.h

ditherEn#

bool CMU_DPLLInit_TypeDef::ditherEn

Enable dither functionality.



Definition at line 1166 of file platform/emlib/inc/em_cmu.h