CMU - Clock Management Unit#

Clock management unit (CMU) Peripheral API.

This module contains functions for the CMU peripheral of Silicon Labs 32-bit MCUs and SoCs. The CMU module controls oscillators, clocks gates, clock multiplexers, pre-scalers, calibration modules and wait-states.

Modules#

CMU_LFXOInit_TypeDef

CMU_HFXOInit_TypeDef

Enumerations#

enum
cmuHFRCOBand_1MHz = _CMU_HFRCOCTRL_BAND_1MHZ
cmuHFRCOBand_7MHz = _CMU_HFRCOCTRL_BAND_7MHZ
cmuHFRCOBand_11MHz = _CMU_HFRCOCTRL_BAND_11MHZ
cmuHFRCOBand_14MHz = _CMU_HFRCOCTRL_BAND_14MHZ
cmuHFRCOBand_21MHz = _CMU_HFRCOCTRL_BAND_21MHZ
cmuHFRCOBand_28MHz = _CMU_HFRCOCTRL_BAND_28MHZ
}

High-frequency system RCO bands.

enum
cmuAUXHFRCOBand_1MHz = _CMU_AUXHFRCOCTRL_BAND_1MHZ
cmuAUXHFRCOBand_7MHz = _CMU_AUXHFRCOCTRL_BAND_7MHZ
cmuAUXHFRCOBand_11MHz = _CMU_AUXHFRCOCTRL_BAND_11MHZ
cmuAUXHFRCOBand_14MHz = _CMU_AUXHFRCOCTRL_BAND_14MHZ
cmuAUXHFRCOBand_21MHz = _CMU_AUXHFRCOCTRL_BAND_21MHZ
cmuAUXHFRCOBand_28MHz = _CMU_AUXHFRCOCTRL_BAND_28MHZ
}

AUX high-frequency RCO bands.

enum
cmuClock_HF = (CMU_HFCLKDIV_REG << CMU_DIV_REG_POS) | (CMU_HFCLKSEL_REG << CMU_SEL_REG_POS) | (CMU_NO_EN_REG << CMU_EN_REG_POS) | (0 << CMU_EN_BIT_POS) | (CMU_HF_CLK_BRANCH << CMU_CLK_BRANCH_POS)
cmuClock_DBG = (CMU_NODIV_REG << CMU_DIV_REG_POS) | (CMU_DBGCLKSEL_REG << CMU_SEL_REG_POS) | (CMU_NO_EN_REG << CMU_EN_REG_POS) | (0 << CMU_EN_BIT_POS) | (CMU_DBG_CLK_BRANCH << CMU_CLK_BRANCH_POS)
cmuClock_AUX = (CMU_NODIV_REG << CMU_DIV_REG_POS) | (CMU_NOSEL_REG << CMU_SEL_REG_POS) | (CMU_NO_EN_REG << CMU_EN_REG_POS) | (0 << CMU_EN_BIT_POS) | (CMU_AUX_CLK_BRANCH << CMU_CLK_BRANCH_POS)
cmuClock_HFPER = (CMU_HFPERCLKDIV_REG << CMU_DIV_REG_POS) | (CMU_NOSEL_REG << CMU_SEL_REG_POS) | (CMU_HFPERCLKDIV_EN_REG << CMU_EN_REG_POS) | (_CMU_HFPERCLKDIV_HFPERCLKEN_SHIFT << CMU_EN_BIT_POS) | (CMU_HFPER_CLK_BRANCH << CMU_CLK_BRANCH_POS)
cmuClock_USART0 = (CMU_NODIV_REG << CMU_DIV_REG_POS) | (CMU_NOSEL_REG << CMU_SEL_REG_POS) | (CMU_HFPERCLKEN0_EN_REG << CMU_EN_REG_POS) | (_CMU_HFPERCLKEN0_USART0_SHIFT << CMU_EN_BIT_POS) | (CMU_HFPER_CLK_BRANCH << CMU_CLK_BRANCH_POS)
cmuClock_USART1 = (CMU_NODIV_REG << CMU_DIV_REG_POS) | (CMU_NOSEL_REG << CMU_SEL_REG_POS) | (CMU_HFPERCLKEN0_EN_REG << CMU_EN_REG_POS) | (_CMU_HFPERCLKEN0_USART1_SHIFT << CMU_EN_BIT_POS) | (CMU_HFPER_CLK_BRANCH << CMU_CLK_BRANCH_POS)
cmuClock_USART2 = (CMU_NODIV_REG << CMU_DIV_REG_POS) | (CMU_NOSEL_REG << CMU_SEL_REG_POS) | (CMU_HFPERCLKEN0_EN_REG << CMU_EN_REG_POS) | (_CMU_HFPERCLKEN0_USART2_SHIFT << CMU_EN_BIT_POS) | (CMU_HFPER_CLK_BRANCH << CMU_CLK_BRANCH_POS)
cmuClock_UART0 = (CMU_NODIV_REG << CMU_DIV_REG_POS) | (CMU_NOSEL_REG << CMU_SEL_REG_POS) | (CMU_HFPERCLKEN0_EN_REG << CMU_EN_REG_POS) | (_CMU_HFPERCLKEN0_UART0_SHIFT << CMU_EN_BIT_POS) | (CMU_HFPER_CLK_BRANCH << CMU_CLK_BRANCH_POS)
cmuClock_UART1 = (CMU_NODIV_REG << CMU_DIV_REG_POS) | (CMU_NOSEL_REG << CMU_SEL_REG_POS) | (CMU_HFPERCLKEN0_EN_REG << CMU_EN_REG_POS) | (_CMU_HFPERCLKEN0_UART1_SHIFT << CMU_EN_BIT_POS) | (CMU_HFPER_CLK_BRANCH << CMU_CLK_BRANCH_POS)
cmuClock_TIMER0 = (CMU_NODIV_REG << CMU_DIV_REG_POS) | (CMU_NOSEL_REG << CMU_SEL_REG_POS) | (CMU_HFPERCLKEN0_EN_REG << CMU_EN_REG_POS) | (_CMU_HFPERCLKEN0_TIMER0_SHIFT << CMU_EN_BIT_POS) | (CMU_HFPER_CLK_BRANCH << CMU_CLK_BRANCH_POS)
cmuClock_TIMER1 = (CMU_NODIV_REG << CMU_DIV_REG_POS) | (CMU_NOSEL_REG << CMU_SEL_REG_POS) | (CMU_HFPERCLKEN0_EN_REG << CMU_EN_REG_POS) | (_CMU_HFPERCLKEN0_TIMER1_SHIFT << CMU_EN_BIT_POS) | (CMU_HFPER_CLK_BRANCH << CMU_CLK_BRANCH_POS)
cmuClock_TIMER2 = (CMU_NODIV_REG << CMU_DIV_REG_POS) | (CMU_NOSEL_REG << CMU_SEL_REG_POS) | (CMU_HFPERCLKEN0_EN_REG << CMU_EN_REG_POS) | (_CMU_HFPERCLKEN0_TIMER2_SHIFT << CMU_EN_BIT_POS) | (CMU_HFPER_CLK_BRANCH << CMU_CLK_BRANCH_POS)
cmuClock_TIMER3 = (CMU_NODIV_REG << CMU_DIV_REG_POS) | (CMU_NOSEL_REG << CMU_SEL_REG_POS) | (CMU_HFPERCLKEN0_EN_REG << CMU_EN_REG_POS) | (_CMU_HFPERCLKEN0_TIMER3_SHIFT << CMU_EN_BIT_POS) | (CMU_HFPER_CLK_BRANCH << CMU_CLK_BRANCH_POS)
cmuClock_ACMP0 = (CMU_NODIV_REG << CMU_DIV_REG_POS) | (CMU_NOSEL_REG << CMU_SEL_REG_POS) | (CMU_HFPERCLKEN0_EN_REG << CMU_EN_REG_POS) | (_CMU_HFPERCLKEN0_ACMP0_SHIFT << CMU_EN_BIT_POS) | (CMU_HFPER_CLK_BRANCH << CMU_CLK_BRANCH_POS)
cmuClock_ACMP1 = (CMU_NODIV_REG << CMU_DIV_REG_POS) | (CMU_NOSEL_REG << CMU_SEL_REG_POS) | (CMU_HFPERCLKEN0_EN_REG << CMU_EN_REG_POS) | (_CMU_HFPERCLKEN0_ACMP1_SHIFT << CMU_EN_BIT_POS) | (CMU_HFPER_CLK_BRANCH << CMU_CLK_BRANCH_POS)
cmuClock_PRS = (CMU_NODIV_REG << CMU_DIV_REG_POS) | (CMU_NOSEL_REG << CMU_SEL_REG_POS) | (CMU_HFPERCLKEN0_EN_REG << CMU_EN_REG_POS) | (_CMU_HFPERCLKEN0_PRS_SHIFT << CMU_EN_BIT_POS) | (CMU_HFPER_CLK_BRANCH << CMU_CLK_BRANCH_POS)
cmuClock_DAC0 = (CMU_NODIV_REG << CMU_DIV_REG_POS) | (CMU_NOSEL_REG << CMU_SEL_REG_POS) | (CMU_HFPERCLKEN0_EN_REG << CMU_EN_REG_POS) | (_CMU_HFPERCLKEN0_DAC0_SHIFT << CMU_EN_BIT_POS) | (CMU_HFPER_CLK_BRANCH << CMU_CLK_BRANCH_POS)
cmuClock_GPIO = (CMU_NODIV_REG << CMU_DIV_REG_POS) | (CMU_NOSEL_REG << CMU_SEL_REG_POS) | (CMU_HFPERCLKEN0_EN_REG << CMU_EN_REG_POS) | (_CMU_HFPERCLKEN0_GPIO_SHIFT << CMU_EN_BIT_POS) | (CMU_HFPER_CLK_BRANCH << CMU_CLK_BRANCH_POS)
cmuClock_VCMP = (CMU_NODIV_REG << CMU_DIV_REG_POS) | (CMU_NOSEL_REG << CMU_SEL_REG_POS) | (CMU_HFPERCLKEN0_EN_REG << CMU_EN_REG_POS) | (_CMU_HFPERCLKEN0_VCMP_SHIFT << CMU_EN_BIT_POS) | (CMU_HFPER_CLK_BRANCH << CMU_CLK_BRANCH_POS)
cmuClock_ADC0 = (CMU_NODIV_REG << CMU_DIV_REG_POS) | (CMU_NOSEL_REG << CMU_SEL_REG_POS) | (CMU_HFPERCLKEN0_EN_REG << CMU_EN_REG_POS) | (_CMU_HFPERCLKEN0_ADC0_SHIFT << CMU_EN_BIT_POS) | (CMU_HFPER_CLK_BRANCH << CMU_CLK_BRANCH_POS)
cmuClock_I2C0 = (CMU_NODIV_REG << CMU_DIV_REG_POS) | (CMU_NOSEL_REG << CMU_SEL_REG_POS) | (CMU_HFPERCLKEN0_EN_REG << CMU_EN_REG_POS) | (_CMU_HFPERCLKEN0_I2C0_SHIFT << CMU_EN_BIT_POS) | (CMU_HFPER_CLK_BRANCH << CMU_CLK_BRANCH_POS)
cmuClock_I2C1 = (CMU_NODIV_REG << CMU_DIV_REG_POS) | (CMU_NOSEL_REG << CMU_SEL_REG_POS) | (CMU_HFPERCLKEN0_EN_REG << CMU_EN_REG_POS) | (_CMU_HFPERCLKEN0_I2C1_SHIFT << CMU_EN_BIT_POS) | (CMU_HFPER_CLK_BRANCH << CMU_CLK_BRANCH_POS)
cmuClock_CORE = (CMU_HFCORECLKDIV_REG << CMU_DIV_REG_POS) | (CMU_NOSEL_REG << CMU_SEL_REG_POS) | (CMU_NO_EN_REG << CMU_EN_REG_POS) | (0 << CMU_EN_BIT_POS) | (CMU_HFCORE_CLK_BRANCH << CMU_CLK_BRANCH_POS)
cmuClock_AES = (CMU_NODIV_REG << CMU_DIV_REG_POS) | (CMU_NOSEL_REG << CMU_SEL_REG_POS) | (CMU_HFCORECLKEN0_EN_REG << CMU_EN_REG_POS) | (_CMU_HFCORECLKEN0_AES_SHIFT << CMU_EN_BIT_POS) | (CMU_HFCORE_CLK_BRANCH << CMU_CLK_BRANCH_POS)
cmuClock_DMA = (CMU_NODIV_REG << CMU_DIV_REG_POS) | (CMU_NOSEL_REG << CMU_SEL_REG_POS) | (CMU_HFCORECLKEN0_EN_REG << CMU_EN_REG_POS) | (_CMU_HFCORECLKEN0_DMA_SHIFT << CMU_EN_BIT_POS) | (CMU_HFCORE_CLK_BRANCH << CMU_CLK_BRANCH_POS)
cmuClock_HFLE = (CMU_HFCORECLKLEDIV_REG << CMU_DIV_REG_POS) | (CMU_NOSEL_REG << CMU_SEL_REG_POS) | (CMU_HFCORECLKEN0_EN_REG << CMU_EN_REG_POS) | (_CMU_HFCORECLKEN0_LE_SHIFT << CMU_EN_BIT_POS) | (CMU_HFLE_CLK_BRANCH << CMU_CLK_BRANCH_POS)
cmuClock_EBI = (CMU_NODIV_REG << CMU_DIV_REG_POS) | (CMU_NOSEL_REG << CMU_SEL_REG_POS) | (CMU_HFCORECLKEN0_EN_REG << CMU_EN_REG_POS) | (_CMU_HFCORECLKEN0_EBI_SHIFT << CMU_EN_BIT_POS) | (CMU_HFCORE_CLK_BRANCH << CMU_CLK_BRANCH_POS)
cmuClock_USB = (CMU_NODIV_REG << CMU_DIV_REG_POS) | (CMU_NOSEL_REG << CMU_SEL_REG_POS) | (CMU_HFCORECLKEN0_EN_REG << CMU_EN_REG_POS) | (_CMU_HFCORECLKEN0_USB_SHIFT << CMU_EN_BIT_POS) | (CMU_HFCORE_CLK_BRANCH << CMU_CLK_BRANCH_POS)
cmuClock_LFA = (CMU_NODIV_REG << CMU_DIV_REG_POS) | (CMU_LFACLKSEL_REG << CMU_SEL_REG_POS) | (CMU_NO_EN_REG << CMU_EN_REG_POS) | (0 << CMU_EN_BIT_POS) | (CMU_LFA_CLK_BRANCH << CMU_CLK_BRANCH_POS)
cmuClock_RTC = (CMU_LFAPRESC0_REG << CMU_DIV_REG_POS) | (CMU_NOSEL_REG << CMU_SEL_REG_POS) | (CMU_LFACLKEN0_EN_REG << CMU_EN_REG_POS) | (_CMU_LFACLKEN0_RTC_SHIFT << CMU_EN_BIT_POS) | (CMU_RTC_CLK_BRANCH << CMU_CLK_BRANCH_POS)
cmuClock_LETIMER0 = (CMU_LFAPRESC0_REG << CMU_DIV_REG_POS) | (CMU_NOSEL_REG << CMU_SEL_REG_POS) | (CMU_LFACLKEN0_EN_REG << CMU_EN_REG_POS) | (_CMU_LFACLKEN0_LETIMER0_SHIFT << CMU_EN_BIT_POS) | (CMU_LETIMER0_CLK_BRANCH << CMU_CLK_BRANCH_POS)
cmuClock_LCDpre = (CMU_LFAPRESC0_REG << CMU_DIV_REG_POS) | (CMU_NOSEL_REG << CMU_SEL_REG_POS) | (CMU_NO_EN_REG << CMU_EN_REG_POS) | (0 << CMU_EN_BIT_POS) | (CMU_LCDPRE_CLK_BRANCH << CMU_CLK_BRANCH_POS)
cmuClock_LCD = (CMU_NODIV_REG << CMU_DIV_REG_POS) | (CMU_NOSEL_REG << CMU_SEL_REG_POS) | (CMU_LFACLKEN0_EN_REG << CMU_EN_REG_POS) | (_CMU_LFACLKEN0_LCD_SHIFT << CMU_EN_BIT_POS) | (CMU_LCD_CLK_BRANCH << CMU_CLK_BRANCH_POS)
cmuClock_PCNT0 = (CMU_NODIV_REG << CMU_DIV_REG_POS) | (CMU_NOSEL_REG << CMU_SEL_REG_POS) | (CMU_PCNT_EN_REG << CMU_EN_REG_POS) | (_CMU_PCNTCTRL_PCNT0CLKEN_SHIFT << CMU_EN_BIT_POS) | (CMU_LFA_CLK_BRANCH << CMU_CLK_BRANCH_POS)
cmuClock_PCNT1 = (CMU_NODIV_REG << CMU_DIV_REG_POS) | (CMU_NOSEL_REG << CMU_SEL_REG_POS) | (CMU_PCNT_EN_REG << CMU_EN_REG_POS) | (_CMU_PCNTCTRL_PCNT1CLKEN_SHIFT << CMU_EN_BIT_POS) | (CMU_LFA_CLK_BRANCH << CMU_CLK_BRANCH_POS)
cmuClock_PCNT2 = (CMU_NODIV_REG << CMU_DIV_REG_POS) | (CMU_NOSEL_REG << CMU_SEL_REG_POS) | (CMU_PCNT_EN_REG << CMU_EN_REG_POS) | (_CMU_PCNTCTRL_PCNT2CLKEN_SHIFT << CMU_EN_BIT_POS) | (CMU_LFA_CLK_BRANCH << CMU_CLK_BRANCH_POS)
cmuClock_LESENSE = (CMU_LFAPRESC0_REG << CMU_DIV_REG_POS) | (CMU_NOSEL_REG << CMU_SEL_REG_POS) | (CMU_LFACLKEN0_EN_REG << CMU_EN_REG_POS) | (_CMU_LFACLKEN0_LESENSE_SHIFT << CMU_EN_BIT_POS) | (CMU_LESENSE_CLK_BRANCH << CMU_CLK_BRANCH_POS)
cmuClock_LFB = (CMU_NODIV_REG << CMU_DIV_REG_POS) | (CMU_LFBCLKSEL_REG << CMU_SEL_REG_POS) | (CMU_NO_EN_REG << CMU_EN_REG_POS) | (0 << CMU_EN_BIT_POS) | (CMU_LFB_CLK_BRANCH << CMU_CLK_BRANCH_POS)
cmuClock_LEUART0 = (CMU_LFBPRESC0_REG << CMU_DIV_REG_POS) | (CMU_NOSEL_REG << CMU_SEL_REG_POS) | (CMU_LFBCLKEN0_EN_REG << CMU_EN_REG_POS) | (_CMU_LFBCLKEN0_LEUART0_SHIFT << CMU_EN_BIT_POS) | (CMU_LEUART0_CLK_BRANCH << CMU_CLK_BRANCH_POS)
cmuClock_LEUART1 = (CMU_LFBPRESC0_REG << CMU_DIV_REG_POS) | (CMU_NOSEL_REG << CMU_SEL_REG_POS) | (CMU_LFBCLKEN0_EN_REG << CMU_EN_REG_POS) | (_CMU_LFBCLKEN0_LEUART1_SHIFT << CMU_EN_BIT_POS) | (CMU_LEUART1_CLK_BRANCH << CMU_CLK_BRANCH_POS)
}

Clock points in CMU.

enum
cmuOsc_LFXO
cmuOsc_LFRCO
cmuOsc_HFXO
cmuOsc_HFRCO
cmuOsc_AUXHFRCO
cmuOsc_ULFRCO
}

Oscillator types.

enum
cmuOscMode_Crystal
cmuOscMode_AcCoupled
cmuOscMode_External
}

Oscillator modes.

enum
cmuSelect_Error
cmuSelect_Disabled
cmuSelect_LFXO
cmuSelect_LFRCO
cmuSelect_HFXO
cmuSelect_HFRCO
cmuSelect_HFCLKLE
cmuSelect_AUXHFRCO
cmuSelect_HFSRCCLK
cmuSelect_HFCLK
cmuSelect_ULFRCO
}

Selectable clock sources.

enum
cmuLfxoBoost70 = 0x0
cmuLfxoBoost100 = 0x2
}

LFXO Boost values.

Typedefs#

typedef uint32_t

Clock divider configuration.

Functions#

uint32_t
auxClkGet(void)

Get the AUX clock frequency.

uint32_t
dbgClkGet(void)

Get the Debug Trace clock frequency.

void
flashWaitStateControl(uint32_t coreFreq, int vscale)

Configure flash access wait states to support the given core clock frequency.

void

Configure flash access wait states to the most conservative setting for this target.

void
CMU_UpdateWaitStates(uint32_t freq, int vscale)

Configure various wait states to switch to a certain frequency and a certain voltage scale.

uint32_t
lfClkGet(CMU_Clock_TypeDef lfClkBranch)

Get the LFnCLK frequency based on the current configuration.

void
syncReg(uint32_t mask)

Wait for an ongoing sync of register(s) to low-frequency domain to complete.

void

Set HFPER clock tree prescalers to safe values.

void

Set HFPER clock tree prescalers to give highest possible clock node frequency while still beeing within spec.

Get the AUXHFRCO band in use.

void
CMU_AUXHFRCOBandSet(CMU_AUXHFRCOBand_TypeDef band)

Set the AUXHFRCO band and the tuning value based on the value in the calibration table made during production.

uint32_t
CMU_Calibrate(uint32_t HFCycles, CMU_Osc_TypeDef reference)

Calibrate the clock.

void
CMU_CalibrateConfig(uint32_t downCycles, CMU_Osc_TypeDef downSel, CMU_Osc_TypeDef upSel)

Configure the clock calibration.

uint32_t

Get the calibration count register.

CMU_ClockDivGet(CMU_Clock_TypeDef clock)

Get the clock divisor/prescaler.

void
CMU_ClockDivSet(CMU_Clock_TypeDef clock, CMU_ClkDiv_TypeDef div)

Set the clock divisor/prescaler.

void
CMU_ClockEnable(CMU_Clock_TypeDef clock, bool enable)

Enable/disable a clock.

uint32_t
CMU_ClockFreqGet(CMU_Clock_TypeDef clock)

Get the clock frequency for a clock point.

CMU_ClockSelectGet(CMU_Clock_TypeDef clock)

Get the currently selected reference clock used for a clock branch.

void
CMU_ClockSelectSet(CMU_Clock_TypeDef clock, CMU_Select_TypeDef ref)

Select the reference clock/oscillator used for a clock branch.

uint16_t
CMU_LF_ClockPrecisionGet(CMU_Clock_TypeDef clock)

Gets the precision (in PPM) of the specified low frequency clock branch.

uint16_t
CMU_HF_ClockPrecisionGet(CMU_Clock_TypeDef clock)

Gets the precision (in PPM) of the specified high frequency clock branch.

void
CMU_FreezeEnable(bool enable)

CMU low frequency register synchronization freeze control.

Get HFRCO band in use.

void
CMU_HFRCOBandSet(CMU_HFRCOBand_TypeDef band)

Set HFRCO band and the tuning value based on the value in the calibration table made during production.

uint32_t

Get the HFRCO startup delay.

void
CMU_HFRCOStartupDelaySet(uint32_t delay)

Set the HFRCO startup delay.

void
CMU_HFXOInit(const CMU_HFXOInit_TypeDef *hfxoInit)

Set HFXO control registers.

uint32_t

Get the LCD framerate divisor (FDIV) setting.

void
CMU_LCDClkFDIVSet(uint32_t div)

Set the LCD framerate divisor (FDIV) setting.

void
CMU_LFXOInit(const CMU_LFXOInit_TypeDef *lfxoInit)

Set LFXO control registers.

void
CMU_LFXOPrecisionSet(uint16_t precision)

Sets LFXO's crystal precision, in PPM.

uint16_t

Gets LFXO's crystal precision, in PPM.

void
CMU_HFXOPrecisionSet(uint16_t precision)

Sets HFXO's crystal precision, in PPM.

uint16_t

Gets HFXO's crystal precision, in PPM.

void
CMU_OscillatorEnable(CMU_Osc_TypeDef osc, bool enable, bool wait)

Enable/disable oscillator.

uint32_t
CMU_OscillatorTuningGet(CMU_Osc_TypeDef osc)

Get the oscillator frequency tuning setting.

void
CMU_OscillatorTuningSet(CMU_Osc_TypeDef osc, uint32_t val)

Set the oscillator frequency tuning control.

bool
CMU_PCNTClockExternalGet(unsigned int instance)

Determine if the currently selected PCNTn clock used is external or LFBCLK.

void
CMU_PCNTClockExternalSet(unsigned int instance, bool external)

Select the PCNTn clock.

void
CMU_CalibrateCont(bool enable)

Configure continuous calibration mode.

void

Start calibration.

void

Stop the calibration counters.

uint32_t
CMU_DivToLog2(CMU_ClkDiv_TypeDef div)

Convert divider to logarithmic value.

void
CMU_IntClear(uint32_t flags)

Clear one or more pending CMU interrupts.

void
CMU_IntDisable(uint32_t flags)

Disable one or more CMU interrupts.

void
CMU_IntEnable(uint32_t flags)

Enable one or more CMU interrupts.

uint32_t

Get pending CMU interrupts.

uint32_t

Get enabled and pending CMU interrupt flags.

void
CMU_IntSet(uint32_t flags)

Set one or more pending CMU interrupts.

void
CMU_Lock(void)

Lock the CMU to protect some of its registers against unintended modification.

void

Unlock the CMU so that writing to locked registers again is possible.

Macros#

#define

Macro to set clock sources in the clock tree.

#define

Clock divisors.

#define

Divide clock by 2.

#define

Divide clock by 4.

#define

Divide clock by 8.

#define

Divide clock by 16.

#define

Divide clock by 32.

#define

Divide clock by 64.

#define

Divide clock by 128.

#define

Divide clock by 256.

#define

Divide clock by 512.

#define

Divide clock by 1024.

#define

Divide clock by 2048.

#define

Divide clock by 4096.

#define

Divide clock by 8192.

#define

Divide clock by 16384.

#define

Divide clock by 32768.

#define

Default LFXO initialization values.

#define

Default LFXO initialization for external clock.

#define

Default HFXO initialization values for Platform 1 devices.

#define

Default HFXO initialization for external clock.

Enumeration Documentation#

CMU_HFRCOBand_TypeDef#

CMU_HFRCOBand_TypeDef

High-frequency system RCO bands.

Enumerator
cmuHFRCOBand_1MHz

1 MHz HFRCO band

cmuHFRCOBand_7MHz

7 MHz HFRCO band

cmuHFRCOBand_11MHz

11 MHz HFRCO band

cmuHFRCOBand_14MHz

14 MHz HFRCO band

cmuHFRCOBand_21MHz

21 MHz HFRCO band

cmuHFRCOBand_28MHz

28 MHz HFRCO band


Definition at line 1847 of file platform/emlib/inc/em_cmu.h

CMU_AUXHFRCOBand_TypeDef#

CMU_AUXHFRCOBand_TypeDef

AUX high-frequency RCO bands.

Enumerator
cmuAUXHFRCOBand_1MHz

1 MHz RC band

cmuAUXHFRCOBand_7MHz

7 MHz RC band

cmuAUXHFRCOBand_11MHz

11 MHz RC band

cmuAUXHFRCOBand_14MHz

14 MHz RC band

cmuAUXHFRCOBand_21MHz

21 MHz RC band

cmuAUXHFRCOBand_28MHz

28 MHz RC band


Definition at line 1861 of file platform/emlib/inc/em_cmu.h

CMU_Clock_TypeDef#

CMU_Clock_TypeDef

Clock points in CMU.

See CMU overview in the reference manual.

Enumerator
cmuClock_HF

High-frequency clock.

cmuClock_DBG

Debug clock.

cmuClock_AUX

AUX clock.

cmuClock_HFPER

High-frequency peripheral clock.

cmuClock_USART0

Universal sync/async receiver/transmitter 0 clock.

cmuClock_USART1

Universal sync/async receiver/transmitter 1 clock.

cmuClock_USART2

Universal sync/async receiver/transmitter 2 clock.

cmuClock_UART0

Universal async receiver/transmitter 0 clock.

cmuClock_UART1

Universal async receiver/transmitter 1 clock.

cmuClock_TIMER0

Timer 0 clock.

cmuClock_TIMER1

Timer 1 clock.

cmuClock_TIMER2

Timer 2 clock.

cmuClock_TIMER3

Timer 3 clock.

cmuClock_ACMP0

Analog comparator 0 clock.

cmuClock_ACMP1

Analog comparator 1 clock.

cmuClock_PRS

Peripheral-reflex system clock.

cmuClock_DAC0

Digital-to-analog converter 0 clock.

cmuClock_GPIO

General-purpose input/output clock.

cmuClock_VCMP

Voltage comparator clock.

cmuClock_ADC0

Analog-to-digital converter 0 clock.

cmuClock_I2C0

I2C 0 clock.

cmuClock_I2C1

I2C 1 clock.

cmuClock_CORE

Core clock.

cmuClock_AES

Advanced encryption standard accelerator clock.

cmuClock_DMA

Direct memory access controller clock.

cmuClock_HFLE

Low-energy clock divided down from HFCORECLK.

cmuClock_EBI

External bus interface clock.

cmuClock_USB

USB clock.

cmuClock_LFA

Low-frequency A clock.

cmuClock_RTC

Real time counter clock.

cmuClock_LETIMER0

Low-energy timer 0 clock.

cmuClock_LCDpre

Liquid crystal display, pre FDIV clock.

cmuClock_LCD

Liquid crystal display clock.

cmuClock_PCNT0

Pulse counter 0 clock.

cmuClock_PCNT1

Pulse counter 1 clock.

cmuClock_PCNT2

Pulse counter 2 clock.

cmuClock_LESENSE

LESENSE clock.

cmuClock_LFB

Low-frequency B clock.

cmuClock_LEUART0

Low-energy universal asynchronous receiver/transmitter 0 clock.

cmuClock_LEUART1

Low-energy universal asynchronous receiver/transmitter 1 clock.


Definition at line 1982 of file platform/emlib/inc/em_cmu.h

CMU_Osc_TypeDef#

CMU_Osc_TypeDef

Oscillator types.

Enumerator
cmuOsc_LFXO

Low-frequency crystal oscillator.

cmuOsc_LFRCO

Low-frequency RC oscillator.

cmuOsc_HFXO

High-frequency crystal oscillator.

cmuOsc_HFRCO

High-frequency RC oscillator.

cmuOsc_AUXHFRCO

Auxiliary high-frequency RC oscillator.

cmuOsc_ULFRCO

Ultra low-frequency RC oscillator.


Definition at line 2976 of file platform/emlib/inc/em_cmu.h

CMU_OscMode_TypeDef#

CMU_OscMode_TypeDef

Oscillator modes.

Enumerator
cmuOscMode_Crystal

Crystal oscillator.

cmuOscMode_AcCoupled

AC-coupled buffer.

cmuOscMode_External

External digital clock.


Definition at line 2997 of file platform/emlib/inc/em_cmu.h

CMU_Select_TypeDef#

CMU_Select_TypeDef

Selectable clock sources.

Enumerator
cmuSelect_Error

Usage error.

cmuSelect_Disabled

Clock selector disabled.

cmuSelect_LFXO

Low-frequency crystal oscillator.

cmuSelect_LFRCO

Low-frequency RC oscillator.

cmuSelect_HFXO

High-frequency crystal oscillator.

cmuSelect_HFRCO

High-frequency RC oscillator.

cmuSelect_HFCLKLE

High-frequency LE clock divided by 2 or 4.

cmuSelect_AUXHFRCO

Auxiliary clock source can be used for debug clock.

cmuSelect_HFSRCCLK

High-frequency source clock.

cmuSelect_HFCLK

Divided HFCLK on Giant for debug clock, undivided on Tiny Gecko and for USBC (not used on Gecko).

cmuSelect_ULFRCO

Ultra low-frequency RC oscillator.


Definition at line 3004 of file platform/emlib/inc/em_cmu.h

CMU_LFXOBoost_TypeDef#

CMU_LFXOBoost_TypeDef

LFXO Boost values.

Enumerator
cmuLfxoBoost70
cmuLfxoBoost100

Definition at line 3061 of file platform/emlib/inc/em_cmu.h

Typedef Documentation#

CMU_ClkDiv_TypeDef#

typedef uint32_t CMU_ClkDiv_TypeDef

Clock divider configuration.


Definition at line 1838 of file platform/emlib/inc/em_cmu.h

Function Documentation#

auxClkGet#

static uint32_t auxClkGet (void )

Get the AUX clock frequency.

Parameters
N/A

Used by MSC flash programming and LESENSE, by default also as a debug clock.

Returns

  • AUX Frequency in Hz.


Definition at line 5742 of file platform/emlib/src/em_cmu.c

dbgClkGet#

static uint32_t dbgClkGet (void )

Get the Debug Trace clock frequency.

Parameters
N/A

Returns

  • Debug Trace frequency in Hz.


Definition at line 5827 of file platform/emlib/src/em_cmu.c

flashWaitStateControl#

static void flashWaitStateControl (uint32_t coreFreq, int vscale)

Configure flash access wait states to support the given core clock frequency.

Parameters
[in]coreFreq

The core clock frequency to configure flash wait-states.

[in]vscale

Voltage Scale level. Supported levels are 0 and 2 where 0 is the default.


Definition at line 6098 of file platform/emlib/src/em_cmu.c

flashWaitStateMax#

static void flashWaitStateMax (void )

Configure flash access wait states to the most conservative setting for this target.

Parameters
N/A

Retain SCBTP (Suppressed Conditional Branch Target Prefetch) setting.


Definition at line 6207 of file platform/emlib/src/em_cmu.c

CMU_UpdateWaitStates#

void CMU_UpdateWaitStates (uint32_t freq, int vscale)

Configure various wait states to switch to a certain frequency and a certain voltage scale.

Parameters
[in]freq

The core clock frequency to configure wait-states.

[in]vscale

The voltage scale to configure wait-states. Expected values are 0 or 2, higher number is lower voltage.

This function will set up the necessary flash, bus, and RAM wait states. Updating the wait state configuration must be done before increasing the clock frequency and it must be done after decreasing the clock frequency. Updating the wait state configuration must be done before core voltage is decreased and it must be done after a core voltage is increased.

  • 0 = 1.2 V (VSCALE2)

  • 2 = 1.0 V (VSCALE0)


Definition at line 6316 of file platform/emlib/src/em_cmu.c

lfClkGet#

static uint32_t lfClkGet (CMU_Clock_TypeDef lfClkBranch)

Get the LFnCLK frequency based on the current configuration.

Parameters
[in]lfClkBranch

Selected LF branch.

Returns

  • The LFnCLK frequency in Hz. If no LFnCLK is selected (disabled), 0 is returned.


Definition at line 6402 of file platform/emlib/src/em_cmu.c

syncReg#

void syncReg (uint32_t mask)

Wait for an ongoing sync of register(s) to low-frequency domain to complete.

Parameters
[in]mask

A bitmask corresponding to SYNCBUSY register defined bits, indicating registers that must complete any ongoing synchronization.


Definition at line 6564 of file platform/emlib/src/em_cmu.c

hfperClkSafePrescaler#

static void hfperClkSafePrescaler (void )

Set HFPER clock tree prescalers to safe values.

Parameters
N/A

Note

  • This function applies to EFM32GG11B. There are 3 HFPER clock trees with these frequency limits: HFPERCLK (A-tree): 20MHz in VSCALE0 mode, 50MHz in VSCALE2 mode. HFPERBCLK (B-tree): 20MHz in VSCALE0 mode, 72MHz in VSCALE2 mode. HFPERCCLK (C-tree): 20MHz in VSCALE0 mode, 50MHz in VSCALE2 mode.


Definition at line 6629 of file platform/emlib/src/em_cmu.c

hfperClkOptimizedPrescaler#

static void hfperClkOptimizedPrescaler (void )

Set HFPER clock tree prescalers to give highest possible clock node frequency while still beeing within spec.

Parameters
N/A

Note

  • This function applies to EFM32GG11B. There are 3 HFPER clock trees with these frequency limits: HFPERCLK (A-tree): 20MHz in VSCALE0 mode, 50MHz in VSCALE2 mode. HFPERBCLK (B-tree): 20MHz in VSCALE0 mode, 72MHz in VSCALE2 mode. HFPERCCLK (C-tree): 20MHz in VSCALE0 mode, 50MHz in VSCALE2 mode.


Definition at line 6652 of file platform/emlib/src/em_cmu.c

CMU_AUXHFRCOBandGet#

CMU_AUXHFRCOBand_TypeDef CMU_AUXHFRCOBandGet (void )

Get the AUXHFRCO band in use.

Parameters
N/A

Returns

  • AUXHFRCO band in use.


Definition at line 6697 of file platform/emlib/src/em_cmu.c

CMU_AUXHFRCOBandSet#

void CMU_AUXHFRCOBandSet (CMU_AUXHFRCOBand_TypeDef band)

Set the AUXHFRCO band and the tuning value based on the value in the calibration table made during production.

Parameters
[in]band

AUXHFRCO band to activate.


Definition at line 6714 of file platform/emlib/src/em_cmu.c

CMU_Calibrate#

uint32_t CMU_Calibrate (uint32_t HFCycles, CMU_Osc_TypeDef reference)

Calibrate the clock.

Parameters
[in]HFCycles

The number of HFCLK cycles to run the calibration. Increasing this number increases precision but the calibration will take more time.

[in]reference

The reference clock used to compare HFCLK.

Run a calibration for HFCLK against a selectable reference clock. See the reference manual, CMU chapter, for more details.

Note

  • This function will not return until the calibration measurement is completed.

Returns

  • The number of ticks the reference clock after HFCycles ticks on the HF clock.


Definition at line 6905 of file platform/emlib/src/em_cmu.c

CMU_CalibrateConfig#

void CMU_CalibrateConfig (uint32_t downCycles, CMU_Osc_TypeDef downSel, CMU_Osc_TypeDef upSel)

Configure the clock calibration.

Parameters
[in]downCycles

The number of downSel clock cycles to run the calibration. Increasing this number increases precision but the calibration will take more time.

[in]downSel

The clock, which will be counted down downCycles.

[in]upSel

The reference clock; the number of cycles generated by this clock will be counted and added up and the result can be given with the CMU_CalibrateCountGet() function call.

Configure a calibration for a selectable clock source against another selectable reference clock. See the reference manual, CMU chapter, for more details.

Note


Definition at line 6994 of file platform/emlib/src/em_cmu.c

CMU_CalibrateCountGet#

uint32_t CMU_CalibrateCountGet (void )

Get the calibration count register.

Parameters
N/A

Note

  • If continuous calibration mode is active, calibration busy will almost always be off and only the value needs to be read. In a normal case, this function call is triggered by the CALRDY interrupt flag.

Returns

  • The calibration count, the number of UPSEL clocks in the period of DOWNSEL oscillator clock cycles configured by a previous write operation to CMU->CALCNT.


Definition at line 7102 of file platform/emlib/src/em_cmu.c

CMU_ClockDivGet#

CMU_ClkDiv_TypeDef CMU_ClockDivGet (CMU_Clock_TypeDef clock)

Get the clock divisor/prescaler.

Parameters
[in]clock

A clock point to get the divisor/prescaler for. Notice that not all clock points have a divisor/prescaler. See the CMU overview in the reference manual.

Returns

  • The current clock point divisor/prescaler. 1 is returned if clock specifies a clock point without a divisor/prescaler.


Definition at line 7137 of file platform/emlib/src/em_cmu.c

CMU_ClockDivSet#

void CMU_ClockDivSet (CMU_Clock_TypeDef clock, CMU_ClkDiv_TypeDef div)

Set the clock divisor/prescaler.

Parameters
[in]clock

Clock point to set divisor/prescaler for. Notice that not all clock points have a divisor/prescaler. See the CMU overview in the reference manual.

[in]div

The clock divisor to use (<= cmuClkDiv_512).

Note

  • If setting an LF clock prescaler, synchronization into the low-frequency domain is required. If the same register is modified before a previous update has completed, this function will stall until the previous synchronization has completed. See CMU_FreezeEnable() for a suggestion on how to reduce the stalling time in some use cases.

HFCLKLE prescaler is automatically modified when peripherals with clock domain HFBUSCLK is chosen based on the maximum HFLE frequency allowed.


Definition at line 7277 of file platform/emlib/src/em_cmu.c

CMU_ClockEnable#

void CMU_ClockEnable (CMU_Clock_TypeDef clock, bool enable)

Enable/disable a clock.

Parameters
[in]clock

The clock to enable/disable. Notice that not all defined clock points have separate enable/disable control. See the CMU overview in the reference manual.

[in]enable
  • true - enable specified clock.

  • false - disable specified clock.

In general, module clocking is disabled after a reset. If a module clock is disabled, the registers of that module are not accessible and reading from such registers may return undefined values. Writing to registers of clock-disabled modules has no effect. Avoid accessing module registers of a module with a disabled clock.

Note

  • If enabling/disabling an LF clock, synchronization into the low-frequency domain is required. If the same register is modified before a previous update has completed, this function will stall until the previous synchronization has completed. See CMU_FreezeEnable() for a suggestion on how to reduce the stalling time in some use cases.

HFCLKLE prescaler is automatically modified when peripherals with clock domain HFBUSCLK is chosen based on the maximum HFLE frequency allowed.


Definition at line 7502 of file platform/emlib/src/em_cmu.c

CMU_ClockFreqGet#

uint32_t CMU_ClockFreqGet (CMU_Clock_TypeDef clock)

Get the clock frequency for a clock point.

Parameters
[in]clock

A clock point to fetch the frequency for.

Returns

  • The current frequency in Hz.


Definition at line 7626 of file platform/emlib/src/em_cmu.c

CMU_ClockSelectGet#

CMU_Select_TypeDef CMU_ClockSelectGet (CMU_Clock_TypeDef clock)

Get the currently selected reference clock used for a clock branch.

Parameters
[in]clock

Clock branch to fetch selected ref. clock for. One of:

Returns

  • The reference clock used for clocking the selected branch, cmuSelect_Error if invalid clock provided.


Definition at line 8477 of file platform/emlib/src/em_cmu.c

CMU_ClockSelectSet#

void CMU_ClockSelectSet (CMU_Clock_TypeDef clock, CMU_Select_TypeDef ref)

Select the reference clock/oscillator used for a clock branch.

Parameters
[in]clock

A clock branch to select reference clock for. One of:

[in]ref

A reference selected for clocking. See the reference manual for details about references available for a specific clock branch.

Notice that if a selected reference is not enabled prior to selecting its use, it will be enabled and this function will wait for the selected oscillator to be stable. It will however NOT be disabled if another reference clock is selected later.

This feature is particularly important if selecting a new reference clock for the clock branch clocking the core. Otherwise, the system may halt.

Note

  • HFCLKLE prescaler is automatically modified when peripherals with clock domain HFBUSCLK is chosen based on the maximum HFLE frequency allowed.


Definition at line 9393 of file platform/emlib/src/em_cmu.c

CMU_LF_ClockPrecisionGet#

uint16_t CMU_LF_ClockPrecisionGet (CMU_Clock_TypeDef clock)

Gets the precision (in PPM) of the specified low frequency clock branch.

Parameters
[in]clock

Clock branch.

Returns

  • Precision, in PPM, of the specified clock branch.

Note

  • This function is only for internal usage.

  • The current implementation of this function is used to determine if the clock has a precision <= 500 ppm or not (which is the minimum required for BLE). Future version of this function should provide more accurate precision numbers to allow for further optimizations from the stacks.


Definition at line 10117 of file platform/emlib/src/em_cmu.c

CMU_HF_ClockPrecisionGet#

uint16_t CMU_HF_ClockPrecisionGet (CMU_Clock_TypeDef clock)

Gets the precision (in PPM) of the specified high frequency clock branch.

Parameters
[in]clock

Clock branch.

Returns

  • Precision, in PPM, of the specified clock branch.

Note

  • This function is only for internal usage.

  • The current implementation of this function is used to determine if the clock has a precision <= 500 ppm or not (which is the minimum required for BLE). Future version of this function should provide more accurate precision numbers to allow for further optimizations from the stacks.


Definition at line 10160 of file platform/emlib/src/em_cmu.c

CMU_FreezeEnable#

void CMU_FreezeEnable (bool enable)

CMU low frequency register synchronization freeze control.

Parameters
[in]enable
  • true - enable freeze, modified registers are not propagated to the LF domain

  • false - disable freeze, modified registers are propagated to the LF domain

Some CMU registers require synchronization into the low-frequency (LF) domain. The freeze feature allows for several such registers to be modified before passing them to the LF domain simultaneously (which takes place when the freeze mode is disabled).

Another use case for this feature is using an API (such as the CMU API) for modifying several bit fields consecutively in the same register. If freeze mode is enabled during this sequence, stalling can be avoided.

Note

  • When enabling freeze mode, this function will wait for all current ongoing CMU synchronization to LF domain to complete (normally synchronization will not be in progress.) However, for this reason, when using freeze mode, modifications of registers requiring LF synchronization should be done within one freeze enable/disable block to avoid unnecessary stalling.


Definition at line 10363 of file platform/emlib/src/em_cmu.c

CMU_HFRCOBandGet#

CMU_HFRCOBand_TypeDef CMU_HFRCOBandGet (void )

Get HFRCO band in use.

Parameters
N/A

Returns

  • HFRCO band in use.


Definition at line 10390 of file platform/emlib/src/em_cmu.c

CMU_HFRCOBandSet#

void CMU_HFRCOBandSet (CMU_HFRCOBand_TypeDef band)

Set HFRCO band and the tuning value based on the value in the calibration table made during production.

Parameters
[in]band

HFRCO band to activate.

Note

  • HFCLKLE prescaler is automatically modified based on the maximum HFLE frequency allowed.


Definition at line 10410 of file platform/emlib/src/em_cmu.c

CMU_HFRCOStartupDelayGet#

uint32_t CMU_HFRCOStartupDelayGet (void )

Get the HFRCO startup delay.

Parameters
N/A

See the reference manual for more details.

Returns

  • The startup delay in use.


Definition at line 10673 of file platform/emlib/src/em_cmu.c

CMU_HFRCOStartupDelaySet#

void CMU_HFRCOStartupDelaySet (uint32_t delay)

Set the HFRCO startup delay.

Parameters
[in]delay

The startup delay to set (<= 31).

See the reference manual for more details.


Definition at line 10689 of file platform/emlib/src/em_cmu.c

CMU_HFXOInit#

void CMU_HFXOInit (const CMU_HFXOInit_TypeDef * hfxoInit)

Set HFXO control registers.

Parameters
[in]hfxoInit

HFXO setup parameters.

Note

  • HFXO configuration should be obtained from a configuration tool, app note, or crystal data sheet. This function disables the HFXO to ensure a valid state before update.


Definition at line 10864 of file platform/emlib/src/em_cmu.c

CMU_LCDClkFDIVGet#

uint32_t CMU_LCDClkFDIVGet (void )

Get the LCD framerate divisor (FDIV) setting.

Parameters
N/A

Returns

  • The LCD framerate divisor.


Definition at line 10996 of file platform/emlib/src/em_cmu.c

CMU_LCDClkFDIVSet#

void CMU_LCDClkFDIVSet (uint32_t div)

Set the LCD framerate divisor (FDIV) setting.

Parameters
[in]div

The FDIV setting to use.

Note

  • The FDIV field (CMU LCDCTRL register) should only be modified while the LCD module is clock disabled (CMU LFACLKEN0.LCD bit is 0). This function will NOT modify FDIV if the LCD module clock is enabled. See CMU_ClockEnable() for disabling/enabling LCD clock.


Definition at line 11018 of file platform/emlib/src/em_cmu.c

CMU_LFXOInit#

void CMU_LFXOInit (const CMU_LFXOInit_TypeDef * lfxoInit)

Set LFXO control registers.

Parameters
[in]lfxoInit

LFXO setup parameters.

Note

  • LFXO configuration should be obtained from a configuration tool, app note, or crystal data sheet. This function disables the LFXO when necessary to ensure a valid state before update.


Definition at line 11048 of file platform/emlib/src/em_cmu.c

CMU_LFXOPrecisionSet#

void CMU_LFXOPrecisionSet (uint16_t precision)

Sets LFXO's crystal precision, in PPM.

Parameters
[in]precision

LFXO's crystal precision, in PPM.

Note

  • LFXO precision should be obtained from a crystal datasheet.


Definition at line 11101 of file platform/emlib/src/em_cmu.c

CMU_LFXOPrecisionGet#

uint16_t CMU_LFXOPrecisionGet (void )

Gets LFXO's crystal precision, in PPM.

Parameters
[in]

LFXO's crystal precision, in PPM.


Definition at line 11113 of file platform/emlib/src/em_cmu.c

CMU_HFXOPrecisionSet#

void CMU_HFXOPrecisionSet (uint16_t precision)

Sets HFXO's crystal precision, in PPM.

Parameters
[in]precision

HFXO's crystal precision, in PPM.

Note

  • HFXO precision should be obtained from a crystal datasheet.


Definition at line 11128 of file platform/emlib/src/em_cmu.c

CMU_HFXOPrecisionGet#

uint16_t CMU_HFXOPrecisionGet (void )

Gets HFXO's crystal precision, in PPM.

Parameters
[in]

HFXO's crystal precision, in PPM.


Definition at line 11140 of file platform/emlib/src/em_cmu.c

CMU_OscillatorEnable#

void CMU_OscillatorEnable (CMU_Osc_TypeDef osc, bool enable, bool wait)

Enable/disable oscillator.

Parameters
[in]osc

The oscillator to enable/disable.

[in]enable
  • true - enable specified oscillator.

  • false - disable specified oscillator.

[in]wait

Only used if enable is true.

  • true - wait for oscillator start-up time to timeout before returning.

  • false - do not wait for oscillator start-up time to timeout before returning.

Note

  • WARNING: When this function is called to disable either cmuOsc_LFXO or cmuOsc_HFXO, the LFXOMODE or HFXOMODE fields of the CMU_CTRL register are reset to the reset value. In other words, if external clock sources are selected in either LFXOMODE or HFXOMODE fields, the configuration will be cleared and needs to be reconfigured if needed later.


Definition at line 11169 of file platform/emlib/src/em_cmu.c

CMU_OscillatorTuningGet#

uint32_t CMU_OscillatorTuningGet (CMU_Osc_TypeDef osc)

Get the oscillator frequency tuning setting.

Parameters
[in]osc

An oscillator to get tuning value for, one of the following:

Returns

  • The oscillator frequency tuning setting in use.


Definition at line 11358 of file platform/emlib/src/em_cmu.c

CMU_OscillatorTuningSet#

void CMU_OscillatorTuningSet (CMU_Osc_TypeDef osc, uint32_t val)

Set the oscillator frequency tuning control.

Parameters
[in]osc

An oscillator to set tuning value for, one of the following:

[in]val

The oscillator frequency tuning setting to use.

Note

  • Oscillator tuning is done during production and the tuning value is automatically loaded after reset. Changing the tuning value from the calibrated value is for more advanced use. Certain oscillators also have build-in tuning optimization.


Definition at line 11432 of file platform/emlib/src/em_cmu.c

CMU_PCNTClockExternalGet#

bool CMU_PCNTClockExternalGet (unsigned int instance)

Determine if the currently selected PCNTn clock used is external or LFBCLK.

Parameters
[in]instance

PCNT instance number to get currently selected clock source for.

Returns

    • true - selected clock is external clock.

    • false - selected clock is LFBCLK.


Definition at line 11664 of file platform/emlib/src/em_cmu.c

CMU_PCNTClockExternalSet#

void CMU_PCNTClockExternalSet (unsigned int instance, bool external)

Select the PCNTn clock.

Parameters
[in]instance

PCNT instance number to set selected clock source for.

[in]external

Set to true to select the external clock, false to select LFBCLK.


Definition at line 11704 of file platform/emlib/src/em_cmu.c

CMU_CalibrateCont#

void CMU_CalibrateCont (bool enable)

Configure continuous calibration mode.

Parameters
[in]enable

If true, enables continuous calibration, if false disables continuous calibration.


Definition at line 3429 of file platform/emlib/inc/em_cmu.h

CMU_CalibrateStart#

void CMU_CalibrateStart (void )

Start calibration.

Parameters
N/A

Note


Definition at line 3442 of file platform/emlib/inc/em_cmu.h

CMU_CalibrateStop#

void CMU_CalibrateStop (void )

Stop the calibration counters.

Parameters
N/A

Definition at line 3452 of file platform/emlib/inc/em_cmu.h

CMU_DivToLog2#

uint32_t CMU_DivToLog2 (CMU_ClkDiv_TypeDef div)

Convert divider to logarithmic value.

Parameters
[in]div

An unscaled divider.

It only works for even numbers equal to 2^n.

Returns

  • Logarithm base 2 (binary) value, i.e. exponent as used by fixed 2^n prescalers.


Definition at line 3470 of file platform/emlib/inc/em_cmu.h

CMU_IntClear#

void CMU_IntClear (uint32_t flags)

Clear one or more pending CMU interrupts.

Parameters
[in]flags

CMU interrupt sources to clear.


Definition at line 3503 of file platform/emlib/inc/em_cmu.h

CMU_IntDisable#

void CMU_IntDisable (uint32_t flags)

Disable one or more CMU interrupts.

Parameters
[in]flags

CMU interrupt sources to disable.


Definition at line 3515 of file platform/emlib/inc/em_cmu.h

CMU_IntEnable#

void CMU_IntEnable (uint32_t flags)

Enable one or more CMU interrupts.

Parameters
[in]flags

CMU interrupt sources to enable.

Note

  • Depending on use case, a pending interrupt may already be set prior to enabling the interrupt. Consider using CMU_IntClear() prior to enabling if the pending interrupt should be ignored.


Definition at line 3532 of file platform/emlib/inc/em_cmu.h

CMU_IntGet#

uint32_t CMU_IntGet (void )

Get pending CMU interrupts.

Parameters
N/A

Returns

  • CMU interrupt sources pending.


Definition at line 3544 of file platform/emlib/inc/em_cmu.h

CMU_IntGetEnabled#

uint32_t CMU_IntGetEnabled (void )

Get enabled and pending CMU interrupt flags.

Parameters
N/A

Useful for handling more interrupt sources in the same interrupt handler.

Note

  • This function does not clear event bits.

Returns

  • Pending and enabled CMU interrupt sources. The return value is the bitwise AND of

    • the enabled interrupt sources in CMU_IEN and

    • the pending interrupt flags CMU_IF


Definition at line 3565 of file platform/emlib/inc/em_cmu.h

CMU_IntSet#

void CMU_IntSet (uint32_t flags)

Set one or more pending CMU interrupts.

Parameters
[in]flags

CMU interrupt sources to set to pending.


Definition at line 3580 of file platform/emlib/inc/em_cmu.h

CMU_Lock#

void CMU_Lock (void )

Lock the CMU to protect some of its registers against unintended modification.

Parameters
N/A

See the reference manual for CMU registers that will be locked.

Note

  • If locking the CMU registers, they must be unlocked prior to using any CMU API functions modifying CMU registers protected by the lock.


Definition at line 3598 of file platform/emlib/inc/em_cmu.h

CMU_Unlock#

void CMU_Unlock (void )

Unlock the CMU so that writing to locked registers again is possible.

Parameters
N/A

Definition at line 3607 of file platform/emlib/inc/em_cmu.h

Macro Definition Documentation#

CMU_CLOCK_SELECT_SET#

#define CMU_CLOCK_SELECT_SET
Value:
(clock, sel)

Macro to set clock sources in the clock tree.


Definition at line 55 of file platform/emlib/inc/em_cmu.h

cmuClkDiv_1#

#define cmuClkDiv_1
Value:
1

Clock divisors.

These values are valid for prescalers. Divide clock by 1.


Definition at line 1820 of file platform/emlib/inc/em_cmu.h

cmuClkDiv_2#

#define cmuClkDiv_2
Value:
2

Divide clock by 2.


Definition at line 1821 of file platform/emlib/inc/em_cmu.h

cmuClkDiv_4#

#define cmuClkDiv_4
Value:
4

Divide clock by 4.


Definition at line 1822 of file platform/emlib/inc/em_cmu.h

cmuClkDiv_8#

#define cmuClkDiv_8
Value:
8

Divide clock by 8.


Definition at line 1823 of file platform/emlib/inc/em_cmu.h

cmuClkDiv_16#

#define cmuClkDiv_16
Value:
16

Divide clock by 16.


Definition at line 1824 of file platform/emlib/inc/em_cmu.h

cmuClkDiv_32#

#define cmuClkDiv_32
Value:
32

Divide clock by 32.


Definition at line 1825 of file platform/emlib/inc/em_cmu.h

cmuClkDiv_64#

#define cmuClkDiv_64
Value:
64

Divide clock by 64.


Definition at line 1826 of file platform/emlib/inc/em_cmu.h

cmuClkDiv_128#

#define cmuClkDiv_128
Value:
128

Divide clock by 128.


Definition at line 1827 of file platform/emlib/inc/em_cmu.h

cmuClkDiv_256#

#define cmuClkDiv_256
Value:
256

Divide clock by 256.


Definition at line 1828 of file platform/emlib/inc/em_cmu.h

cmuClkDiv_512#

#define cmuClkDiv_512
Value:
512

Divide clock by 512.


Definition at line 1829 of file platform/emlib/inc/em_cmu.h

cmuClkDiv_1024#

#define cmuClkDiv_1024
Value:
1024

Divide clock by 1024.


Definition at line 1830 of file platform/emlib/inc/em_cmu.h

cmuClkDiv_2048#

#define cmuClkDiv_2048
Value:
2048

Divide clock by 2048.


Definition at line 1831 of file platform/emlib/inc/em_cmu.h

cmuClkDiv_4096#

#define cmuClkDiv_4096
Value:
4096

Divide clock by 4096.


Definition at line 1832 of file platform/emlib/inc/em_cmu.h

cmuClkDiv_8192#

#define cmuClkDiv_8192
Value:
8192

Divide clock by 8192.


Definition at line 1833 of file platform/emlib/inc/em_cmu.h

cmuClkDiv_16384#

#define cmuClkDiv_16384
Value:
16384

Divide clock by 16384.


Definition at line 1834 of file platform/emlib/inc/em_cmu.h

cmuClkDiv_32768#

#define cmuClkDiv_32768
Value:
32768

Divide clock by 32768.


Definition at line 1835 of file platform/emlib/inc/em_cmu.h

CMU_LFXOINIT_DEFAULT#

#define CMU_LFXOINIT_DEFAULT
Value:
{ \
cmuLfxoBoost70, \
_CMU_CTRL_LFXOTIMEOUT_DEFAULT, \
cmuOscMode_Crystal, \
}

Default LFXO initialization values.


Definition at line 3129 of file platform/emlib/inc/em_cmu.h

CMU_LFXOINIT_EXTERNAL_CLOCK#

#define CMU_LFXOINIT_EXTERNAL_CLOCK
Value:
{ \
cmuLfxoBoost70, \
_CMU_CTRL_LFXOTIMEOUT_8CYCLES, \
cmuOscMode_External, \
}

Default LFXO initialization for external clock.


Definition at line 3136 of file platform/emlib/inc/em_cmu.h

CMU_HFXOINIT_DEFAULT#

#define CMU_HFXOINIT_DEFAULT
Value:
{ \
_CMU_CTRL_HFXOBOOST_DEFAULT, /* 100% HFXO boost */ \
_CMU_CTRL_HFXOTIMEOUT_DEFAULT, /* 16 K startup delay */ \
false, /* Disable glitch detector */ \
cmuOscMode_Crystal, /* Crystal oscillator */ \
}

Default HFXO initialization values for Platform 1 devices.


Definition at line 3271 of file platform/emlib/inc/em_cmu.h

CMU_HFXOINIT_EXTERNAL_CLOCK#

#define CMU_HFXOINIT_EXTERNAL_CLOCK
Value:
{ \
0, /* Minimal HFXO boost, 50% */ \
_CMU_CTRL_HFXOTIMEOUT_8CYCLES, /* Minimal startup delay, 8 cycles */ \
false, /* Disable glitch detector */ \
cmuOscMode_External, /* External digital clock */ \
}

Default HFXO initialization for external clock.


Definition at line 3279 of file platform/emlib/inc/em_cmu.h