Responses#

Si1133 responses.

Macros#

#define
SI1133_RSP0_CHIPSTAT_MASK 0xE0

Chip state mask in Response0 register

#define
SI1133_RSP0_COUNTER_MASK 0x1F

Command counter and error indicator mask in Response0 register

#define
SI1133_RSP0_SLEEP 0x20

Sleep state indicator bit mask in Response0 register