CORE - Interrupt Handling#

Warnings

  • If you are looking for atomic and critical sections, they have been moved to platform/common in the Core API.

Introduction#

This module provides support for NVIC sections. NVIC sections are like critical sections, except interrupts are masked on an individual IRQ basis. This module also provides an API to relocate the vector table in RAM, and register IRQ handlers in the RAM based interrupt vector table.

  • NVIC mask section: Mask interrupts (external interrupts) on an individual IRQ basis.

Examples#

Implement an NVIC critical section:

{
  CORE_DECLARE_NVIC_ZEROMASK(mask); // A zero initialized NVIC disable mask

  // Set mask bits for IRQs to block in the NVIC critical section.
  // In many cases, you can create the disable mask once upon application
  // startup and use the mask globally throughout the application lifetime.
  CORE_NvicMaskSetIRQ(LEUART0_IRQn, &mask);
  CORE_NvicMaskSetIRQ(VCMP_IRQn,    &mask);

  // Enter NVIC critical section with the disable mask
  CORE_NVIC_SECTION(&mask,
    ...
    ... your code goes here ...
    ...
  )
}

Interrupt vector tables#

When using RAM based interrupt vector tables it is the user's responsibility to allocate the table space correctly. The tables must be aligned as specified in the CPU reference manual.

Use CORE_InitNvicVectorTable() to initialize a RAM based vector table by copying table entries from a source vector table to a target table. VTOR is set to the address of the target vector table.

Use CORE_GetNvicRamTableHandler()CORE_SetNvicRamTableHandler() to get or set the interrupt handler for a specific IRQn. They both use the interrupt vector table defined by the current VTOR register value.

Modules#

CORE_nvicMask_t

Functions#

bool
CORE_IrqIsBlocked(IRQn_Type irqN)

Check if a specific interrupt is disabled or blocked.

void
CORE_GetNvicEnabledMask(CORE_nvicMask_t *mask)

Get the current NVIC enable mask state.

bool
CORE_GetNvicMaskDisableState(const CORE_nvicMask_t *mask)

Get NVIC disable state for a given mask.

void
CORE_EnterNvicMask(CORE_nvicMask_t *nvicState, const CORE_nvicMask_t *disable)

Enter a NVIC mask section.

void
CORE_NvicDisableMask(const CORE_nvicMask_t *disable)

Disable NVIC interrupts.

void
CORE_NvicEnableMask(const CORE_nvicMask_t *enable)

Set current NVIC interrupt enable mask.

void
CORE_YieldNvicMask(const CORE_nvicMask_t *enable)

Brief NVIC interrupt enable/disable sequence to allow handling of pending interrupts.

void
CORE_NvicMaskSetIRQ(IRQn_Type irqN, CORE_nvicMask_t *mask)

Utility function to set an IRQn bit in a NVIC enable/disable mask.

void
CORE_NvicMaskClearIRQ(IRQn_Type irqN, CORE_nvicMask_t *mask)

Utility function to clear an IRQn bit in a NVIC enable/disable mask.

bool
CORE_NvicIRQDisabled(IRQn_Type irqN)

Check if an NVIC interrupt is disabled.

void *

Utility function to get the handler for a specific interrupt.

void
CORE_SetNvicRamTableHandler(IRQn_Type irqN, void *handler)

Utility function to set the handler for a specific interrupt.

void
CORE_InitNvicVectorTable(uint32_t *sourceTable, uint32_t sourceSize, uint32_t *targetTable, uint32_t targetSize, void *defaultHandler, bool overwriteActive)

Initialize an interrupt vector table by copying table entries from a source to a target table.

Macros#

#define
CORE_NVIC_REG_WORDS ((EXT_IRQ_COUNT + 31) / 32)

Number of words in a NVIC mask set.

#define

Number of entries in a default interrupt vector table.

#define

Highest priority for core interrupt.

#define

Default priority for core interrupt.

#define

Lowest priority for core interrupt.

#define
CORE_DECLARE_NVIC_STATE CORE_nvicMask_t nvicState

Allocate storage for NVIC interrupt masks for use by CORE_ENTER/EXIT_NVIC() macros.

#define

Allocate storage for NVIC interrupt masks.

#define

Allocate storage for and zero initialize NVIC interrupt mask.

#define

NVIC mask style interrupt disable.

#define

NVIC mask style interrupt enable.

#define
CORE_NVIC_SECTION (mask, yourcode)

Convenience macro for implementing a NVIC mask section.

#define
CORE_ENTER_NVIC (disable)

Enter NVIC mask section.

#define

Exit NVIC mask section.

#define

NVIC maks style yield.

Function Documentation#

CORE_IrqIsBlocked#

bool CORE_IrqIsBlocked (IRQn_Type irqN)

Check if a specific interrupt is disabled or blocked.

Parameters
[in]irqN

The IRQn_Type enumerator for the interrupt to check.

Returns

  • True if the interrupt is disabled or blocked.


Definition at line 476 of file platform/emlib/src/em_core.c

CORE_GetNvicEnabledMask#

void CORE_GetNvicEnabledMask (CORE_nvicMask_t * mask)

Get the current NVIC enable mask state.

Parameters
[out]mask

The current NVIC enable mask.


Definition at line 258 of file platform/emlib/src/em_core.c

CORE_GetNvicMaskDisableState#

bool CORE_GetNvicMaskDisableState (const CORE_nvicMask_t * mask)

Get NVIC disable state for a given mask.

Parameters
[in]mask

An NVIC mask to check.

Returns

  • True if all NVIC interrupt mask bits are clear.


Definition at line 277 of file platform/emlib/src/em_core.c

CORE_EnterNvicMask#

void CORE_EnterNvicMask (CORE_nvicMask_t * nvicState, const CORE_nvicMask_t * disable)

Enter a NVIC mask section.

Parameters
[out]nvicState

Return NVIC interrupts enable mask prior to section entry.

[in]disable

A mask specifying which NVIC interrupts to disable within the section.

When a NVIC mask section is entered, specified NVIC interrupts are disabled.


Definition at line 111 of file platform/emlib/src/em_core.c

CORE_NvicDisableMask#

void CORE_NvicDisableMask (const CORE_nvicMask_t * disable)

Disable NVIC interrupts.

Parameters
[in]disable

A mask specifying which NVIC interrupts to disable.


Definition at line 129 of file platform/emlib/src/em_core.c

CORE_NvicEnableMask#

void CORE_NvicEnableMask (const CORE_nvicMask_t * enable)

Set current NVIC interrupt enable mask.

Parameters
[out]enable

A mask specifying which NVIC interrupts are currently enabled.


Definition at line 145 of file platform/emlib/src/em_core.c

CORE_YieldNvicMask#

void CORE_YieldNvicMask (const CORE_nvicMask_t * enable)

Brief NVIC interrupt enable/disable sequence to allow handling of pending interrupts.

Parameters
[in]enable

A mask specifying which NVIC interrupts to briefly enable.

Note

  • Usually used within an NVIC mask section.


Definition at line 165 of file platform/emlib/src/em_core.c

CORE_NvicMaskSetIRQ#

void CORE_NvicMaskSetIRQ (IRQn_Type irqN, CORE_nvicMask_t * mask)

Utility function to set an IRQn bit in a NVIC enable/disable mask.

Parameters
[in]irqN

The IRQn_Type enumerator for the interrupt.

[inout]mask

The mask to set the interrupt bit in.


Definition at line 222 of file platform/emlib/src/em_core.c

CORE_NvicMaskClearIRQ#

void CORE_NvicMaskClearIRQ (IRQn_Type irqN, CORE_nvicMask_t * mask)

Utility function to clear an IRQn bit in a NVIC enable/disable mask.

Parameters
[in]irqN

The IRQn_Type enumerator for the interrupt.

[inout]mask

The mask to clear the interrupt bit in.


Definition at line 243 of file platform/emlib/src/em_core.c

CORE_NvicIRQDisabled#

bool CORE_NvicIRQDisabled (IRQn_Type irqN)

Check if an NVIC interrupt is disabled.

Parameters
[in]irqN

The IRQn_Type enumerator for the interrupt to check.

Returns

  • True if the interrupt is disabled.


Definition at line 333 of file platform/emlib/src/em_core.c

CORE_GetNvicRamTableHandler#

void * CORE_GetNvicRamTableHandler (IRQn_Type irqN)

Utility function to get the handler for a specific interrupt.

Parameters
[in]irqN

The IRQn_Type enumerator for the interrupt.

Returns

  • The handler address.

Note

  • Uses the interrupt vector table defined by the current VTOR register value.


Definition at line 353 of file platform/emlib/src/em_core.c

CORE_SetNvicRamTableHandler#

void CORE_SetNvicRamTableHandler (IRQn_Type irqN, void * handler)

Utility function to set the handler for a specific interrupt.

Parameters
[in]irqN

The IRQn_Type enumerator for the interrupt.

[in]handler

The handler address.

Note

  • Uses the interrupt vector table defined by the current VTOR register value.


Definition at line 376 of file platform/emlib/src/em_core.c

CORE_InitNvicVectorTable#

void CORE_InitNvicVectorTable (uint32_t * sourceTable, uint32_t sourceSize, uint32_t * targetTable, uint32_t targetSize, void * defaultHandler, bool overwriteActive)

Initialize an interrupt vector table by copying table entries from a source to a target table.

Parameters
[in]sourceTable

The address of the source vector table.

[in]sourceSize

A number of entries in the source vector table.

[in]targetTable

The address of the target (new) vector table.

[in]targetSize

A number of entries in the target vector table.

[in]defaultHandler

An address of the interrupt handler used for target entries for which where there is no corresponding source entry (i.e., the target table is larger than the source table).

[in]overwriteActive

When true, a target table entry is always overwritten with the corresponding source entry. If false, a target table entry is only overwritten if it is zero. This makes it possible for an application to partly initialize a target table before passing it to this function.

Note

  • This function will set a new VTOR register value.


Definition at line 413 of file platform/emlib/src/em_core.c

Macro Definition Documentation#

CORE_NVIC_REG_WORDS#

#define CORE_NVIC_REG_WORDS
Value:
((EXT_IRQ_COUNT + 31) / 32)

Number of words in a NVIC mask set.


Definition at line 47 of file platform/emlib/inc/em_core.h

CORE_DEFAULT_VECTOR_TABLE_ENTRIES#

#define CORE_DEFAULT_VECTOR_TABLE_ENTRIES
Value:
(EXT_IRQ_COUNT + 16)

Number of entries in a default interrupt vector table.


Definition at line 50 of file platform/emlib/inc/em_core.h

CORE_INTERRUPT_HIGHEST_PRIORITY#

#define CORE_INTERRUPT_HIGHEST_PRIORITY
Value:
0

Highest priority for core interrupt.


Definition at line 53 of file platform/emlib/inc/em_core.h

CORE_INTERRUPT_DEFAULT_PRIORITY#

#define CORE_INTERRUPT_DEFAULT_PRIORITY
Value:
5

Default priority for core interrupt.


Definition at line 56 of file platform/emlib/inc/em_core.h

CORE_INTERRUPT_LOWEST_PRIORITY#

#define CORE_INTERRUPT_LOWEST_PRIORITY
Value:
7

Lowest priority for core interrupt.


Definition at line 59 of file platform/emlib/inc/em_core.h

CORE_DECLARE_NVIC_STATE#

#define CORE_DECLARE_NVIC_STATE
Value:
CORE_nvicMask_t nvicState

Allocate storage for NVIC interrupt masks for use by CORE_ENTER/EXIT_NVIC() macros.


Definition at line 80 of file platform/emlib/inc/em_core.h

CORE_DECLARE_NVIC_MASK#

#define CORE_DECLARE_NVIC_MASK
Value:
(x)

Allocate storage for NVIC interrupt masks.


Definition at line 85 of file platform/emlib/inc/em_core.h

CORE_DECLARE_NVIC_ZEROMASK#

#define CORE_DECLARE_NVIC_ZEROMASK
Value:
(x)

Allocate storage for and zero initialize NVIC interrupt mask.


Definition at line 90 of file platform/emlib/inc/em_core.h

CORE_NVIC_DISABLE#

#define CORE_NVIC_DISABLE
Value:
(mask)

NVIC mask style interrupt disable.


Definition at line 95 of file platform/emlib/inc/em_core.h

CORE_NVIC_ENABLE#

#define CORE_NVIC_ENABLE
Value:
(mask)

NVIC mask style interrupt enable.


Definition at line 100 of file platform/emlib/inc/em_core.h

CORE_NVIC_SECTION#

#define CORE_NVIC_SECTION
Value:
{ \
CORE_DECLARE_NVIC_STATE; \
CORE_ENTER_NVIC(mask); \
{ \
yourcode \
} \
CORE_EXIT_NVIC(); \
}

Convenience macro for implementing a NVIC mask section.


Definition at line 107 of file platform/emlib/inc/em_core.h

CORE_ENTER_NVIC#

#define CORE_ENTER_NVIC
Value:
(disable)

Enter NVIC mask section.

Assumes that a CORE_DECLARE_NVIC_STATE exist in scope.


Definition at line 121 of file platform/emlib/inc/em_core.h

CORE_EXIT_NVIC#

#define CORE_EXIT_NVIC
Value:
()

Exit NVIC mask section.

Assumes that a CORE_DECLARE_NVIC_STATE exist in scope.


Definition at line 125 of file platform/emlib/inc/em_core.h

CORE_YIELD_NVIC#

#define CORE_YIELD_NVIC
Value:
(enable)

NVIC maks style yield.


Definition at line 130 of file platform/emlib/inc/em_core.h