Responses#
Si1133 responses.
Macros#
#define
Chip state mask in Response0 register
#define
Command counter and error indicator mask in Response0 register
#define
SI1133_RSP0_SLEEP 0x20
Sleep state indicator bit mask in Response0 register
Macro Definition Documentation#
SI1133_RSP0_CHIPSTAT_MASK#
#define SI1133_RSP0_CHIPSTAT_MASKValue:
0xE0
Chip state mask in Response0 register
Definition at line
198
of file hardware/driver/si1133/inc/sl_si1133.h
SI1133_RSP0_COUNTER_MASK#
#define SI1133_RSP0_COUNTER_MASKValue:
0x1F
Command counter and error indicator mask in Response0 register
Definition at line
199
of file hardware/driver/si1133/inc/sl_si1133.h
SI1133_RSP0_SLEEP#
#define SI1133_RSP0_SLEEPValue:
0x20
Sleep state indicator bit mask in Response0 register
Definition at line
200
of file hardware/driver/si1133/inc/sl_si1133.h