I/O Stream EUSART#
I/O Stream EUSART.
Overview#
The Enhanced Universal Synchronous / Asynchronous Receiver / Transmitter controller(s) (EUSART) can be used as a UART and can, therefore, be connected to an external transceiver to communicate with another host using the serial link. Multiple instances can be instantiated as long as they are bound to a unique EUSART peripheral. The flow control is supported as well.
Initialization#
The stream sets itself as the default stream at the end of the initialization function.You must reconfigure the default interface if you have multiple streams in your project else the last stream initialized will be set as the system default stream.
Power manager integration#
On transmission side, I/O Stream-EUSART adds a requirement on EM1 or EM2, depending on the frequency mode, until the transmit is really completed. Once the transmit is completed the requirement is removed and the system can go to a lower energy mode if allowed.
On the receive side, a requirement on EM1 or EM2, depending on the frequency mode, is added if the application can receive data asynchronously. Meaning that the system can receive data when the MCU is in sleep mode (EM1 or EM2 to allow the reception). Allowing the reception in sleep mode will obviously increase the power consumption. Otherwise, If the system doesn't expect to receive anything, no requirement is added and the system can go to the lowest Energy mode allowed. You can control this behavior using a configuration per instance, see the following configuration:
SL_IOSTREAM_EUSART_<instance_name>_RESTRICT_ENERGY_MODE_TO_ALLOW_RECEPTION
Modules#
Enumerations#
Struct representing UART parity configuration.
Struct representing UART stop bits configuration.
Struct representing UART flow control configuration.
Functions#
EUSART Stream init.
EUSART interrupt handler.
Enumeration Documentation#
sl_iostream_eusart_uart_parity_t#
sl_iostream_eusart_uart_parity_t
Struct representing UART parity configuration.
| Enumerator | |
|---|---|
| SL_IOSTREAM_EUSART_UART_NO_PARITY | No parity. |
| SL_IOSTREAM_EUSART_UART_EVEN_PARITY | Even parity. |
| SL_IOSTREAM_EUSART_UART_ODD_PARITY | Odd parity. |
sl_iostream_eusart_uart_stop_bits_t#
sl_iostream_eusart_uart_stop_bits_t
Struct representing UART stop bits configuration.
| Enumerator | |
|---|---|
| SL_IOSTREAM_EUSART_UART_STOP_BITS_0P5 | 0.5 stop bits |
| SL_IOSTREAM_EUSART_UART_STOP_BITS_1P5 | 1.5 stop bits |
| SL_IOSTREAM_EUSART_UART_STOP_BITS_1 | 1 stop bits |
| SL_IOSTREAM_EUSART_UART_STOP_BITS_2 | 2 stop bits |
sl_iostream_eusart_uart_flow_control_t#
sl_iostream_eusart_uart_flow_control_t
Struct representing UART flow control configuration.
| Enumerator | |
|---|---|
| SL_IOSTREAM_EUSART_UART_FLOW_CTRL_NONE | No flow control. |
| SL_IOSTREAM_EUSART_UART_FLOW_CTRL_CTS | CTS HWFC. |
| SL_IOSTREAM_EUSART_UART_FLOW_CTRL_RTS | RTS HWFC. |
| SL_IOSTREAM_EUSART_UART_FLOW_CTRL_CTS_RTS | CTS & RTS HWFC. |
| SL_IOSTREAM_EUSART_UART_FLOW_CTRL_SOFT | Software flow control. |
Function Documentation#
sl_iostream_eusart_init#
sl_status_t sl_iostream_eusart_init (sl_iostream_uart_t * iostream_uart, sl_iostream_uart_config_t * uart_config, sl_iostream_eusart_config_t * eusart_config, sl_iostream_eusart_context_t * eusart_context)
EUSART Stream init.
| Type | Direction | Argument Name | Description |
|---|---|---|---|
| sl_iostream_uart_t * | [in] | iostream_uart | I/O Stream UART handle. |
| sl_iostream_uart_config_t * | [in] | uart_config | I/O Stream UART config. |
| sl_iostream_eusart_config_t * | [in] | eusart_config | EUSART configuration. |
| sl_iostream_eusart_context_t * | [in] | eusart_context | EUSART Instance context. |
Returns
Status result
sl_iostream_eusart_irq_handler#
void sl_iostream_eusart_irq_handler (sl_iostream_uart_t * iostream_uart)
EUSART interrupt handler.
| Type | Direction | Argument Name | Description |
|---|---|---|---|
| sl_iostream_uart_t * | [in] | iostream_uart | I/O Stream UART handle. |