DMA descriptor.
The LDMA DMA controller supports three different DMA descriptors. Each consists of four WORDs which map directly onto HW control registers for a given DMA channel. The three descriptor types are XFER, SYNC and WRI. Refer to the reference manual for further information.
Public Attributes#
Set to 0 to select XFER descriptor type.
Reserved.
DMA transfer trigger during LINKLOAD.
Transfer count minus one.
Enable byte swapping transfers.
Number of unit transfers per arbitration cycle.
Generate interrupt when done.
Block or cycle transfer selector.
Enable looped transfers.
Ignore single requests.
Source address increment unit size.
DMA transfer unit size.
Destination address increment unit size.
Source addressing mode.
Destination addressing mode.
DMA source address.
DMA destination address.
Select absolute or relative link address.
Enable LINKLOAD when transfer is done.
Address of next (linked) descriptor.
TRANSFER DMA descriptor, this is the only descriptor type which can be used to start a DMA transfer.
Set bits in LDMA_CTRL.SYNCTRIG register.
Clear bits in LDMA_CTRL.SYNCTRIG register.
Reserved.
Sync trigger match value.
Sync trigger match enable.
Reserved.
SYNCHRONIZE DMA descriptor, used for intra channel transfer synchronization.
Data to be written at dstAddr.
WRITE DMA descriptor, used for write immediate operations.
Public Attribute Documentation#
structType#
uint32_t LDMA_Descriptor_t::structType
Set to 0 to select XFER descriptor type.
Set to 2 to select WRITE descriptor type.
Set to 1 to select SYNC descriptor type.
xfer#
struct LDMA_Descriptor_t::@0 LDMA_Descriptor_t::xfer
TRANSFER DMA descriptor, this is the only descriptor type which can be used to start a DMA transfer.
sync#
struct LDMA_Descriptor_t::@1 LDMA_Descriptor_t::sync
SYNCHRONIZE DMA descriptor, used for intra channel transfer synchronization.
wri#
struct LDMA_Descriptor_t::@2 LDMA_Descriptor_t::wri
WRITE DMA descriptor, used for write immediate operations.