Tamper options#
Tamper configuration options.
Levels, signals and filter options.
Macros#
No action taken.
Generate interrupt.
Increment filter counter.
System reset.
Erase OTP - THIS WILL MAKE THE DEVICE INOPERATIONAL!
Reserved tamper signal.
Filter counter exceeds threshold.
SE watchdog timeout.
Reserved tamper signal.
SE RAM 2-bit ECC error.
SE CPU hardfault.
Reserved tamper signal.
SE software triggers an assert.
Secure boot of SE firmware failed.
Secure boot of user code failed.
Unauthorised command received over the Mailbox interface.
Unauthorised command received over the DCI interface.
Flash content couldn't be properly authenticated.
Reserved tamper signal.
Integrity error of internal storage is detected.
TRNG monitor detected lack of entropy.
Debug lock internal logic check failed.
Electromagnetic pulse glitch detector.
Supply glitch detector.
SE ICache RAM error.
SE RAM 1-bit ECC error.
Brown-out-detector threshold alert.
On-device temperature sensor.
DPLL lock fail low.
DPLL lock fail high.
PRS channel 0 asserted.
PRS channel 1 asserted.
PRS channel 2 asserted.
PRS channel 3 asserted.
PRS channel 4 asserted.
PRS channel 5 asserted.
PRS channel 6 asserted.
Number of tamper signals.
Timeout ~32ms.
Timeout ~64ms.
Timeout ~128ms.
Timeout ~256ms.
Timeout ~512ms.
Timeout ~1s.
Timeout ~2s.
Timeout ~4.1s.
Timeout ~8.2s.
Timeout ~16.4s.
Timeout ~32.8s.
Timeout ~1.1min.
Timeout ~2.2min.
Timeout ~4.4min.
Timeout ~8.7min.
Timeout ~17.5min.
Timeout ~35min.
Timeout ~1.2h.
Timeout ~2.3h.
Timeout ~4.7h.
Timeout ~9.3h.
Timeout ~18.6h.
Timeout ~1.6days.
Timeout ~3.1days.
Timeout ~6.2days.
Timeout ~12.4days.
Timeout ~24.9days.
Timeout ~49.7days.
Timeout ~99.4days.
Timeout ~198.8days.
Timeout ~397.7days.
Timeout ~795.4days.
Counter threshold 2.
Counter threshold 4.
Counter threshold 8.
Counter threshold 16.
Counter threshold 32.
Counter threshold 64.
Counter threshold 128.
Counter threshold 256.
Tamper flags.
Macro Definition Documentation#
SL_SE_TAMPER_LEVEL_PERMANENTLY_ERASE_OTP#
#define SL_SE_TAMPER_LEVEL_PERMANENTLY_ERASE_OTPValue:
7
Erase OTP - THIS WILL MAKE THE DEVICE INOPERATIONAL!
SL_SE_TAMPER_SIGNAL_RESERVED_1#
#define SL_SE_TAMPER_SIGNAL_RESERVED_1Value:
0x0
Reserved tamper signal.
SL_SE_TAMPER_SIGNAL_FILTER_COUNTER#
#define SL_SE_TAMPER_SIGNAL_FILTER_COUNTERValue:
0x1
Filter counter exceeds threshold.
SL_SE_TAMPER_SIGNAL_RESERVED_2#
#define SL_SE_TAMPER_SIGNAL_RESERVED_2Value:
0x3
Reserved tamper signal.
SL_SE_TAMPER_SIGNAL_SE_RAM_ECC_2#
#define SL_SE_TAMPER_SIGNAL_SE_RAM_ECC_2Value:
0x4
SE RAM 2-bit ECC error.
SL_SE_TAMPER_SIGNAL_RESERVED_3#
#define SL_SE_TAMPER_SIGNAL_RESERVED_3Value:
0x6
Reserved tamper signal.
SL_SE_TAMPER_SIGNAL_SE_SOFTWARE_ASSERTION#
#define SL_SE_TAMPER_SIGNAL_SE_SOFTWARE_ASSERTIONValue:
0x7
SE software triggers an assert.
SL_SE_TAMPER_SIGNAL_SE_SECURE_BOOT_FAILED#
#define SL_SE_TAMPER_SIGNAL_SE_SECURE_BOOT_FAILEDValue:
0x8
Secure boot of SE firmware failed.
SL_SE_TAMPER_SIGNAL_USER_SECURE_BOOT_FAILED#
#define SL_SE_TAMPER_SIGNAL_USER_SECURE_BOOT_FAILEDValue:
0x9
Secure boot of user code failed.
SL_SE_TAMPER_SIGNAL_MAILBOX_AUTHORIZATION_ERROR
#define SL_SE_TAMPER_SIGNAL_MAILBOX_AUTHORIZATION_ERRORValue:
0xA
Unauthorised command received over the Mailbox interface.
SL_SE_TAMPER_SIGNAL_DCI_AUTHORIZATION_ERROR
#define SL_SE_TAMPER_SIGNAL_DCI_AUTHORIZATION_ERRORValue:
0xB
Unauthorised command received over the DCI interface.
SL_SE_TAMPER_SIGNAL_FLASH_INTEGRITY_ERROR#
#define SL_SE_TAMPER_SIGNAL_FLASH_INTEGRITY_ERRORValue:
0xC
Flash content couldn't be properly authenticated.
SL_SE_TAMPER_SIGNAL_RESERVED_4#
#define SL_SE_TAMPER_SIGNAL_RESERVED_4Value:
0xD
Reserved tamper signal.
SL_SE_TAMPER_SIGNAL_SELFTEST_FAILED#
#define SL_SE_TAMPER_SIGNAL_SELFTEST_FAILEDValue:
0xE
Integrity error of internal storage is detected.
SL_SE_TAMPER_SIGNAL_TRNG_MONITOR#
#define SL_SE_TAMPER_SIGNAL_TRNG_MONITORValue:
0xF
TRNG monitor detected lack of entropy.
SL_SE_TAMPER_SIGNAL_SECURE_LOCK_ERROR#
#define SL_SE_TAMPER_SIGNAL_SECURE_LOCK_ERRORValue:
0x10
Debug lock internal logic check failed.
SL_SE_TAMPER_ATAMPDET_EMPGD#
#define SL_SE_TAMPER_ATAMPDET_EMPGDValue:
0x11
Electromagnetic pulse glitch detector.
SL_SE_TAMPER_SIGNAL_SE_RAM_ECC_1#
#define SL_SE_TAMPER_SIGNAL_SE_RAM_ECC_1Value:
0x14
SE RAM 1-bit ECC error.
SL_SE_TAMPER_SIGNAL_BOD#
#define SL_SE_TAMPER_SIGNAL_BODValue:
0x15
Brown-out-detector threshold alert.
SL_SE_TAMPER_SIGNAL_TEMPERATURE_SENSOR#
#define SL_SE_TAMPER_SIGNAL_TEMPERATURE_SENSORValue:
0x16
On-device temperature sensor.
SL_SE_TAMPER_SIGNAL_DPLL_LOCK_FAIL_LOW#
#define SL_SE_TAMPER_SIGNAL_DPLL_LOCK_FAIL_LOWValue:
0x17
DPLL lock fail low.
SL_SE_TAMPER_SIGNAL_DPLL_LOCK_FAIL_HIGH#
#define SL_SE_TAMPER_SIGNAL_DPLL_LOCK_FAIL_HIGHValue:
0x18
DPLL lock fail high.
SL_SE_TAMPER_SIGNAL_NUM_SIGNALS#
#define SL_SE_TAMPER_SIGNAL_NUM_SIGNALSValue:
0x20
Number of tamper signals.
SL_SE_TAMPER_FILTER_PERIOD_2DAYS#
#define SL_SE_TAMPER_FILTER_PERIOD_2DAYSValue:
0x16
Timeout ~1.6days.
SL_SE_TAMPER_FILTER_PERIOD_3DAYS#
#define SL_SE_TAMPER_FILTER_PERIOD_3DAYSValue:
0x17
Timeout ~3.1days.
SL_SE_TAMPER_FILTER_PERIOD_6DAYS#
#define SL_SE_TAMPER_FILTER_PERIOD_6DAYSValue:
0x18
Timeout ~6.2days.
SL_SE_TAMPER_FILTER_PERIOD_12DAYS#
#define SL_SE_TAMPER_FILTER_PERIOD_12DAYSValue:
0x19
Timeout ~12.4days.
SL_SE_TAMPER_FILTER_PERIOD_25DAYS#
#define SL_SE_TAMPER_FILTER_PERIOD_25DAYSValue:
0x1A
Timeout ~24.9days.
SL_SE_TAMPER_FILTER_PERIOD_50DAYS#
#define SL_SE_TAMPER_FILTER_PERIOD_50DAYSValue:
0x1B
Timeout ~49.7days.
SL_SE_TAMPER_FILTER_PERIOD_100DAYS#
#define SL_SE_TAMPER_FILTER_PERIOD_100DAYSValue:
0x1C
Timeout ~99.4days.
SL_SE_TAMPER_FILTER_PERIOD_199DAYS#
#define SL_SE_TAMPER_FILTER_PERIOD_199DAYSValue:
0x1D
Timeout ~198.8days.
SL_SE_TAMPER_FILTER_PERIOD_398DAYS#
#define SL_SE_TAMPER_FILTER_PERIOD_398DAYSValue:
0x1E
Timeout ~397.7days.
SL_SE_TAMPER_FILTER_PERIOD_795DAYS#
#define SL_SE_TAMPER_FILTER_PERIOD_795DAYSValue:
0x1F
Timeout ~795.4days.
SL_SE_TAMPER_FILTER_THRESHOLD_2#
#define SL_SE_TAMPER_FILTER_THRESHOLD_2Value:
0x7
Counter threshold 2.
SL_SE_TAMPER_FILTER_THRESHOLD_4#
#define SL_SE_TAMPER_FILTER_THRESHOLD_4Value:
0x6
Counter threshold 4.
SL_SE_TAMPER_FILTER_THRESHOLD_8#
#define SL_SE_TAMPER_FILTER_THRESHOLD_8Value:
0x5
Counter threshold 8.
SL_SE_TAMPER_FILTER_THRESHOLD_16#
#define SL_SE_TAMPER_FILTER_THRESHOLD_16Value:
0x4
Counter threshold 16.
SL_SE_TAMPER_FILTER_THRESHOLD_32#
#define SL_SE_TAMPER_FILTER_THRESHOLD_32Value:
0x3
Counter threshold 32.
SL_SE_TAMPER_FILTER_THRESHOLD_64#
#define SL_SE_TAMPER_FILTER_THRESHOLD_64Value:
0x2
Counter threshold 64.
SL_SE_TAMPER_FILTER_THRESHOLD_128#
#define SL_SE_TAMPER_FILTER_THRESHOLD_128Value:
0x1
Counter threshold 128.
SL_SE_TAMPER_FILTER_THRESHOLD_256#
#define SL_SE_TAMPER_FILTER_THRESHOLD_256Value:
0x0
Counter threshold 256.
SL_SE_TAMPER_FLAG_DGLITCH_ALWAYS_ON#
#define SL_SE_TAMPER_FLAG_DGLITCH_ALWAYS_ONValue:
(1UL << 1)
Tamper flags.
SL_SE_TAMPER_FLAG_KEEP_TAMPER_ALIVE_DURING_SLEEP#
#define SL_SE_TAMPER_FLAG_KEEP_TAMPER_ALIVE_DURING_SLEEPValue:
(1UL << 2)