Define peripheral USART structure.

Public Attributes#

uint32_t
base

Peripheral base address.

sl_clock_branch_t
clk_branch

Peripheral clock branch.

sl_bus_clock_t
bus_clock

Peripheral bus clock.

sl_dma_signal_t
dma_signal_rxdatav

RXDATAV DMA channel.

sl_dma_signal_t
dma_signal_rxdatavright

RXDATAVRIGHT DMA channel.

sl_dma_signal_t
dma_signal_txbl

TXBL DMA channel.

sl_dma_signal_t
dma_signal_txblright

TXBLRIGHT DMA channel.

sl_dma_signal_t
dma_signal_txempty

TXEMPTY DMA channel.

Public Attribute Documentation#

base#

uint32_t sl_peripheral_usart_val_t::base

Peripheral base address.


clk_branch#

sl_clock_branch_t sl_peripheral_usart_val_t::clk_branch

Peripheral clock branch.


bus_clock#

sl_bus_clock_t sl_peripheral_usart_val_t::bus_clock

Peripheral bus clock.


dma_signal_rxdatav#

sl_dma_signal_t sl_peripheral_usart_val_t::dma_signal_rxdatav

RXDATAV DMA channel.


dma_signal_rxdatavright#

sl_dma_signal_t sl_peripheral_usart_val_t::dma_signal_rxdatavright

RXDATAVRIGHT DMA channel.


dma_signal_txbl#

sl_dma_signal_t sl_peripheral_usart_val_t::dma_signal_txbl

TXBL DMA channel.


dma_signal_txblright#

sl_dma_signal_t sl_peripheral_usart_val_t::dma_signal_txblright

TXBLRIGHT DMA channel.


dma_signal_txempty#

sl_dma_signal_t sl_peripheral_usart_val_t::dma_signal_txempty

TXEMPTY DMA channel.