Error Codes#
Macros#
#define
ECODE_EMDRV_SPIDRV_OK (ECODE_OK)
A successful return value.
#define
ECODE_EMDRV_SPIDRV_ILLEGAL_HANDLE (ECODE_EMDRV_SPIDRV_BASE | 0x00000001)
An illegal SPI handle.
#define
ECODE_EMDRV_SPIDRV_PARAM_ERROR (ECODE_EMDRV_SPIDRV_BASE | 0x00000002)
An illegal input parameter.
#define
ECODE_EMDRV_SPIDRV_BUSY (ECODE_EMDRV_SPIDRV_BASE | 0x00000003)
The SPI port is busy.
#define
ECODE_EMDRV_SPIDRV_TIMER_ALLOC_ERROR (ECODE_EMDRV_SPIDRV_BASE | 0x00000004)
Unable to allocate timeout timer.
#define
ECODE_EMDRV_SPIDRV_TIMEOUT (ECODE_EMDRV_SPIDRV_BASE | 0x00000005)
An SPI transfer timeout.
#define
ECODE_EMDRV_SPIDRV_IDLE (ECODE_EMDRV_SPIDRV_BASE | 0x00000006)
No SPI transfer in progress.
#define
ECODE_EMDRV_SPIDRV_ABORTED (ECODE_EMDRV_SPIDRV_BASE | 0x00000007)
An SPI transfer has been aborted.
#define
ECODE_EMDRV_SPIDRV_MODE_ERROR (ECODE_EMDRV_SPIDRV_BASE | 0x00000008)
SPI master used slave API or vica versa.
#define
ECODE_EMDRV_SPIDRV_DMA_ALLOC_ERROR (ECODE_EMDRV_SPIDRV_BASE | 0x00000009)
Unable to allocate DMA channels.
Macro Definition Documentation#
ECODE_EMDRV_SPIDRV_OK#
#define ECODE_EMDRV_SPIDRV_OKValue:
(ECODE_OK)
A successful return value.
Definition at line
67 of file platform/emdrv/spidrv/inc/spidrv.hECODE_EMDRV_SPIDRV_ILLEGAL_HANDLE#
#define ECODE_EMDRV_SPIDRV_ILLEGAL_HANDLEValue:
(ECODE_EMDRV_SPIDRV_BASE | 0x00000001)
An illegal SPI handle.
Definition at line
68 of file platform/emdrv/spidrv/inc/spidrv.hECODE_EMDRV_SPIDRV_PARAM_ERROR#
#define ECODE_EMDRV_SPIDRV_PARAM_ERRORValue:
(ECODE_EMDRV_SPIDRV_BASE | 0x00000002)
An illegal input parameter.
Definition at line
69 of file platform/emdrv/spidrv/inc/spidrv.hECODE_EMDRV_SPIDRV_BUSY#
#define ECODE_EMDRV_SPIDRV_BUSYValue:
(ECODE_EMDRV_SPIDRV_BASE | 0x00000003)
The SPI port is busy.
Definition at line
70 of file platform/emdrv/spidrv/inc/spidrv.hECODE_EMDRV_SPIDRV_TIMER_ALLOC_ERROR#
#define ECODE_EMDRV_SPIDRV_TIMER_ALLOC_ERRORValue:
(ECODE_EMDRV_SPIDRV_BASE | 0x00000004)
Unable to allocate timeout timer.
Definition at line
71 of file platform/emdrv/spidrv/inc/spidrv.hECODE_EMDRV_SPIDRV_TIMEOUT#
#define ECODE_EMDRV_SPIDRV_TIMEOUTValue:
(ECODE_EMDRV_SPIDRV_BASE | 0x00000005)
An SPI transfer timeout.
Definition at line
72 of file platform/emdrv/spidrv/inc/spidrv.hECODE_EMDRV_SPIDRV_IDLE#
#define ECODE_EMDRV_SPIDRV_IDLEValue:
(ECODE_EMDRV_SPIDRV_BASE | 0x00000006)
No SPI transfer in progress.
Definition at line
73 of file platform/emdrv/spidrv/inc/spidrv.hECODE_EMDRV_SPIDRV_ABORTED#
#define ECODE_EMDRV_SPIDRV_ABORTEDValue:
(ECODE_EMDRV_SPIDRV_BASE | 0x00000007)
An SPI transfer has been aborted.
Definition at line
74 of file platform/emdrv/spidrv/inc/spidrv.hECODE_EMDRV_SPIDRV_MODE_ERROR#
#define ECODE_EMDRV_SPIDRV_MODE_ERRORValue:
(ECODE_EMDRV_SPIDRV_BASE | 0x00000008)
SPI master used slave API or vica versa.
Definition at line
75 of file platform/emdrv/spidrv/inc/spidrv.hECODE_EMDRV_SPIDRV_DMA_ALLOC_ERROR#
#define ECODE_EMDRV_SPIDRV_DMA_ALLOC_ERRORValue:
(ECODE_EMDRV_SPIDRV_BASE | 0x00000009)
Unable to allocate DMA channels.
Definition at line
76 of file platform/emdrv/spidrv/inc/spidrv.h