LDMA descriptor.

The LDMA LDMA controller supports three different LDMA descriptors. Each consists of four WORDs which map directly onto HW control registers for a given LDMA channel. The three descriptor types are XFER, SYNC and WRI. Refer to the reference manual for further information.

Public Attributes#

uint32_t

Set to 0 to select XFER descriptor type.

uint32_t

Reserved.

uint32_t

LDMA transfer trigger during LINKLOAD.

uint32_t

Transfer count minus one.

uint32_t

Enable byte swapping transfers.

uint32_t

Number of unit transfers per arbitration cycle.

uint32_t

Generate interrupt when done.

uint32_t

Block or cycle transfer selector.

uint32_t

Enable looped transfers.

uint32_t

Ignore single requests.

uint32_t

Source address increment unit size.

uint32_t

LDMA transfer unit size.

uint32_t

Destination address increment unit size.

uint32_t

Source addressing mode.

uint32_t

Destination addressing mode.

uint32_t

LDMA source address.

uint32_t

LDMA destination address.

uint32_t

Select absolute or relative link address.

uint32_t

Enable LINKLOAD when transfer is done.

int32_t

Address of next (linked) descriptor.

struct sl_hal_ldma_descriptor_t::@1

TRANSFER LDMA descriptor, this is the only descriptor type which can be used to start a LDMA transfer.

uint32_t

Set bits in LDMA_CTRL.SYNCTRIG register.

uint32_t

Clear bits in LDMA_CTRL.SYNCTRIG register.

uint32_t

Reserved.

uint32_t

Sync trigger match value.

uint32_t

Sync trigger match enable.

uint32_t

Reserved.

struct sl_hal_ldma_descriptor_t::@2

SYNCHRONIZE LDMA descriptor, used for intra channel transfer synchronization.

uint32_t

Data to be written at dstAddr.

struct sl_hal_ldma_descriptor_t::@3

WRITE LDMA descriptor, used for write immediate operations.

Public Attribute Documentation#

struct_type#

uint32_t sl_hal_ldma_descriptor_t::struct_type

Set to 0 to select XFER descriptor type.

Set to 2 to select WRITE descriptor type.

Set to 1 to select SYNC descriptor type.


reserved_0#

uint32_t sl_hal_ldma_descriptor_t::reserved_0

Reserved.


struct_req#

uint32_t sl_hal_ldma_descriptor_t::struct_req

LDMA transfer trigger during LINKLOAD.


xfer_count#

uint32_t sl_hal_ldma_descriptor_t::xfer_count

Transfer count minus one.


byte_swap#

uint32_t sl_hal_ldma_descriptor_t::byte_swap

Enable byte swapping transfers.


block_size#

uint32_t sl_hal_ldma_descriptor_t::block_size

Number of unit transfers per arbitration cycle.


done_ifs#

uint32_t sl_hal_ldma_descriptor_t::done_ifs

Generate interrupt when done.


req_mode#

uint32_t sl_hal_ldma_descriptor_t::req_mode

Block or cycle transfer selector.


dec_loop_count#

uint32_t sl_hal_ldma_descriptor_t::dec_loop_count

Enable looped transfers.


ignore_single_req#

uint32_t sl_hal_ldma_descriptor_t::ignore_single_req

Ignore single requests.


src_inc#

uint32_t sl_hal_ldma_descriptor_t::src_inc

Source address increment unit size.


size#

uint32_t sl_hal_ldma_descriptor_t::size

LDMA transfer unit size.


dst_inc#

uint32_t sl_hal_ldma_descriptor_t::dst_inc

Destination address increment unit size.


src_addr_mode#

uint32_t sl_hal_ldma_descriptor_t::src_addr_mode

Source addressing mode.


dst_addr_mode#

uint32_t sl_hal_ldma_descriptor_t::dst_addr_mode

Destination addressing mode.


src_addr#

uint32_t sl_hal_ldma_descriptor_t::src_addr

LDMA source address.


dst_addr#

uint32_t sl_hal_ldma_descriptor_t::dst_addr

LDMA destination address.

LDMA write destination address.


link_mode#

uint32_t sl_hal_ldma_descriptor_t::link_mode

Select absolute or relative link address.


link#

uint32_t sl_hal_ldma_descriptor_t::link

Enable LINKLOAD when transfer is done.


link_addr#

int32_t sl_hal_ldma_descriptor_t::link_addr

Address of next (linked) descriptor.


xfer#

struct sl_hal_ldma_descriptor_t::@1 sl_hal_ldma_descriptor_t::xfer

TRANSFER LDMA descriptor, this is the only descriptor type which can be used to start a LDMA transfer.


sync_set#

uint32_t sl_hal_ldma_descriptor_t::sync_set

Set bits in LDMA_CTRL.SYNCTRIG register.


sync_clr#

uint32_t sl_hal_ldma_descriptor_t::sync_clr

Clear bits in LDMA_CTRL.SYNCTRIG register.


reserved_1#

uint32_t sl_hal_ldma_descriptor_t::reserved_1

Reserved.


match_val#

uint32_t sl_hal_ldma_descriptor_t::match_val

Sync trigger match value.


match_en#

uint32_t sl_hal_ldma_descriptor_t::match_en

Sync trigger match enable.


reserved_2#

uint32_t sl_hal_ldma_descriptor_t::reserved_2

Reserved.


sync#

struct sl_hal_ldma_descriptor_t::@2 sl_hal_ldma_descriptor_t::sync

SYNCHRONIZE LDMA descriptor, used for intra channel transfer synchronization.


imm_val#

uint32_t sl_hal_ldma_descriptor_t::imm_val

Data to be written at dstAddr.


wri#

struct sl_hal_ldma_descriptor_t::@3 sl_hal_ldma_descriptor_t::wri

WRITE LDMA descriptor, used for write immediate operations.