SYSTEM CONFIGURATION#

System Configuration (SYSCFG) peripheral API.

The SYSCFG module provides access to various system configuration registers including chip revision information, system tick clock configuration, and memory controller settings.

Modules#

sl_hal_syscfg_ecc_config_t

Enumerations#

enum
SL_HAL_SYSCFG_DMEM_MASTER_LDMA = _SYSCFG_DMEM0PORTMAPSEL_LDMAPORTSEL_SHIFT
SL_HAL_SYSCFG_DMEM_MASTER_SRWAES = _SYSCFG_DMEM0PORTMAPSEL_SRWAESPORTSEL_SHIFT
SL_HAL_SYSCFG_DMEM_MASTER_AHBSRW = _SYSCFG_DMEM0PORTMAPSEL_AHBSRWPORTSEL_SHIFT
SL_HAL_DMEM_MASTER_SRWECA0 = _SYSCFG_DMEM0PORTMAPSEL_SRWECA0PORTSEL_SHIFT
SL_HAL_DMEM_MASTER_SRWECA1 = _SYSCFG_DMEM0PORTMAPSEL_SRWECA1PORTSEL_SHIFT
SL_HAL_DMEM_MASTER_MVPAHB_DATA0 = _SYSCFG_DMEM0PORTMAPSEL_MVPAHBDATA0PORTSEL_SHIFT
SL_HAL_DMEM_MASTER_MVPAHB_DATA1 = _SYSCFG_DMEM0PORTMAPSEL_MVPAHBDATA1PORTSEL_SHIFT
SL_HAL_DMEM_MASTER_MVPAHB_DATA2 = _SYSCFG_DMEM0PORTMAPSEL_MVPAHBDATA2PORTSEL_SHIFT
}

AHBHOST masters that can use alternate MPAHBRAM ports.

enum
SL_HAL_SYSCFG_PORT_PRIORITY_NONE = _MPAHBRAM_CTRL_AHBPORTPRIORITY_NONE
SL_HAL_SYSCFG_PORT_PRIORITY_PORT0 = _MPAHBRAM_CTRL_AHBPORTPRIORITY_PORT0
SL_HAL_SYSCFG_PORT_PRIORITY_PORT1 = _MPAHBRAM_CTRL_AHBPORTPRIORITY_PORT1
SL_HAL_SYSCFG_PORT_PRIORITY_PORT2 = _MPAHBRAM_CTRL_AHBPORTPRIORITY_PORT2
SL_HAL_SYSCFG_PORT_PRIORITY_PORT3 = _MPAHBRAM_CTRL_AHBPORTPRIORITY_PORT3
}

AHB port given priority.

Functions#

uint32_t

Reads CHIPREV register.

void

Enables the external clock for the SysTick timer.

void

Disables the external clock source for the SysTick timer.

void
sl_hal_syscfg_ecc_set_config(const sl_hal_syscfg_ecc_config_t *ecc_config)

Configure Error Correcting Code (ECC).

void
sl_hal_syscfg_set_dmem_port_map(sl_hal_syscfg_dmem_master_t master, uint8_t port)

Set MPAHBRAM port to use to access DMEM.

void
sl_hal_syscfg_set_port_priority(sl_hal_syscfg_port_priority_t port_priority)

Set MPAHBRAM port priority for arbitration when multiple concurrent transactions to DMEM.

Get MPAHBRAM port arbitration priority selection.

uint32_t

Reads the DMEM0RETNCTRL register.

void

Applies a mask to the DMEM0RETNCTRL register.

void

Sets the DMEM0RETNCTRL register to zero.

Macros#

#define
SYSCFG_CHIPREV_PARTNUMBER1 0xFE0

Bit mask used to extract the part number value without the new naming bitfield.

#define
SYSCFG_CHIPREV_PARTNUMBER0 0xF
#define
SL_HAL_SYSCFG_ECC_BANKS (1)

Series 2 chips incorporate 1 memory bank including ECC support.

#define
SL_HAL_MSC_ECC_CONFIG_DEFAULT undefined

Default syscfg ecc_config initialization.

Enumeration Documentation#

sl_hal_syscfg_dmem_master_t#

sl_hal_syscfg_dmem_master_t

AHBHOST masters that can use alternate MPAHBRAM ports.

Enumerator
SL_HAL_SYSCFG_DMEM_MASTER_LDMA

LDMA master.

SL_HAL_SYSCFG_DMEM_MASTER_SRWAES

SRWAES master.

SL_HAL_SYSCFG_DMEM_MASTER_AHBSRW

AHBSRW master.

SL_HAL_DMEM_MASTER_SRWECA0

SRWECA0 master.

SL_HAL_DMEM_MASTER_SRWECA1

SRWECA1 master.

SL_HAL_DMEM_MASTER_MVPAHB_DATA0

MVPAHB_DATA0 master.

SL_HAL_DMEM_MASTER_MVPAHB_DATA1

MVPAHB_DATA1 master.

SL_HAL_DMEM_MASTER_MVPAHB_DATA2

MVPAHB_DATA2 master.


sl_hal_syscfg_port_priority_t#

sl_hal_syscfg_port_priority_t

AHB port given priority.

Enumerator
SL_HAL_SYSCFG_PORT_PRIORITY_NONE

Priority none.

SL_HAL_SYSCFG_PORT_PRIORITY_PORT0

Priority is given to port 0.

SL_HAL_SYSCFG_PORT_PRIORITY_PORT1

Priority is given to port 1.

SL_HAL_SYSCFG_PORT_PRIORITY_PORT2

Priority is given to port 2.

SL_HAL_SYSCFG_PORT_PRIORITY_PORT3

Priority is given to port 3.


Function Documentation#

sl_hal_syscfg_read_chip_rev#

uint32_t sl_hal_syscfg_read_chip_rev (void )

Reads CHIPREV register.

Parameters
TypeDirectionArgument NameDescription
voidN/A

Returns

  • The current value of the CHIPREV register, containing chip revision information.


sl_hal_syscfg_set_systicextclken_cfgsystic#

void sl_hal_syscfg_set_systicextclken_cfgsystic (void )

Enables the external clock for the SysTick timer.

Parameters
TypeDirectionArgument NameDescription
voidN/A

sl_hal_syscfg_clear_systicextclken_cfgsystic#

void sl_hal_syscfg_clear_systicextclken_cfgsystic (void )

Disables the external clock source for the SysTick timer.

Parameters
TypeDirectionArgument NameDescription
voidN/A

sl_hal_syscfg_ecc_set_config#

void sl_hal_syscfg_ecc_set_config (const sl_hal_syscfg_ecc_config_t * ecc_config)

Configure Error Correcting Code (ECC).

Parameters
TypeDirectionArgument NameDescription
const sl_hal_syscfg_ecc_config_t *[in]ecc_config

ECC configuration.

This function configures ECC support according to the configuration input parameter. If the user requests enabling ECC for a given RAM bank this function will initialize ECC memory (syndromes) for the bank by reading and writing the existing values in memory. I.e. all data is preserved. The initialization process runs in a critical section disallowing interrupts and thread scheduling, and will consume a considerable amount of clock cycles. Therefore the user should carefully assess where to call this function. The user can consider to increase the clock frequency in order to reduce the execution time. This function makes use of 2 DMA channels to move data to/from RAM in an efficient way. The user can select which 2 DMA channels to use in order to avoid conflicts with the application. However the user must make sure that no other DMA operations takes place while this function is executing. If the application has been using the DMA controller prior to calling this function, the application will need to reinitialize DMA registers after this function has completed.

Note

  • This function protects the ECC initialization procedure from interrupts and other threads by using a critical section (defined by sl_core.h) When running on RTOS the user may need to override CORE_EnterCritical CORE_ExitCritical.


sl_hal_syscfg_set_dmem_port_map#

void sl_hal_syscfg_set_dmem_port_map (sl_hal_syscfg_dmem_master_t master, uint8_t port)

Set MPAHBRAM port to use to access DMEM.

Parameters
TypeDirectionArgument NameDescription
sl_hal_syscfg_dmem_master_t[in]master

AHBHOST master to be configured.

uint8_t[in]port

AHBHOST slave port to use.

This function configures which MPAHBRAM slave port is used to access DMEM. Depending on the use case, it might improve performance by spreading the load over the N ports (N is usually 2 or 4),instead of starving because a port is used by another master.


sl_hal_syscfg_set_port_priority#

void sl_hal_syscfg_set_port_priority (sl_hal_syscfg_port_priority_t port_priority)

Set MPAHBRAM port priority for arbitration when multiple concurrent transactions to DMEM.

Parameters
TypeDirectionArgument NameDescription
sl_hal_syscfg_port_priority_t[in]port_priority

AHBHOST slave port having elevated priority.

This function configures which MPAHBRAM slave port will have priority. The AHB port arbitration default scheme, round-robin arbitration, is selected when port_priority == SL_HAL_SYSCFG_PORT_PRIORITY_NONE.

Note

  • Doing this can potentially starve the others AHB port(s).


sl_hal_syscfg_get_port_priority#

sl_hal_syscfg_port_priority_t sl_hal_syscfg_get_port_priority (void )

Get MPAHBRAM port arbitration priority selection.

Parameters
TypeDirectionArgument NameDescription
voidN/A

Returns

  • Returns the AHBHOST slave port given priority or none.

This function returns the AHBHOST slave with raised priority.


sl_hal_syscfg_read_dmem0retnctrl#

uint32_t sl_hal_syscfg_read_dmem0retnctrl (void )

Reads the DMEM0RETNCTRL register.

Parameters
TypeDirectionArgument NameDescription
voidN/A

Returns

  • The current value of the DMEM0RETNCTRL register.

This function retrieves the current value of the DMEM0RETNCTRL register, which is used to control the retention settings for DMEM0 memory blocks.


sl_hal_syscfg_mask_dmem0retnctrl#

void sl_hal_syscfg_mask_dmem0retnctrl (uint32_t mask)

Applies a mask to the DMEM0RETNCTRL register.

Parameters
TypeDirectionArgument NameDescription
uint32_t[in]mask

The bit mask to apply to the DMEM0RETNCTRL register.

This function performs a bitwise OR operation between the current value of the DMEM0RETNCTRL register and the provided mask, setting specific bits in the register.


sl_hal_syscfg_zero_dmem0retnctrl#

void sl_hal_syscfg_zero_dmem0retnctrl (void )

Sets the DMEM0RETNCTRL register to zero.

Parameters
TypeDirectionArgument NameDescription
voidN/A

This function clears all bits in the DMEM0RETNCTRL register by setting its value to 0. This effectively disables all retention settings for DMEM0 memory blocks.