Simplicity SDK Platform - CMSIS Device Version 6.0.1 - Release Notes (Mar 25, 2026)#
Simplicity SDK Platform Version 6.0.1
Release Summary#
Key Features | API Changes | Bug Fixes | Chip Enablement
Key Features#
Added in 6.0.1#
sl_main: New application hook
app_init_post_platformcalled after platform/driver/service init and before stack init.Linker: TrustZone workspaces can use remaining flash and RAM without specifying memory_flash_size or memory_ram_size.
Added in 6.0.0#
Auto PCLK divider selection now defaults to datasheet-compliant values.
Power Manager adds EM0/EM1 voltage scaling and power optimizations.
Clock Manager validation and oscillator configuration options expanded.
API Changes#
Changed in 6.0.1#
sl_main: New application hook app_init_post_platform for initialization after platform, driver, and service init but before stack init.
Changed in 6.0.0#
Peripheral HAL init macros renamed to
_INIT_DEFAULTwith standardized init signatures.UARTDRV adds
UARTDRV_GetTransmitDepthExtandUARTDRV_GetReceiveDepthExtreturninguint16_tdepths.Memory Manager and EMU DCDC APIs remove implicit enable/lock handling and tighten validation; DCDC Coulomb Counter calibration APIs deprecated in favor of HLD.
Bug Fixes#
Fixed in 6.0.1#
Clock Manager: Wrapped SE Manager calls during initialization in atomic sections.
Memory Manager: Fixed heap statistics underflow and memory pool corruption when the same block was freed twice.
Power Manager: Restored clock correctly when an EM1 requirement is added during sleep on SiXG301 devices.
RGB LED PWM driver: Fixed build issue for Series 3 devices.
NVM: Updated all NVM operations to use non-cacheable data-alias to avoid L1ICACHE returning outdated cached data.
Fixed in 6.0.0#
Clock Manager, IADC, EMU, LDMA, TIMER, and EUSART/UART fixes across Series 2 devices.
Linker and toolchain updates to enforce memory limits and avoid build warnings.
Chip Enablement#
Added in 6.0.1#
None.
Added in 6.0.0#
Added EFR32FG23L010F128GM40, EFR32FG23L020F128GM40 EFR32FG2DB010F512IM48, BGM270SC22SNA and MGM270SC22SNA support.
Key Features#
New Features | Enhancements | Removed Features | Deprecated Features
New Features#
Added in 6.0.1#
sl_main: Added application hook app_init_post_platform, called from sl_main_second_stage_init after sl_platform_init, sl_driver_init, and sl_service_init have completed and before sl_stack_init is called, allowing initialization that depends on platform components, drivers, and services but must run before stacks.
Added in 6.0.0#
Clock Manager: Added SL_CLOCK_MANAGER_PCLK_DIV_MIN option to automatically select the lowest compliant PCLK divider (default).
Power Manager: Added SL_POWER_MANAGER_ENABLE_EM01_VOLTAGE_SCALING to apply the lowest VSCALE in EM0/EM1 based on SYSCLK.
Power Manager: HCLK and PCLK division is now maximized after early EM2 wakeups to reduce EM1 power.
Enhancements#
Added in 6.0.1#
Linker: memory_flash_start can now be used without specifying memory_flash_size; if memory_flash_size is not specified, the application uses the remaining flash. Similarly, memory_ram_start can be used without memory_ram_size.
Added in 6.0.0#
Clock Manager: Added SLC validation to ensure SYSCLK, HCLK, and PCLK respect datasheet limits.
Clock Manager: Added SL_CLOCK_MANAGER_LFXO_GAIN configuration for LFXO gain selection.
Clock Manager: Added separate XI/XO CTUNE settings (SL_CLOCK_MANAGER_HFXO_CTUNEXIANA and SL_CLOCK_MANAGER_HFXO_CTUNEXOANA) with enable control.
Clock Manager: Added SL_CLOCK_MANAGER_HFXO_ENXIDCBIASANA to enable DC bias for AC-coupled external oscillators.
Linker: Relocated vma_ramfuncs to text_ram_vma to clarify stack sizing.
NVM3: Optimized repack size requirements for 4 KB and 8 KB page configurations, improving flash utilization and reducing repack frequency.
NVM3: Updated forced-repack logic to use a hard threshold instead of a soft threshold. The user repack threshold is now defined as forced threshold plus maximum object size, whereas previously it was identical to the forced threshold.
Removed Features#
None.
Deprecated Features#
None.
API Changes#
New APIs | Modified APIs | Removed APIs | Deprecated APIs
New APIs#
Added in 6.0.1#
New API Signature | Deprecated API replaced by this (if any) |
|---|---|
void app_init_post_platform(void) | None |
Added in 6.0.0#
New API Signature | Deprecated API replaced by this (if any) |
|---|---|
Ecode_t UARTDRV_GetTransmitDepthExt(UARTDRV_Handle_t handle, uint16_t *depth) | None |
Ecode_t UARTDRV_GetReceiveDepthExt(UARTDRV_Handle_t handle, uint16_t *depth) | None |
Modified APIs#
Modified in 6.0.1#
None.
Modified in 6.0.0#
Old API | Modified |
|---|---|
Peripheral HAL init macros | Renamed to |
| Now returns |
Removed APIs#
None.
Deprecated APIs#
Deprecated in 6.0.1#
None.
Deprecated in 6.0.0#
Deprecated API Name | Planned Removal Date |
|---|---|
12/09/2026 | |
12/09/2026 | |
12/09/2026 | |
12/09/2026 |
Bug Fixes#
Fixed in 6.0.1#
| ID | Issue Description | GitHub / Salesforce Reference (if any) | Affected Software Variants, Hardware, Modes, Host Interfaces |
|---|---|---|---|
| Services | |||
| 1589194 | Clock Manager: Added atomic sections around some SE Manager function calls during Clock Manager initialization to avoid using RTOS constructs before the kernel is started. | 00338665 | SiXG301 devices |
| 1574895 | Memory Manager: Fixed an issue in the statistics APIs where the reported used heap value could underflow. | None | All |
| 1574016 | Memory Manager: Fixed an issue where freeing the same memory pool allocation twice would corrupt the memory pool, making it impossible to delete the memory pool. | None | All |
| 1525962 | Power Manager: Add missing clock restoration when an EM1 requirement is added during sleep with SYSCLK switch from SOCPLL to HFXO. | 00333452 | SiXG301 Devices |
| 1589197 | NVM: Updated all NVM operations to use non-cacheable data-alias to avoid L1ICACHE returning outdated cached data. | None | SiXG301 devices |
| Peripherals | |||
| 1577673 | hal_ldma: Fixed misclassification of multiple sl_hal_ldma functions that are called from interrupt context in DMADRV; they are now correctly placed in RAM on Series 3 devices. | None | SiXG301 Devices |
| 1563576 | hal_ldma: Fixed an issue where the CHDONE flag for a given channel was not being cleared before starting a new transfer with the sl_hal_ldma_start_transfer API. | None | All |
| 1611330 | RGB LED PWM driver: Fixed the build issue for Series 3 devices. | None | SiXG301 devices |
Fixed in 6.0.0#
| ID | Issue Description | GitHub / Salesforce Reference (if any) | Affected Software Variants, Hardware, Modes, Host Interfaces |
|---|---|---|---|
| Services | |||
| 1533447, 1512518, 1479008, 1455259 | clock_manager/device_init: Aligned HFRCO and DPLL defaults for xG22 devices by setting HFRCO to 38 MHz on limited parts, fixing DPLL max frequency to 38 MHz, and updating Device Init for BG22/FG22/L22 OPNs with reduced calibrated bands. | Setting HRFRCO to 80MHz fails |
|
| 1505125 | clock_manager: Set SL_CLOCK_MANAGER_DEFAULT_HF_CLOCK_SOURCE_AUTO to HFRCODPLL for xG21 devices to match wireless stack expectations. | None | EFR32xG21 |
| 1529640 | sl_main: Removed duplicate weak definitions when upgrading sl_system projects to sl_main to avoid conflicts in app_init and app_process_action. | None | Projects using sl_system_compatibility. |
| 1528625 | Token Manager: Fixed virtual EUI token (TOKEN_MFG_EUI_64) read logic. When a read request is made for the virtual EUI token (TOKEN_MFG_EUI_64), the system first checks the override token TOKEN_MFG_CUSTOM_EUI_64 (if the override feature is enabled). If an override value exists, it returns the overridden TOKEN_MFG_CUSTOM_EUI_64 data. If no override exists, it returns the static TOKEN_MFG_CUSTOM_EUI_64 data. If that is also unavailable, it falls back to the TOKEN_MFG_EMBER_EUI_64 token (Silicon Labs device info register) and returns the DevInfo value. Note: The virtual EUI token (TOKEN_MFG_EUI_64) itself cannot be overridden because it is not an actual physical token. | None | All |
| 1449079 | NVM3: Fixed an issue where, on bootup, the NVM3 handler would advance the next object address to the following page if the last stored object was fragmented. The handler now properly accounts for fragmented objects, ensuring optimal page utilization. | None | Series 2 and 3 Devices |
| 1488094 | Clock Manager: Fixed incorrect labeling of the RTCCCLK clock source in Clock Manager configuration files. The RTCCCLK source (SL_CLOCK_MANAGER_RTCCCLK_SOURCE) was mislabeled as EM23GRPACLK. This resulted in the Clock Manager UI displaying duplicate EM23GRPACLK branches and prevented users from correctly identifying the RTCC clock source. The configuration files across the SDK have been updated to remove the duplication and restore accurate UI behavior for RTCCCLK source selection. | None | All |
| 1528263 | NVM3: Fixed static analysis warnings in NVM3. Removed unnecessary loop condition during NVM3 data copy on write failure for Series-3. Fixed an issue where, if the first page was invalid, fifofirstObj was not updated to the next valid page, causing getFreeSize() to enter an infinite loop in case of a write failure. | None | Series 3 Devices |
| Common | |||
| 1529446 | linker: Added an assert when code size exceeds the SIXX301 code region to fail builds early. | None | SiMG301 |
| 1412916 | linker: Removed zero-sized .noinit sections to prevent arm-none-eabi-objcopy warnings when the section is empty. | 00325319 | GCC projects with unused .noinit |
| Peripherals | |||
| 1531716 | hal_ldma: Fixed pending interrupt flag and enable handling for sl_hal_ldma_get_enabled_pending_interrupts and sl_hal_ldma_transfer_is_done on SiMG301. | None | SiMG301 |
| 1468177 | hal_timer: Restored compare and top buffer values after re-enabling TIMER channels in sl_hal_timer_channel_init. | None | All |
| 1505880 | uartdrv: Corrected abort transfer callbacks to report transferred items instead of remaining items when DMA transfers are aborted. | 00332923 | Series 2 Devices |
| 1453195 | em_usart: Fixed clock divider calculation in USART_BaudrateSyncSet for synchronous mode. | None | All |
| 1505263, 1505518 | em_iadc: Corrected OFFSETANA1HIACC casting and reference voltage handling in high-precision mode, improving accuracy by up to 5 LSB. | None | Series 2 Devices |
| 1450028 | em_iadc: Added missing iadcPosInputVbat and iadcNegInputVbat inputs for EFR32xG27 devices. | None | EFR32xG27 |
| 1486153 | em_emu: Added WFI after EM4 entry sequence to ensure devices enter EM4 reliably. | None | All |
| 1474641 | hal_eusart: Updated sl_hal_eusart_reset to avoid bus faults if the bus clock is disabled immediately after reset. | None | All |
| 1436872 | em_eusart: EUSART_SpiInit now honors the init.eusartDisable parameter to keep the peripheral disabled when requested. | None | All |
Chip Enablement#
Added in 6.0.1#
None.
Added in 6.0.0#
| Chip Family | OPNs / Boards / OPN Combinations | Supported Software Variants (if applicable) | Supported Modes | Supported Host Interfaces |
|---|---|---|---|---|
| EFR32FG23L |
|
All | All | All |
| EFR32FG2D |
|
All | All | All |
| BGM270S |
|
All | All | All |
| MGM270S |
|
All | All | All |
Application Example Changes#
New Examples | Modified Examples | Removed Examples | Deprecated Examples
New Examples#
None.
Modified Examples#
None.
Removed Examples#
None.
Deprecated Examples#
None.
Known Issues and Limitations#
None.