GPIO_TypeDef Struct ReferenceDevices > GPIO

GPIO Register Declaration

Definition at line 48 of file efm32pg12b_gpio.h .

#include < efm32pg12b_gpio.h >

Data Fields

__IOM uint32_t EM4WUEN
__IOM uint32_t EXTIFALL
__IOM uint32_t EXTILEVEL
__IOM uint32_t EXTIPINSELH
__IOM uint32_t EXTIPINSELL
__IOM uint32_t EXTIPSELH
__IOM uint32_t EXTIPSELL
__IOM uint32_t EXTIRISE
__IOM uint32_t IEN
__IM uint32_t IF
__IOM uint32_t IFC
__IOM uint32_t IFS
__IOM uint32_t INSENSE
__IOM uint32_t LOCK
GPIO_P_TypeDef P [12U]
uint32_t RESERVED0 [112U]
uint32_t RESERVED1 [4U]
uint32_t RESERVED2 [1U]
__IOM uint32_t ROUTELOC0
__IOM uint32_t ROUTELOC1
__IOM uint32_t ROUTEPEN

Field Documentation

__IOM uint32_t GPIO_TypeDef::EM4WUEN

EM4 Wake Up Enable Register

Definition at line 63 of file efm32pg12b_gpio.h .

__IOM uint32_t GPIO_TypeDef::EXTIFALL

External Interrupt Falling Edge Trigger Register

Definition at line 57 of file efm32pg12b_gpio.h .

__IOM uint32_t GPIO_TypeDef::EXTILEVEL

External Interrupt Level Register

Definition at line 58 of file efm32pg12b_gpio.h .

__IOM uint32_t GPIO_TypeDef::EXTIPINSELH

External Interrupt Pin Select High Register

Definition at line 55 of file efm32pg12b_gpio.h .

__IOM uint32_t GPIO_TypeDef::EXTIPINSELL

External Interrupt Pin Select Low Register

Definition at line 54 of file efm32pg12b_gpio.h .

__IOM uint32_t GPIO_TypeDef::EXTIPSELH

External Interrupt Port Select High Register

Definition at line 53 of file efm32pg12b_gpio.h .

__IOM uint32_t GPIO_TypeDef::EXTIPSELL

External Interrupt Port Select Low Register

Definition at line 52 of file efm32pg12b_gpio.h .

__IOM uint32_t GPIO_TypeDef::EXTIRISE

External Interrupt Rising Edge Trigger Register

Definition at line 56 of file efm32pg12b_gpio.h .

__IOM uint32_t GPIO_TypeDef::IEN

Interrupt Enable Register

Definition at line 62 of file efm32pg12b_gpio.h .

__IM uint32_t GPIO_TypeDef::IF

Interrupt Flag Register

Definition at line 59 of file efm32pg12b_gpio.h .

__IOM uint32_t GPIO_TypeDef::IFC

Interrupt Flag Clear Register

Definition at line 61 of file efm32pg12b_gpio.h .

__IOM uint32_t GPIO_TypeDef::IFS

Interrupt Flag Set Register

Definition at line 60 of file efm32pg12b_gpio.h .

__IOM uint32_t GPIO_TypeDef::INSENSE

Input Sense Register

Definition at line 71 of file efm32pg12b_gpio.h .

__IOM uint32_t GPIO_TypeDef::LOCK

Configuration Lock Register

Definition at line 72 of file efm32pg12b_gpio.h .

GPIO_P_TypeDef GPIO_TypeDef::P[12U]

Port configuration bits

Definition at line 49 of file efm32pg12b_gpio.h .

uint32_t GPIO_TypeDef::RESERVED0[112U]

Reserved for future use

Definition at line 51 of file efm32pg12b_gpio.h .

uint32_t GPIO_TypeDef::RESERVED1[4U]

Reserved for future use

Definition at line 65 of file efm32pg12b_gpio.h .

uint32_t GPIO_TypeDef::RESERVED2[1U]

Reserved for future use

Definition at line 70 of file efm32pg12b_gpio.h .

__IOM uint32_t GPIO_TypeDef::ROUTELOC0

I/O Routing Location Register

Definition at line 67 of file efm32pg12b_gpio.h .

__IOM uint32_t GPIO_TypeDef::ROUTELOC1

I/O Routing Location Register 1

Definition at line 68 of file efm32pg12b_gpio.h .

__IOM uint32_t GPIO_TypeDef::ROUTEPEN

I/O Routing Pin Enable Register

Definition at line 66 of file efm32pg12b_gpio.h .

The documentation for this struct was generated from the following file:
  • C:/repos/super_h1/platform/Device/SiliconLabs/EFM32PG12B/Include/ efm32pg12b_gpio.h