syncRx#

bool RAIL_DirectModeConfig_t::syncRx

Enable synchronous RX DOUT using DCLK vs.

asynchronous RX DOUT.

syncTx#

bool RAIL_DirectModeConfig_t::syncTx

Enable synchronous TX DIN using DCLK vs.

asynchronous TX DIN.

doutPort#

uint8_t RAIL_DirectModeConfig_t::doutPort

RX Data output (DOUT) GPIO port.

doutPin#

uint8_t RAIL_DirectModeConfig_t::doutPin

RX Data output (DOUT) GPIO pin.

dclkPort#

uint8_t RAIL_DirectModeConfig_t::dclkPort

Data clock (DCLK) GPIO port.

Only used in synchronous mode

dclkPin#

uint8_t RAIL_DirectModeConfig_t::dclkPin

Data clock (DCLK) GPIO pin.

Only used in synchronous mode

dinPort#

uint8_t RAIL_DirectModeConfig_t::dinPort

TX Data input (DIN) GPIO port.

dinPin#

uint8_t RAIL_DirectModeConfig_t::dinPin

TX Data input (DIN) GPIO pin.

doutLoc#

uint8_t RAIL_DirectModeConfig_t::doutLoc

RX Data output (DOUT) location for doutPort/Pin.

Only needed on EFR32 Series 1; ignored on other platforms.

dclkLoc#

uint8_t RAIL_DirectModeConfig_t::dclkLoc

Data clock (DCLK) location for dclkPort/Pin.

Only needed on EFR32 Series 1; ignored on other platforms.

dinLoc#

uint8_t RAIL_DirectModeConfig_t::dinLoc

TX Data input (DIN) location for tdinPort/Pin.

Only needed on EFR32 Series 1; ignored on other platforms.