Minor Differences between EFR32 Generations#

This section presents a brief collection of generation-specific EFR32 differences that can impact proprietary wireless applications. Specific references for further reading are provided in each section. For more detailed information, see the RAIL API Reference as well as the reference manual and datasheet for your device.

RAIL (Radio) Configuration Compatibility#

RAIL configures the radio on EFR32 devices with a desired PHY using one of two techniques:

  • Load a static radio configuration generated for your project by the Simplicity Studio wireless application workflow.

  • Load a RAIL embedded PHY using one of the protocol-specific APIs.

Static RAIL configurations are compatible across EFR32 families. All device families in a single generation share a common radio, but the static configurations are not compatible across EFR32 generations. In other words, for example, EFR32MG12 and EFR32FG12 share the same radio and therefore the same RAIL radio configuration, but a radio configuration generated for EFR32xG12 is not compatible with an EFR32xG14 device. When using the embedded PHYs, RAIL abstracts away most underlying differences, but in some cases, generation-specific limitations remain, as described in the following sections.

Connect may use the same static configuration files, hence it has the same compatibility limitations. The embedded RAIL configurations are available from Gecko SDK Suite version 3.1 onwards when using Connect.

Note: Static radio configurations are not currently supported on the EFR32xG21 platform. Hence, migrating to EFR32xG21 is only currently viable for applications using the embedded PHYs.

For more information on static radio configurations, see Radio Configuration, and on embedded configuration routines, see Protocol Specific in RAIL.

Power Amplifier (PA)#

Some PAs might not be available on certain parts. For example, devices with limited TX power might not have the high-power PA, or "sub-GHz only" parts won't have 2.4 GHz PAs. Beyond these OPN-specific limitations, PA options differ by EFR32 generation as follows:

  • Sub-GHz PAs are only available on EFR32xG1, xG12, xG13, xG14, and xG23 generations.

  • The EFR32xG1, xG12, xG13, xG14, and xG22 generations have both low-power and high-power 2.4 GHz PAs (the number of power levels per PA varies in xG22 vs xG1x).

  • EFR32xG21 devices have low-power, mid-power, and high-power 2.4GHz PAs.

  • EFR32xG23 devices have either a mid-power (14 dBm) or a high-power (20 dBm) sub-GHz PA, based on the device’s OPN.

  • EFR32xG24 devices have either a mid-power (10 dBm) or a high-power (19.5 dBm) 2.4 GHz PAs, based on the device’s OPN.

  • EFR32xG25 devices have a high-linearity PA dedicated for OFDM modulation, and a high-efficiency PA, both operating only on sub-GHz with a maximum power of 16 dBm.

For more info on EFR32 Power Amplifier (PA) Initialization, see EFR32, on Power Amplifier treatment in RAIL, see Power Amplifier, and on the available PAs, see the device's datasheet.

Antenna Switch#

  • EFR32xG21 has an integrated antenna switch supporting two RF paths.

  • All other EFR32 devices have a single RF path, though external RF switches can be used.

For more information on antenna control in RAIL, see Antenna Control.

RAIL Time Base#

  • The EFR32xG1 time base tick is 2 μs.

  • For all other EFR32 generations, the time base tick is 0.5 μs.

For more information about the EFR32 RAIL timebase, see EFR32, and about system timing in RAIL, see System Timing.

Low-Frequency Timer Dependencies#

RAIL does not use any low-frequency clocks by default, but LF clocks and a PRS channel are required when timer sync is enabled through RAIL_ConfigSleep().

  • EFR32xG1, EFR32xG12: An RTCC compare channel is required for RAIL when timer sync is used. This is channel 0 by default, but it can be customized in the application.

  • All other EFR32 generations: The radio has a dedicated RTC timer for timer sync.

For more information on RAIL usage of EFR32 low-frequency clocks, see EFR32, and on the PRS and RTCC channel customization, see Sleep.

Buffer Handling#

  • Beginning with EFR32xG22, the RX and TX buffers must be word-aligned.

For more information on EFR32 Receive and Transmit FIFO Buffers in RAIL, see EFR32.

IEEE 802.15.4 Options#

  • EFR32xG1 has limited 15.4g/e support compared to newer parts:

    • 4B CRC is not supported.

    • Only whitened packets are supported in 15.4g mode.

    • Enhanced ACKs are not supported.

    • Cannot receive MultiPurpose frame types.

For more information on IEEE 802.15.4 support in RAIL, see IEEE 802.15.4.

Calibrations#

  • EFR32xG1 performs temperature (VCO) calibration when crossing 0oC (with 5oC hysteresis).

For more information on EFR32 radio calibration support, see EFR32, and on radio calibrations in RAIL, see Calibration.

Listen Before Talk (LBT)#

  • EFR32xG1 always averages RSSI during Clear Channel Assessment (CCA).

  • All other parts can select between RSSI averaging and peak measurement.

For more information on the relevant RAIL option, see Transmit in the online RAIL documentation.

DMP Transition Time#

In a Dynamic Multiprotocol (DMP) application, the time required for the radio to switch protocols varies as follows:

  • Series 1 devices use 430 μs transition time by default.

  • Series 2 devices use 510 μs transition time by default except EFR32xG21, which uses 500 μs.

For more information on understanding the protocol switch time, see RAIL Multiprotocol.

Direct Mode#

TX and RX Direct Modes are available for 2-level modulations on most EFR32 Wireless MCU devices, except on EFR32xG21 and EFR32xG22.

  • EFR32xG23 introduces direct to buffer mode.

  • EFR32 Series 1 devices have better sensitivity results in packet mode compared to the direct mode when OOK modulation is used.

Wi-SUN Capabilities#

EFR32xG25 devices are the first EFR32 Wireless MCU devices that support OFDM PHYs defined by the Wi-SUN FAN 1.1 standard, and SUN-OQPSK (also known as MR-OQPSK) defined by IEEE 802.15.4. The transceiver has a software-defined modem running on RISC-V architecture supporting OFDM modulation.

The Wi-SUN FAN 1.0 is supported by EFR32xG25, EFR32xG12, and EFR32xG23 device generations. However, only EFR32FG25 and EFR32MG12 support the Wi-SUN stack provided by Silicon Laboratories.

The radio has a dedicated Power Amplifier module optimized for Wi-SUN OFDM.

Note: Concurrent listening on EFR32xG25 devices for FSK and OFDM signals is supported, but once a signal is detected, only one can be demodulated.

RFFPLL on EFR32xG25#

EFR32xG25 device generation introduces a new clock source module called Radio Frequency Friendly Phase Locked Loop (RFFPLL). RFFPLL generates a roughly 100 MHz clock from the XO frequency which is then used for driving the radio to avoid clock spurs in the RF chain. The actual configuration depends on the radio frequency band and the XO frequency.

RFFPLL settings are controlled via the Device Init: RFFPLL component, and can be set via the CMU_RFFPLLInit() API. RFFPLL must be configured during the initialization and cannot be changed at runtime. When creating a radio PHY, the RFFPLL band selection (RF Frequency Planning field) and the HFXO frequency must match the configuration applied via the platform code. If a PHY is assuming a certain RFFPLL band but the RFFPLL is configured differently, a RAIL assert error will be generated.

Note: RFFPLL can be optionally used as the system clock.