Pseudo-Static Random Access Memory (PSRAM) Architecture#

Pseudo-static random access memory (PSRAM) provides high-speed, low-power external memory for SiWx917 applications that require more capacity than on-chip random access memory (RAM). This section explains:

  • How PSRAM connects to the quad serial peripheral interface (QSPI) controller

  • How the PSRAM driver is organized in the WiSeConnect SDK

High-Level Architecture#

On SiWx917 devices, PSRAM is managed by a dedicated quad serial peripheral interface (QSPI) controller.

The QSPI controller:

  • Interfaces with external PSRAM devices

  • Supports memory-mapped (auto-mode) access for high-speed reads and writes

  • Handles command sequencing, addressing, and timing

Architecture Diagram#

The conceptual relationship between the processor subsystem, QSPI controller, and PSRAM is:

  • Cortex-M4 → QSPI controller → external PSRAM device

PSRAM ArchitecturePSRAM Architecture

WiSeConnect SDK Code Organization#

The PSRAM driver follows the unified application programming interface (API) structure used throughout the SiWx917 platform.

wiseconnect/
├── components/
│   └── device/
│       └── silabs/
│           └── si91x/
│               └── mcu/
│                   └── drivers/
│                       └── unified_api/
│                           ├── inc/
│                           │   └── sl_si91x_psram.h
│                           └── src/
│                               └── sl_si91x_psram.c
├── examples/
│   └── si91x_soc/
│       └── peripheral/
│           ├── psram_blinky
│           └── psram_driver_example

Driver Components#

File

Description

sl_si91x_psram.h

Declares PSRAM APIs, data types, and configuration constants.

sl_si91x_psram.c

Implements initialization, read and write operations, and power-state handling.

Example projects such as psram_blinky and psram_driver_example demonstrate typical usage patterns.

Software Dependencies#

To build and run PSRAM-based applications on SiWx917, ensure the following components are present and properly configured:

Dependency

Description

WiSeConnect SDK

Provides the PSRAM driver, QSPI support, and example projects.

Simplicity Studio IDE

Used to configure, build, and flash SiWx917 applications.

Universal Configurator (UC)

Configures PSRAM timing, clock dividers, and QSPI settings.

Clock configuration

Ensures a stable QSPI clock source and divider for the selected PSRAM speed.

QSPI controller

Hardware block that drives the PSRAM interface.

PSRAM device

External memory device connected to the QSPI pins according to the reference design.

Integration Notes#

  • The network wireless processor (NWP) bootloader initializes the core QSPI infrastructure for PSRAM during system boot.

  • Application-level code uses PSRAM APIs from sl_si91x_psram.h to read and write data.

  • Ensure that QSPI and PSRAM timing parameters follow the PSRAM device datasheet, including frequency, latency, and burst length.

  • If QSPI clock settings or power states change, revalidate PSRAM operation under those conditions.