Inter-IC Sound (I²S) Appendix#

This appendix defines Inter-IC Sound (I²S) terminology, expands acronyms, and provides examples and troubleshooting guidance. Use it as a quick reference when developing audio applications on the SiWx917 system-on-chip (SoC) using the WiSeConnect software development kit (SDK).

Glossary#

The glossary defines key terms, acronyms, and concepts related to I²S audio development. Use it to understand clock signals, error conditions, and peripheral components while building or debugging audio systems.

  • I²S (Inter-IC Sound): Serial bus interface for digital audio communication.

  • BCLK (Bit Clock): Synchronizes the transmission of each data bit.

  • FSYNC / LRCLK (Frame Sync / Left-Right Clock): Indicates the start of a frame and distinguishes left/right channels.

  • MCLK (Primary Clock): High-frequency reference clock for codecs, typically 256× or 512× the sample rate.

  • Primary : Device that generates I²S clock signals.

  • Secondary : Device that follows timing generated by the primary.

  • DMA / UDMA: Transfers audio data between memory and peripherals without CPU involvement.

  • Sample Rate: Number of samples per second (for example, 8 kHz, 16 kHz, 48 kHz).

  • Bit Depth: Number of bits per audio sample (for example, 16-bit, 24-bit, 32-bit).

  • Channel Configuration: Mono, stereo, or multichannel arrangement.

  • Underrun / Overrun: Buffer underflow or overflow caused by processing or timing delays.

  • ULP (Ultra-Low-Power): SiWx917 subsystem for energy-efficient audio.

  • Power Manager: Manages system power states, peripheral enablement, and RAM retention.

  • ADC (Analog-to-Digital Converter): Converts analog audio to digital format.

  • DAC (Digital-to-Analog Converter): Converts digital audio to analog.

  • FIFO (First-In, First-Out): Buffer that outputs audio data in received order.

  • Callback: User-provided function called by the driver on events such as underrun or completion.

  • Simplicity Studio: Silicon Labs IDE for embedded development.

  • Instance: Hardware peripheral instance (for example, HP I²S or ULP I²S).

  • Component: Software module in Simplicity Studio (for example, ULP I²S component).

  • PS1 / PS2 / PS4: SiWx917 power states for low-power and high-performance modes.

  • DEBUGINIT: Function or macro initializing debug I/O for tracing audio activity.

Acronyms#

Acronym

Definition

I²S

Inter-IC Sound

BCLK

Bit Clock

FSYNC / LRCLK

Frame Sync / Left-Right Clock

MCLK

Master Clock / Primary Clock

DMA

Direct Memory Access

UDMA

Universal Direct Memory Access

FIFO

First-In, First-Out

ADC

Analog-to-Digital Converter

DAC

Digital-to-Analog Converter

ULP

Ultra-Low Power

HP

High Power

PS1 / PS2 / PS4

Power States 1, 2, and 4

GPIO

General-Purpose Input/Output

API

Application Programming Interface

SDK

Software Development Kit

SiWx917

Silicon Labs Wi-Fi SoC Family

Si91x

Silicon Labs SoC Family

DEBUGINIT

Debug Initialization Macro/Function

SoC

System on Chip

IDE

Integrated Development Environment

MEMS

Micro-Electro-Mechanical Systems

DSP

Digital Signal Processor

TDM

Time Division Multiplexing

PDM

Pulse Density Modulation

VoIP

Voice over Internet Protocol

IoT

Internet of Things

RTOS

Real-Time Operating System

Extended Examples#

These examples demonstrate I²S functionality on the SiWx917 platform using the WiSeConnect SDK. Use them as reference implementations when developing your own applications.

FAQ#

Q1: What’s the difference between ULP I²S and HP I²S?#

  • ULP I²S: Operates in PS1 and PS2 power states for battery-powered audio applications.

  • HP I²S: Operates in PS4 for high-fidelity, high-throughput audio streaming.

  • Configure both via the WiSeConnect Power Manager component in Simplicity Studio.

Q2: How do I use I²S in low-power modes (PS2/PS1)?#

  • Use the ULP I²S instance for communication in PS2 or PS1.

  • Ensure the ULP I²S component is installed in Simplicity Studio.

  • Configure power states with the Power Manager.

  • Reinitialize after wakeup using sl_si91x_i2s_init().

Q3: What should I do before entering sleep mode?#

  • Stop active audio transfers.

  • Flush DMA buffers if used.

  • Deinitialize the instance using sl_si91x_i2s_deinit().

  • Reinitialize after wakeup to restore I²S configuration.

Q4: How do I recover from I²S audio errors or glitches?#

  • Use the driver reset sequence:

    sl_si91x_i2s_deinit(I2S_INSTANCE);
    sl_si91x_i2s_init(I2S_INSTANCE, &config);
  • Verify clock and data line integrity using a logic analyzer.

  • Handle underrun/overrun events via callbacks.

Q5: What are the common error codes returned by I²S APIs?#

Error Code

Meaning

SL_STATUS_OK

Operation successful

SL_STATUS_FAIL

General failure

SL_STATUS_TIMEOUT

Operation timed out

SL_STATUS_INVALID_PARAMETER

Invalid input

SL_STATUS_BUSY

Peripheral busy

Q6: How can I debug I²S audio communication issues?#

  • Use a logic analyzer to observe BCLK, FSYNC, and SDIN/SDOUT.

  • Check timing alignment and verify left/right channel separation.

  • Confirm DMA configuration and FIFO thresholds.

  • In Simplicity Studio, use:

    • Peripheral configuration views for I²S pin and clock setup.

    • Power analysis tools to verify domain availability.

    • RTOS-aware debugging for task-level traceability.

Q7: What sample rates and bit depths are supported?#

  • Sample Rates: 8 kHz, 16 kHz, 22.05 kHz, 44.1 kHz, 48 kHz, 96 kHz, 192 kHz.

  • Bit Depths: 16-bit, 24-bit, 32-bit.

  • Channel Configurations: Mono, Stereo, Multi-channel.

Q8: How do I choose the right buffer size for audio applications?#

  • Real-time audio: 64–256 samples (low latency).

  • Streaming: 512–2048 samples (efficiency).

  • Battery-powered: 1024+ samples (minimized wakeups). Balance latency, CPU load, and power usage based on your application.

Q9: What causes audio underruns and overruns?#

  • Underruns: Caused by small buffers or insufficient CPU time.

  • Overruns: Caused by delayed data reads or processing latency.

  • Solutions: Increase buffer size, optimize interrupt handling, use DMA transfers, and tune FIFO thresholds.