ULP_PAD_CONFIG_REG0#

__IOM uint32_t ULP_PAD_CONFIG_Type0::ULP_PAD_CONFIG_REG0

PADCONFIG_E1_E2_1#

__IOM uint32_t ULP_PAD_CONFIG_Type0::PADCONFIG_E1_E2_1

[1..0] Drive strength selector for ULP_GPIO_0 - ULP_GPIO_3

PADCONFIG_POS_1#

__IOM uint32_t ULP_PAD_CONFIG_Type0::PADCONFIG_POS_1

[2..2] Power on start enable for ULP_GPIO_0 - ULP_GPIO_3

PADCONFIG_SMT_1#

__IOM uint32_t ULP_PAD_CONFIG_Type0::PADCONFIG_SMT_1

[3..3] Active high schmitt trigger for ULP_GPIO_0 - ULP_GPIO_3

RESERVED#

__IOM uint32_t ULP_PAD_CONFIG_Type0::RESERVED

[4..4] Reserved

PADCONFIG_SR_1#

__IOM uint32_t ULP_PAD_CONFIG_Type0::PADCONFIG_SR_1

[5..5] Slew rate control for ULP_GPIO_0 - ULP_GPIO_3

PADCONFIG_P1_P2_1#

__IOM uint32_t ULP_PAD_CONFIG_Type0::PADCONFIG_P1_P2_1

[7..6] Driver disabled state control for ULP_GPIO_0 - ULP_GPIO_3

PADCONFIG_E1_E2_2#

__IOM uint32_t ULP_PAD_CONFIG_Type0::PADCONFIG_E1_E2_2

[9..8] Drive strength selector for ULP_GPIO_4 - ULP_GPIO_7

PADCONFIG_POS_2#

__IOM uint32_t ULP_PAD_CONFIG_Type0::PADCONFIG_POS_2

[10..10] Power on start enable for ULP_GPIO_4 - ULP_GPIO_7

PADCONFIG_SMT_2#

__IOM uint32_t ULP_PAD_CONFIG_Type0::PADCONFIG_SMT_2

[11..11] Active high schmitt trigger for ULP_GPIO_4 - ULP_GPIO_7

RESERVED1#

__IOM uint32_t ULP_PAD_CONFIG_Type0::RESERVED1

[12..12] Reserved1

PADCONFIG_SR_2#

__IOM uint32_t ULP_PAD_CONFIG_Type0::PADCONFIG_SR_2

[13..13] Slew rate control for ULP_GPIO_4 - ULP_GPIO_7

PADCONFIG_P1_P2_2#

__IOM uint32_t ULP_PAD_CONFIG_Type0::PADCONFIG_P1_P2_2

[15..14] Driver disabled state control for ULP_GPIO_4 - ULP_GPIO_7

RESERVED2#

__IOM uint32_t ULP_PAD_CONFIG_Type0::RESERVED2

[31..16] Reserved2

ULP_GPIO_PAD_CONFIG_REG_0#

struct ULP_PAD_CONFIG_Type0::@6::@8 ULP_PAD_CONFIG_Type0::ULP_GPIO_PAD_CONFIG_REG_0

@7#

union ULP_PAD_CONFIG_Type0::@6 ULP_PAD_CONFIG_Type0::@7