Power Manager Architecture#
Service Overview#
The Silicon Labs SiWx917 platform includes a comprehensive Power Manager Service. This service supports requirement-based power-state management, multiple power domains, and advanced features for optimizing energy consumption. Developers can rely on the Power Manager to simplify system-level power handling while maximizing performance and efficiency.
Key Features#
Requirement-based power management: Automatically transitions between power states based on component requirements, reducing manual intervention.
Multiple power states: Provides a hierarchy of states (PS4, PS3, PS2, PS1, Sleep, Standby) with different power consumption profiles.
FreeRTOS Tickless Idle integration: Works seamlessly with FreeRTOS to automatically enter sleep during idle periods.
Configurable wake-up sources: Supports triggers such as General-Purpose Input/Output (GPIO), Deep Sleep Timer, Calendar, and wireless events.
Peripheral power domain management: Controls High-Power (HP), Ultra-Low-Power (ULP), and Ultra-Ultra-Low-Power (UULP) domains.
RAM retention control: Provides flexible configuration of RAM banks to save power during sleep modes.
Power-state transition callbacks: Enables event-driven callbacks for peripheral reconfiguration during state transitions.
Clock scaling: Dynamically adjusts frequency between PowerSave and Performance modes.
PS2 ultra-low-power mode: Disables Flash and executes from RAM for extreme power savings.
Wireless integration: Coordinates with wireless subsystems for optimal overall power consumption.
Power Manager Software Architecture#
The Power Manager is a platform-level service that manages M4 processor power states and transitions. Applications and software modules (including drivers, protocol stacks, and application code) request these transitions. The Power Manager ensures smooth transitions and validation.
Architecture Overview#


Application Tasks: Call Power Manager service APIs.
Power Manager Service: Provides a user-friendly interface over internal core APIs for managing power states.
Middle Layer: Validates requested power state transitions.
Hardware Abstraction Layer (HAL): Interacts directly with hardware to perform register-level configurations.
Supported Power States#
The Power Manager Service supports several power states, each with unique performance and power consumption characteristics:
State | Feature Overview | PowerSave Frequency | Performance Frequency |
|---|---|---|---|
PS4 | All peripherals enabled. Supports highest clock. | 100 MHz | 180 MHz |
PS3 | All peripherals enabled. Supports high clock. | 40 MHz | 80 MHz |
PS2 | ULP and UULP peripherals only. Flash disabled. Executes from RAM. | 20 MHz | 20 MHz |
PS4 Sleep | Minimal power consumption sleep state. | 32 KHz | 32 KHz |
PS3 Sleep | Minimal power consumption sleep state. | 32 KHz | 32 KHz |
PS2 Sleep | Minimal power consumption sleep state. | 32 KHz | 32 KHz |
PS1 | ULP peripherals only. | 32 KHz | 32 KHz |
PS0 | Deep sleep without RAM retention. | 32 KHz | 32 KHz |
PS4 Standby | Standby mode. Higher baseline power than sleep. | 100 MHz | 180 MHz |
PS3 Standby | Standby mode. Higher baseline power than sleep. | 40 MHz | 80 MHz |
PS2 Standby | Standby mode. Higher baseline power than sleep. | 20 MHz | 20 MHz |
Note: Only PS3 and PS4 support both Performance and PowerSave clock scaling modes. All other states operate at fixed frequencies.
Directory Structure in WiSeConnect SDK#
The Power Manager Service is organized in the WiSeConnect SDK with clear separation of service files, configurations, examples, and components. This structure improves maintainability and accelerates developer onboarding.
wiseconnect/
├── components/
│ └── device/
│ └── silabs/
│ └── si91x/
│ └── mcu/
│ └── drivers/
│ └── service/
│ └── power_manager/
│ ├── inc/ # Core headers
│ │ ├── sl_si91x_power_manager.h # Main API header
│ │ ├── sli_si91x_power_manager.h # Internal API header
│ │ ├── sli_si91x_power_manager_board_config.h # Board configuration
│ │ └── sl_si91x_power_manager_debug.h # Debug utilities
│ ├── src/ # Core implementation
│ │ ├── sl_si91x_power_manager.c # Main implementation
│ │ ├── sli_si91x_power_manager.c # Internal implementation
│ │ ├── sli_si91x_power_manager_wakeup_init.c # Wake-up initialization
│ │ └── sl_si91x_power_manager_debug.c # Debug functions
│ ├── config/ # Configuration files
│ │ ├── sl_si91x_power_manager_config_1.h # Basic configuration
│ │ ├── sl_si91x_power_manager_config_2.h # Memory configuration 2
│ │ ├── sl_si91x_power_manager_config_3.h # Memory configuration 3
│ │ ├── sl_si91x_power_manager_advance_config_1.h # Advanced configuration
│ │ ├── sl_si91x_power_manager_advance_config_2.h # Advanced configuration 2
│ │ ├── sl_si91x_power_manager_advance_config_3.h # Advanced configuration 3
│ │ ├── sl_si91x_power_manager_wakeup_source_config.h # Wake-up sources
│ │ └── sl_si91x_power_manager_debug_config.h # Debug config
│ ├── init/ # Templates
│ │ ├── sl_si91x_power_manager_init.h.jinja # Initialization template
│ │ ├── sl_si91x_power_manager_handler.c.jinja # Handler template
│ │ ├── sl_si91x_power_manager_wakeup_handler.h.jinja # Wake-up header
│ │ └── sl_si91x_power_manager_wakeup_handler.c.jinja # Wake-up handler
│ ├── component/ # Component definitions
│ │ ├── sl_power_manager.slcc # Main PM component
│ │ ├── power_manager_config.slcc # Basic configuration
│ │ ├── power_manager_advance_config.slcc # Advanced configuration
│ │ ├── wakeup_source_config.slcc # Wake-up configuration
│ │ ├── sl_power_manager_debug.slcc # Debug component
│ │ ├── user_files.slcc # User files component
│ │ ├── sdc_component.slcc # Sleep Duration Calculator
│ │ ├── gpio_npss_component.slcc # NPSS GPIO component
│ │ └── ... # ULP peripherals
├── examples/
│ ├── si91x_soc/
│ │ └── service/
│ │ └── sl_si91x_power_manager_tickless_idle/ # Tickless idle example
│ │ ├── power_manager_tickless_idle_example.c # Implementation
│ │ ├── power_manager_tickless_idle_example.h # Header
│ │ ├── sl_si91x_power_manager_tickless_idle.slcp # Project file
│ │ └── resources/ # Integration guides
│ └── _internal/ # Internal examples
│ ├── wireless_deepsleep_with_power_manager/ # Wireless deep sleep
│ └── Si91x_FreeRTOS_Tickless_Mode/ # FreeRTOS tickless tests
│ └── Stress_Test/
│ └── power_manager_tickless_idle_test/
└── components/
├── freertos/ # FreeRTOS integration
│ ├── kernel/
│ │ └── portable/
│ │ └── SiliconLabs/
│ │ └── tick_power_manager.c # FreeRTOS PM integration
│ └── component/
│ └── freertos_kernel.slcc # FreeRTOS componentCore Components#
The Power Manager includes several modular components that provide flexibility in configuration and extension.
Power Manager Core Component#
Power Manager: Initializes the service to manage MCU power usage. The system starts in PS3 power-save mode. Developers can register callbacks that run during power state transitions.
Power Manager Configuration: Configures peripheral enable/disable states and RAM retention. Developers can define RAM settings by size or by bank.
Power Manager Advanced Configuration: Provides more granular control than the standard configuration. By default, most peripherals and RAM banks are disabled for maximum efficiency.
Wake-up Source Configuration Component#
Enables and configures wake-up sources such as GPIO, Deep Sleep Timer, RTC, alarm, and wireless events. Developers can select which sources are active to meet system requirements.
Ultra-Low-Power (ULP) Peripheral Components#
ULP peripheral drivers remain operational in PS1 and PS2 states while the M4 processor is in low power. When the PS2 component is enabled, required peripheral code runs from RAM while Flash is powered down.
Examples include:
ULP Brownout Detector (BOD)
ULP Comparator
ULP Digital-to-Analog Converter (DAC)
ULP Direct Memory Access (DMA)
ULP Debug
ULP GPIO
ULP Inter-Integrated Circuit (I2C)
ULP Integrated Interchip Sound (I2S)
ULP Synchronous Serial Interface (SSI)
ULP SysRTC
ULP Timer
ULP Universal Asynchronous Receiver-Transmitter (UART)
Ultra-Ultra-Low-Power (UULP) Wake-up Sources Component#
UULP drivers remain operational in all power states to ensure the system can wake from the lowest modes.
Supported wake-up sources:
Deep Sleep Timer:
SL_SI91X_POWER_MANAGER_DST_WAKEUPWireless:
SL_SI91X_POWER_MANAGER_WIRELESS_WAKEUPGPIO:
SL_SI91X_POWER_MANAGER_GPIO_WAKEUPAlarm:
SL_SI91X_POWER_MANAGER_ALARM_WAKEUPRTC:
SL_SI91X_POWER_MANAGER_SYSRTC_WAKEUP
Additional Components#
PS2 Component: Adds M4 power-save code to RAM for PS2 operation, ensuring safe entry and exit when Flash is disabled.
Macros:
SLI_SI91X_MCU_ENABLE_RAM_BASED_EXECUTION: Enables execute-from-RAM paths to minimize Flash use in low-power modes.SL_SI91X_ULP_STATE_ENABLE: Enables PS1/UULP features and associated drivers at build time.
Clock-Scaling Modes#
Each power state supports two clock-scaling modes:
SL_SI91X_POWER_MANAGER_POWERSAVE: Minimum frequency for maximum savings.SL_SI91X_POWER_MANAGER_PERFORMANCE: Maximum frequency for highest performance.
Dependencies#
The Power Manager requires specific tools and components. Proper configuration ensures reliable transitions and smooth integration.
System Requirements#
WiSeConnect SDK: Must be installed and configured in Simplicity Studio.
Simplicity Studio configuration: Project (.slcp file) must include Power Manager components.
Universal Configurator (UC): Used to set parameters such as power states, RAM retention, and wake-up sources.
Clock source and divider settings: Managed through the MCU clock architecture.
Power state management: Availability of peripherals depends on the selected state (PS1, PS2, PS3, PS4).
Wake-up source configuration: GPIO, Deep Sleep Timer, Calendar, and wireless sources must be initialized using the correct APIs.
RAM retention settings: Configure ULP memory regions to balance savings and performance.
Required Components#
Power Manager Component: Core service (
sl_power_manager.slcc)Power Manager Configuration: Basic (
power_manager_config.slcc) or advanced (power_manager_advance_config.slcc)FreeRTOS Kernel: Required for Tickless Idle (
freertos_kernel.slcc)Wake-up Source Configuration: Provides sleep mode functionality (
wakeup_source_config.slcc)ULP Peripheral Components: Required for PS2 operation.
PS2 Component: Enables ultra-low-power state with flash disabled.