Simulated EEPROM 2#

Note

  • Simulated EEPROM 2 is only available for use in the NCP.

  • Simulated EEPROM and Simulated EEPROM 2 functions cannot be intermixed; SimEE and SimEE2 are mutually exclusive. The functions in Simulated EEPROM cannot be used with SimEE2 and the functons in Simulated EEPROM 2 cannot be used with SimEE.

The Simulated EEPROM 2 system (typically referred to as SimEE2) is designed to operate under the Token Access API and provide a non-volatile storage system. Since the flash write cycles are finite, the SimEE2's primary purpose is to perform wear leveling across several hardware flash pages, ultimately increasing the number of times tokens may be written before a hardware failure.

Compiling the application with the define USE_SIMEE2 will switch the application from using the original SimEE to SimEE2.

Note

  • Only the NCP is capable of upgrading it's existing SimEE data to SimEE2. It's not possible to downgrade from SimEE2.

The Simulated EEPROM 2 needs to periodically perform a page erase operation to reclaim storage area for future token writes. The page erase operation requires an ATOMIC block of 21ms. Since this is such a long time to not be able to service any interrupts, the page erase operation is under application control providing the application the opportunity to decide when to perform the operation and complete any special handling that might be needed.

Note

  • The best, safest, and recommended practice is for the application to regularly and always call the function halSimEepromErasePage() when the application can expect and deal with the page erase delay. halSimEepromErasePage() will immediately return if there is nothing to erase. If there is something that needs to be erased, doing so as regularly and as soon as possible will keep the SimEE2 in the healthiest state possible.

SimEE2 differs from the original SimEE in terms of size and speed. SimEE2 holds more data but at the expense of consuming more overall flash to support a new wear levelling technique. SimEE2's worst case execution time under normal behavior is faster and finite, but the average execution time is longer.

See hal/plugin/sim-eeprom/sim-eeprom-cortexm3.h for source code.