ADC initialization structure, common for single conversion and scan sequence.

Public Attributes#

Oversampling rate select.

Lowpass or decoupling capacitor filter.

uint8_t

Timebase for ADC warm up.

uint8_t

Clock division factor N, ADC clock = (HFPERCLK or HFPERCCLK) / (N + 1).

bool

Enable/disable conversion tailgating.

Public Attribute Documentation#

ovsRateSel#

ADC_OvsRateSel_TypeDef ADC_Init_TypeDef::ovsRateSel

Oversampling rate select.

To have any effect, oversampling must be enabled for single/scan mode.


lpfMode#

ADC_LPFilter_TypeDef ADC_Init_TypeDef::lpfMode

Lowpass or decoupling capacitor filter.


warmUpMode#

ADC_Warmup_TypeDef ADC_Init_TypeDef::warmUpMode

ADC Warm-up mode.


timebase#

uint8_t ADC_Init_TypeDef::timebase

Timebase for ADC warm up.

Select N to give (N+1) HFPERCLK / HFPERCCLK cycles. (Additional delay is added for bandgap references. See the reference manual for more information.) Normally, N should be selected so that the timebase is at least 1 us. See ADC_TimebaseCalc() to obtain a suggested timebase of, at least, 1 us.


prescale#

uint8_t ADC_Init_TypeDef::prescale

Clock division factor N, ADC clock = (HFPERCLK or HFPERCCLK) / (N + 1).


tailgate#

bool ADC_Init_TypeDef::tailgate

Enable/disable conversion tailgating.