LDMA - Linked DMA#

Linked Direct Memory Access (LDMA) Peripheral API.

LDMA API functions provide full support for the LDMA peripheral.

LDMA supports these DMA transfer types:

  • Memory to memory.

  • Memory to peripheral.

  • Peripheral to memory.

  • Peripheral to peripheral.

  • Constant value to memory.

LDMA supports linked lists of DMA descriptors allowing:

  • Circular and ping-pong buffer transfers.

  • Scatter-gather transfers.

  • Looped transfers.

LDMA has some advanced features:

  • Intra-channel synchronization (SYNC), allowing hardware events to pause and restart a DMA sequence.

  • Immediate-write (WRI), allowing DMA to write a constant anywhere in the memory map.

  • Complex flow control allowing if-else constructs.

Basic understanding of LDMA controller is assumed. Please refer to the reference manual for further details. The LDMA examples described in the reference manual are particularly helpful in understanding LDMA operations.

In order to use the DMA controller, the initialization function LDMA_Init() must have been executed once (normally during system initialization).

DMA transfers are initiated by a call to LDMA_StartTransfer(), transfer properties are controlled by the contents of LDMA_TransferCfg_t and LDMA_Descriptor_t structure parameters. The LDMA_Descriptor_t structure parameter may be a pointer to an array of descriptors, descriptors in array should be linked together as needed.

Transfer and descriptor initialization macros are provided for the most common transfer types. Due to the flexibility of LDMA peripheral, only a small subset of all possible initializer macros are provided, users should create new ones when needed.

Examples of LDMA usage:

A simple memory to memory transfer:

/* A single transfer of 4 half words. */
static const LDMA_TransferCfg_t transferCfg = LDMA_TRANSFER_CFG_MEMORY();
static const LDMA_Descriptor_t desc = LDMA_DESCRIPTOR_SINGLE_M2M_HALF(src, dst, 4);

void ldmaTransfer(void)
{
  /* Initialize the LDMA with default values. */
  LDMA_Init_t init = LDMA_INIT_DEFAULT;
  LDMA_Init(&init);

  /* Start the memory transfer */
  LDMA_StartTransfer(0, &transferCfg, &desc);
}

A linked list of three memory to memory transfers:

/* A transfer consisting of 3 descriptors linked together and each descriptor
 * transfers 4 words from the source to the destination. */
static const LDMA_TransferCfg_t transferCfg1 = LDMA_TRANSFER_CFG_MEMORY();
static const LDMA_Descriptor_t descList[] =
{
  LDMA_DESCRIPTOR_LINKREL_M2M_WORD(src, dst, 4, 1),
  LDMA_DESCRIPTOR_LINKREL_M2M_WORD(src + 4, dst + 4, 4, 1),
  LDMA_DESCRIPTOR_SINGLE_M2M_WORD(src + 8, dst + 8, 4)
};

void ldmaLinkedTransfer(void)
{
  /* Initialize the LDMA with default values. */
  LDMA_Init_t init = LDMA_INIT_DEFAULT;
  LDMA_Init(&init);

  /* Start the linked memory transfer */
  LDMA_StartTransfer(0, &transferCfg1, &descList[0]);
}

DMA from serial port peripheral to memory:

#if !defined(USART1) && defined(USART0)
/* The LDMA transfer should be triggered by the USART0 RX data available signal. */
static const LDMA_TransferCfg_t usart0RxTransfer =
  LDMA_TRANSFER_CFG_PERIPHERAL(ldmaPeripheralSignal_USART0_RXDATAV);

/* Transfer 4 bytes from the USART0 RX FIFO to memory. */
static const LDMA_Descriptor_t usart0RxDesc =
  LDMA_DESCRIPTOR_SINGLE_P2M_BYTE(&USART0->RXDATA,  // Peripheral address
                                  dst,              // Destination (SRAM)
                                  4);               // Number of byte transfers

void ldmaPeripheralTransfer(void)
{
  /* Initialize the LDMA with default values. */
  LDMA_Init_t init = LDMA_INIT_DEFAULT;
  LDMA_Init(&init);

  /* Start the peripheral transfer which is triggered by the USART0
   * peripheral RXDATAV signal. */
  LDMA_StartTransfer(0, &usart0RxTransfer, &usart0RxDesc);
}
#elif defined(USART1)
/* The LDMA transfer should be triggered by the USART1 RX data available signal. */
static const LDMA_TransferCfg_t usart1RxTransfer =
  LDMA_TRANSFER_CFG_PERIPHERAL(ldmaPeripheralSignal_USART1_RXDATAV);

/* Transfer 4 bytes from the USART1 RX FIFO to memory. */
static const LDMA_Descriptor_t usart1RxDesc =
  LDMA_DESCRIPTOR_SINGLE_P2M_BYTE(&USART1->RXDATA,  // Peripheral address
                                  dst,              // Destination (SRAM)
                                  4);               // Number of byte transfers

void ldmaPeripheralTransfer(void)
{
  /* Initialize the LDMA with default values. */
  LDMA_Init_t init = LDMA_INIT_DEFAULT;
  LDMA_Init(&init);

  /* Start the peripheral transfer which is triggered by the USART1
   * peripheral RXDATAV signal. */
  LDMA_StartTransfer(0, &usart1RxTransfer, &usart1RxDesc);
}
#elif defined(EUSART0)
/* The LDMA transfer should be triggered by the EUSART0 RX data available signal. */
static const LDMA_TransferCfg_t eusart0RxTransfer =
  LDMA_TRANSFER_CFG_PERIPHERAL(ldmaPeripheralSignal_EUSART0_RXFL);

/* Transfer 4 bytes from the EUSART0 RX FIFO to memory. */
static const LDMA_Descriptor_t eusart0RxDesc =
  LDMA_DESCRIPTOR_SINGLE_P2M_BYTE(&EUSART0->RXDATA,  // Peripheral address
                                  dst,               // Destination (SRAM)
                                  4);                // Number of byte transfers

void ldmaPeripheralTransfer(void)
{
  /* Initialize the LDMA with default values. */
  LDMA_Init_t init = LDMA_INIT_DEFAULT;
  LDMA_Init(&init);

  /* Start the peripheral transfer which is triggered by the EUSART0
   * peripheral RXFL signal. */
  LDMA_StartTransfer(0, &eusart0RxTransfer, &eusart0RxDesc);
}

#endif

Ping-pong DMA from serial port peripheral to memory:

#if !defined(USART1) && defined(USART0)
/* Two buffers used in the ping-pong transfer from USART0. */
static volatile uint8_t buffer0[5];
static volatile uint8_t buffer1[5];

/* The LDMA transfer should be triggered by the USART0 RX data available signal. */
static const LDMA_TransferCfg_t usart0Transfer =
  LDMA_TRANSFER_CFG_PERIPHERAL(ldmaPeripheralSignal_USART0_RXDATAV);

/* Both descriptors transfer 5 bytes from the USART0 rx data register into
 * one of the buffers. Note that the first descriptor uses a relative address
 * of 1 to link to the next descriptor, while the last descriptor uses a
 * relative address of -1 to link to the first descriptor. */
static const LDMA_Descriptor_t rxLoop[] =
{
  LDMA_DESCRIPTOR_LINKREL_P2M_BYTE(&USART0->RXDATA, buffer0, 5, 1),
  LDMA_DESCRIPTOR_LINKREL_P2M_BYTE(&USART0->RXDATA, buffer1, 5, -1)
};

void ldmaPingPongTransfer(void)
{
  /* Initialize the LDMA with default values. */
  LDMA_Init_t init = LDMA_INIT_DEFAULT;
  LDMA_Init(&init);

  /* Start the peripheral transfer which is triggered by the USART0
   * peripheral RXDATAV signal. */
  LDMA_StartTransfer(0, &usart0Transfer, &rxLoop[0]);
}
#elif defined(USART1)
/* Two buffers used in the ping-pong transfer from USART1. */
static volatile uint8_t buffer0[5];
static volatile uint8_t buffer1[5];

/* The LDMA transfer should be triggered by the USART1 RX data available signal. */
static const LDMA_TransferCfg_t usart1Transfer =
  LDMA_TRANSFER_CFG_PERIPHERAL(ldmaPeripheralSignal_USART1_RXDATAV);

/* Both descriptors transfer 5 bytes from the USART1 rx data register into
 * one of the buffers. Note that the first descriptor uses a relative address
 * of 1 to link to the next descriptor, while the last descriptor uses a
 * relative address of -1 to link to the first descriptor. */
static const LDMA_Descriptor_t rxLoop[] =
{
  LDMA_DESCRIPTOR_LINKREL_P2M_BYTE(&USART1->RXDATA, buffer0, 5, 1),
  LDMA_DESCRIPTOR_LINKREL_P2M_BYTE(&USART1->RXDATA, buffer1, 5, -1)
};

void ldmaPingPongTransfer(void)
{
  /* Initialize the LDMA with default values. */
  LDMA_Init_t init = LDMA_INIT_DEFAULT;
  LDMA_Init(&init);

  /* Start the peripheral transfer which is triggered by the USART1
   * peripheral RXDATAV signal. */
  LDMA_StartTransfer(0, &usart1Transfer, &rxLoop[0]);
}
#elif defined(EUSART0)
/* Two buffers used in the ping-pong transfer from EUSART0. */
static volatile uint8_t buffer0[5];
static volatile uint8_t buffer1[5];

/* The LDMA transfer should be triggered by the EUSART0 RX data available signal. */
static const LDMA_TransferCfg_t eusart0Transfer =
  LDMA_TRANSFER_CFG_PERIPHERAL(ldmaPeripheralSignal_EUSART0_RXFL);

/* Both descriptors transfer 5 bytes from the EUSART0 rx data register into
 * one of the buffers. Note that the first descriptor uses a relative address
 * of 1 to link to the next descriptor, while the last descriptor uses a
 * relative address of -1 to link to the first descriptor. */
static const LDMA_Descriptor_t rxLoop[] =
{
  LDMA_DESCRIPTOR_LINKREL_P2M_BYTE(&EUSART0->RXDATA, buffer0, 5, 1),
  LDMA_DESCRIPTOR_LINKREL_P2M_BYTE(&EUSART0->RXDATA, buffer1, 5, -1)
};

void ldmaPingPongTransfer(void)
{
  /* Initialize the LDMA with default values. */
  LDMA_Init_t init = LDMA_INIT_DEFAULT;
  LDMA_Init(&init);

  /* Start the peripheral transfer which is triggered by the EUSART0
   * peripheral RXFL signal. */
  LDMA_StartTransfer(0, &eusart0Transfer, &rxLoop[0]);
}
#endif

Note

  • LDMA module does not implement LDMA interrupt handler. A template for an LDMA IRQ handler is included here as an example.

/* Template for an LDMA IRQ handler. */
void LDMA_IRQHandler(void)
{
  uint32_t ch;
  /* Get all pending and enabled interrupts. */
  uint32_t pending = LDMA_IntGetEnabled();

  /* Loop here on an LDMA error to enable debugging. */
  while (pending & LDMA_IF_ERROR) {
  }

  /* Iterate over all LDMA channels. */
  for (ch = 0; ch < DMA_CHAN_COUNT; ch++) {
    uint32_t mask = 0x1 << ch;
    if (pending & mask) {
      /* Clear interrupt flag. */

#if defined (LDMA_HAS_SET_CLEAR)
      LDMA->IF_CLR = mask;
#else
      LDMA->IFC = mask;
#endif

      /* Do more stuff here, execute callbacks etc. */
    }
  }
}

Modules#

LDMA_Descriptor_t

LDMA_Init_t

LDMA_TransferCfg_t

Enumerations#

enum
LDMA_CtrlBlockSize_t {
ldmaCtrlBlockSizeUnit1 = _LDMA_CH_CTRL_BLOCKSIZE_UNIT1
ldmaCtrlBlockSizeUnit2 = _LDMA_CH_CTRL_BLOCKSIZE_UNIT2
ldmaCtrlBlockSizeUnit3 = _LDMA_CH_CTRL_BLOCKSIZE_UNIT3
ldmaCtrlBlockSizeUnit4 = _LDMA_CH_CTRL_BLOCKSIZE_UNIT4
ldmaCtrlBlockSizeUnit6 = _LDMA_CH_CTRL_BLOCKSIZE_UNIT6
ldmaCtrlBlockSizeUnit8 = _LDMA_CH_CTRL_BLOCKSIZE_UNIT8
ldmaCtrlBlockSizeUnit16 = _LDMA_CH_CTRL_BLOCKSIZE_UNIT16
ldmaCtrlBlockSizeUnit32 = _LDMA_CH_CTRL_BLOCKSIZE_UNIT32
ldmaCtrlBlockSizeUnit64 = _LDMA_CH_CTRL_BLOCKSIZE_UNIT64
ldmaCtrlBlockSizeUnit128 = _LDMA_CH_CTRL_BLOCKSIZE_UNIT128
ldmaCtrlBlockSizeUnit256 = _LDMA_CH_CTRL_BLOCKSIZE_UNIT256
ldmaCtrlBlockSizeUnit512 = _LDMA_CH_CTRL_BLOCKSIZE_UNIT512
ldmaCtrlBlockSizeUnit1024 = _LDMA_CH_CTRL_BLOCKSIZE_UNIT1024
ldmaCtrlBlockSizeAll = _LDMA_CH_CTRL_BLOCKSIZE_ALL
}

Controls the number of unit data transfers per arbitration cycle, providing a means to balance DMA channels' load on the controller.

enum
LDMA_CtrlStructType_t {
ldmaCtrlStructTypeXfer = _LDMA_CH_CTRL_STRUCTTYPE_TRANSFER
ldmaCtrlStructTypeSync = _LDMA_CH_CTRL_STRUCTTYPE_SYNCHRONIZE
ldmaCtrlStructTypeWrite = _LDMA_CH_CTRL_STRUCTTYPE_WRITE
}

DMA structure type.

enum
LDMA_CtrlReqMode_t {
ldmaCtrlReqModeBlock = _LDMA_CH_CTRL_REQMODE_BLOCK
ldmaCtrlReqModeAll = _LDMA_CH_CTRL_REQMODE_ALL
}

DMA transfer block or cycle selector.

enum
LDMA_CtrlSrcInc_t {
ldmaCtrlSrcIncOne = _LDMA_CH_CTRL_SRCINC_ONE
ldmaCtrlSrcIncTwo = _LDMA_CH_CTRL_SRCINC_TWO
ldmaCtrlSrcIncFour = _LDMA_CH_CTRL_SRCINC_FOUR
ldmaCtrlSrcIncNone = _LDMA_CH_CTRL_SRCINC_NONE
}

Source address increment unit size.

enum
LDMA_CtrlSize_t {
ldmaCtrlSizeByte = _LDMA_CH_CTRL_SIZE_BYTE
ldmaCtrlSizeHalf = _LDMA_CH_CTRL_SIZE_HALFWORD
ldmaCtrlSizeWord = _LDMA_CH_CTRL_SIZE_WORD
}

DMA transfer unit size.

enum
LDMA_CtrlDstInc_t {
ldmaCtrlDstIncOne = _LDMA_CH_CTRL_DSTINC_ONE
ldmaCtrlDstIncTwo = _LDMA_CH_CTRL_DSTINC_TWO
ldmaCtrlDstIncFour = _LDMA_CH_CTRL_DSTINC_FOUR
ldmaCtrlDstIncNone = _LDMA_CH_CTRL_DSTINC_NONE
}

Destination address increment unit size.

enum
LDMA_CtrlSrcAddrMode_t {
ldmaCtrlSrcAddrModeAbs = _LDMA_CH_CTRL_SRCMODE_ABSOLUTE
ldmaCtrlSrcAddrModeRel = _LDMA_CH_CTRL_SRCMODE_RELATIVE
}

Source addressing mode.

enum
LDMA_CtrlDstAddrMode_t {
ldmaCtrlDstAddrModeAbs = _LDMA_CH_CTRL_DSTMODE_ABSOLUTE
ldmaCtrlDstAddrModeRel = _LDMA_CH_CTRL_DSTMODE_RELATIVE
}

Destination addressing mode.

enum
LDMA_LinkMode_t {
ldmaLinkModeAbs = _LDMA_CH_LINK_LINKMODE_ABSOLUTE
ldmaLinkModeRel = _LDMA_CH_LINK_LINKMODE_RELATIVE
}

DMA link load address mode.

enum
LDMA_CfgArbSlots_t {
ldmaCfgArbSlotsAs1 = _LDMA_CH_CFG_ARBSLOTS_ONE
ldmaCfgArbSlotsAs2 = _LDMA_CH_CFG_ARBSLOTS_TWO
ldmaCfgArbSlotsAs4 = _LDMA_CH_CFG_ARBSLOTS_FOUR
ldmaCfgArbSlotsAs8 = _LDMA_CH_CFG_ARBSLOTS_EIGHT
}

Insert extra arbitration slots to increase channel arbitration priority.

enum
LDMA_CfgSrcIncSign_t {
ldmaCfgSrcIncSignPos = _LDMA_CH_CFG_SRCINCSIGN_POSITIVE
ldmaCfgSrcIncSignNeg = _LDMA_CH_CFG_SRCINCSIGN_NEGATIVE
}

Source address increment sign.

enum
LDMA_CfgDstIncSign_t {
ldmaCfgDstIncSignPos = _LDMA_CH_CFG_DSTINCSIGN_POSITIVE
ldmaCfgDstIncSignNeg = _LDMA_CH_CFG_DSTINCSIGN_NEGATIVE
}

Destination address increment sign.

enum
LDMA_PeripheralSignal_t {
ldmaPeripheralSignal_NONE = LDMAXBAR_CH_REQSEL_SOURCESEL_NONE
ldmaPeripheralSignal_LDMAXBAR_PRSREQ0 = LDMAXBAR_CH_REQSEL_SIGSEL_LDMAXBARPRSREQ0 | LDMAXBAR_CH_REQSEL_SOURCESEL_LDMAXBAR
ldmaPeripheralSignal_LDMAXBAR_PRSREQ1 = LDMAXBAR_CH_REQSEL_SIGSEL_LDMAXBARPRSREQ1 | LDMAXBAR_CH_REQSEL_SOURCESEL_LDMAXBAR
ldmaPeripheralSignal_TIMER0_CC0 = LDMAXBAR_CH_REQSEL_SIGSEL_TIMER0CC0 | LDMAXBAR_CH_REQSEL_SOURCESEL_TIMER0
ldmaPeripheralSignal_TIMER0_CC1 = LDMAXBAR_CH_REQSEL_SIGSEL_TIMER0CC1 | LDMAXBAR_CH_REQSEL_SOURCESEL_TIMER0
ldmaPeripheralSignal_TIMER0_CC2 = LDMAXBAR_CH_REQSEL_SIGSEL_TIMER0CC2 | LDMAXBAR_CH_REQSEL_SOURCESEL_TIMER0
ldmaPeripheralSignal_TIMER0_UFOF = LDMAXBAR_CH_REQSEL_SIGSEL_TIMER0UFOF | LDMAXBAR_CH_REQSEL_SOURCESEL_TIMER0
ldmaPeripheralSignal_TIMER1_CC0 = LDMAXBAR_CH_REQSEL_SIGSEL_TIMER1CC0 | LDMAXBAR_CH_REQSEL_SOURCESEL_TIMER1
ldmaPeripheralSignal_TIMER1_CC1 = LDMAXBAR_CH_REQSEL_SIGSEL_TIMER1CC1 | LDMAXBAR_CH_REQSEL_SOURCESEL_TIMER1
ldmaPeripheralSignal_TIMER1_CC2 = LDMAXBAR_CH_REQSEL_SIGSEL_TIMER1CC2 | LDMAXBAR_CH_REQSEL_SOURCESEL_TIMER1
ldmaPeripheralSignal_TIMER1_UFOF = LDMAXBAR_CH_REQSEL_SIGSEL_TIMER1UFOF | LDMAXBAR_CH_REQSEL_SOURCESEL_TIMER1
ldmaPeripheralSignal_USART0_RXDATAV = LDMAXBAR_CH_REQSEL_SIGSEL_USART0RXDATAV | LDMAXBAR_CH_REQSEL_SOURCESEL_USART0
ldmaPeripheralSignal_USART0_RXDATAVRIGHT = LDMAXBAR_CH_REQSEL_SIGSEL_USART0RXDATAVRIGHT | LDMAXBAR_CH_REQSEL_SOURCESEL_USART0
ldmaPeripheralSignal_USART0_TXBL = LDMAXBAR_CH_REQSEL_SIGSEL_USART0TXBL | LDMAXBAR_CH_REQSEL_SOURCESEL_USART0
ldmaPeripheralSignal_USART0_TXBLRIGHT = LDMAXBAR_CH_REQSEL_SIGSEL_USART0TXBLRIGHT | LDMAXBAR_CH_REQSEL_SOURCESEL_USART0
ldmaPeripheralSignal_USART0_TXEMPTY = LDMAXBAR_CH_REQSEL_SIGSEL_USART0TXEMPTY | LDMAXBAR_CH_REQSEL_SOURCESEL_USART0
ldmaPeripheralSignal_I2C0_RXDATAV = LDMAXBAR_CH_REQSEL_SIGSEL_I2C0RXDATAV | LDMAXBAR_CH_REQSEL_SOURCESEL_I2C0
ldmaPeripheralSignal_I2C0_TXBL = LDMAXBAR_CH_REQSEL_SIGSEL_I2C0TXBL | LDMAXBAR_CH_REQSEL_SOURCESEL_I2C0
ldmaPeripheralSignal_I2C1_RXDATAV = LDMAXBAR_CH_REQSEL_SIGSEL_I2C1RXDATAV | LDMAXBAR_CH_REQSEL_SOURCESEL_I2C1
ldmaPeripheralSignal_I2C1_TXBL = LDMAXBAR_CH_REQSEL_SIGSEL_I2C1TXBL | LDMAXBAR_CH_REQSEL_SOURCESEL_I2C1
ldmaPeripheralSignal_IADC0_IADC_SCAN = LDMAXBAR_CH_REQSEL_SIGSEL_IADC0IADC_SCAN | LDMAXBAR_CH_REQSEL_SOURCESEL_IADC0
ldmaPeripheralSignal_IADC0_IADC_SINGLE = LDMAXBAR_CH_REQSEL_SIGSEL_IADC0IADC_SINGLE | LDMAXBAR_CH_REQSEL_SOURCESEL_IADC0
ldmaPeripheralSignal_MSC_WDATA = LDMAXBAR_CH_REQSEL_SIGSEL_MSCWDATA | LDMAXBAR_CH_REQSEL_SOURCESEL_MSC
ldmaPeripheralSignal_TIMER2_CC0 = LDMAXBAR_CH_REQSEL_SIGSEL_TIMER2CC0 | LDMAXBAR_CH_REQSEL_SOURCESEL_TIMER2
ldmaPeripheralSignal_TIMER2_CC1 = LDMAXBAR_CH_REQSEL_SIGSEL_TIMER2CC1 | LDMAXBAR_CH_REQSEL_SOURCESEL_TIMER2
ldmaPeripheralSignal_TIMER2_CC2 = LDMAXBAR_CH_REQSEL_SIGSEL_TIMER2CC2 | LDMAXBAR_CH_REQSEL_SOURCESEL_TIMER2
ldmaPeripheralSignal_TIMER2_UFOF = LDMAXBAR_CH_REQSEL_SIGSEL_TIMER2UFOF | LDMAXBAR_CH_REQSEL_SOURCESEL_TIMER2
ldmaPeripheralSignal_TIMER3_CC0 = LDMAXBAR_CH_REQSEL_SIGSEL_TIMER3CC0 | LDMAXBAR_CH_REQSEL_SOURCESEL_TIMER3
ldmaPeripheralSignal_TIMER3_CC1 = LDMAXBAR_CH_REQSEL_SIGSEL_TIMER3CC1 | LDMAXBAR_CH_REQSEL_SOURCESEL_TIMER3
ldmaPeripheralSignal_TIMER3_CC2 = LDMAXBAR_CH_REQSEL_SIGSEL_TIMER3CC2 | LDMAXBAR_CH_REQSEL_SOURCESEL_TIMER3
ldmaPeripheralSignal_TIMER3_UFOF = LDMAXBAR_CH_REQSEL_SIGSEL_TIMER3UFOF | LDMAXBAR_CH_REQSEL_SOURCESEL_TIMER3
ldmaPeripheralSignal_TIMER4_CC0 = LDMAXBAR_CH_REQSEL_SIGSEL_TIMER4CC0 | LDMAXBAR_CH_REQSEL_SOURCESEL_TIMER4
ldmaPeripheralSignal_TIMER4_CC1 = LDMAXBAR_CH_REQSEL_SIGSEL_TIMER4CC1 | LDMAXBAR_CH_REQSEL_SOURCESEL_TIMER4
ldmaPeripheralSignal_TIMER4_CC2 = LDMAXBAR_CH_REQSEL_SIGSEL_TIMER4CC2 | LDMAXBAR_CH_REQSEL_SOURCESEL_TIMER4
ldmaPeripheralSignal_TIMER4_UFOF = LDMAXBAR_CH_REQSEL_SIGSEL_TIMER4UFOF | LDMAXBAR_CH_REQSEL_SOURCESEL_TIMER4
ldmaPeripheralSignal_VDAC0CH0REQ = LDMAXBAR_CH_REQSEL_SIGSEL_VDAC0CH0_REQ | LDMAXBAR_CH_REQSEL_SOURCESEL_VDAC0
ldmaPeripheralSignal_VDAC0CH1REQ = LDMAXBAR_CH_REQSEL_SIGSEL_VDAC0CH1_REQ | LDMAXBAR_CH_REQSEL_SOURCESEL_VDAC0
ldmaPeripheralSignal_VDAC1CH0REQ = LDMAXBAR_CH_REQSEL_SIGSEL_VDAC1CH0_REQ | LDMAXBAR_CH_REQSEL_SOURCESEL_VDAC1
ldmaPeripheralSignal_VDAC1CH1REQ = LDMAXBAR_CH_REQSEL_SIGSEL_VDAC1CH1_REQ | LDMAXBAR_CH_REQSEL_SOURCESEL_VDAC1
ldmaPeripheralSignal_EUSART0_RXFL = LDMAXBAR_CH_REQSEL_SIGSEL_EUSART0RXFL | LDMAXBAR_CH_REQSEL_SOURCESEL_EUSART0
ldmaPeripheralSignal_EUSART0_TXFL = LDMAXBAR_CH_REQSEL_SIGSEL_EUSART0TXFL | LDMAXBAR_CH_REQSEL_SOURCESEL_EUSART0
ldmaPeripheralSignal_EUSART1_RXFL = LDMAXBAR_CH_REQSEL_SIGSEL_EUSART1RXFL | LDMAXBAR_CH_REQSEL_SOURCESEL_EUSART1
ldmaPeripheralSignal_EUSART1_TXFL = LDMAXBAR_CH_REQSEL_SIGSEL_EUSART1TXFL | LDMAXBAR_CH_REQSEL_SOURCESEL_EUSART1
}

Peripherals that can trigger LDMA transfers.

Functions#

void
LDMA_DeInit(void)

De-initialize the LDMA controller.

void
LDMA_EnableChannelRequest(int ch, bool enable)

Enable or disable an LDMA channel request.

void
LDMA_Init(const LDMA_Init_t *init)

Initialize the LDMA controller.

void
LDMA_StartTransfer(int ch, const LDMA_TransferCfg_t *transfer, const LDMA_Descriptor_t *descriptor)

Start a DMA transfer.

void
LDMA_StopTransfer(int ch)

Stop a DMA transfer.

bool
LDMA_TransferDone(int ch)

Check if a DMA transfer has completed.

uint32_t
LDMA_TransferRemainingCount(int ch)

Get the number of items remaining in a transfer.

bool
LDMA_ChannelEnabled(int ch)

Check if a certain channel is enabled.

void
LDMA_IntClear(uint32_t flags)

Clear one or more pending LDMA interrupts.

void
LDMA_IntDisable(uint32_t flags)

Disable one or more LDMA interrupts.

void
LDMA_IntEnable(uint32_t flags)

Enable one or more LDMA interrupts.

uint32_t
LDMA_IntGet(void)

Get pending LDMA interrupt flags.

uint32_t
LDMA_IntGetEnabled(void)

Get enabled and pending LDMA interrupt flags.

void
LDMA_IntSet(uint32_t flags)

Set one or more pending LDMA interrupts.

Macros#

#define
LDMA_DESCRIPTOR_NON_EXTEND_SIZE_WORD 4

Size in words of a non-extended DMA descriptor.

#define
LDMA_DESCRIPTOR_EXTEND_SIZE_WORD 7

Size in words of an extended DMA descriptor.

#define
LDMA_DESCRIPTOR_MAX_XFER_SIZE (((_LDMA_CH_CTRL_XFERCNT_MASK >> _LDMA_CH_CTRL_XFERCNT_SHIFT) + 1))

Maximum transfer size possible per descriptor.

#define
LDMA_DESCRIPTOR_LINKABS_ADDR_TO_LINKADDR (addr)

Converts a LDMA_Descriptor_t pointer to the value suitable to write to the linkAddr field of a LDMA_Descriptor_t.

#define
LDMA_DESCRIPTOR_LINKABS_LINKADDR_TO_ADDR (linkAddr)

Converts a LDMA_Descriptor_t linkAddr field value back to a LDMA_Descriptor_t pointer.

#define
LDMA_INIT_DEFAULT undefined

Default DMA initialization structure.

#define
LDMA_TRANSFER_CFG_MEMORY ()

Generic DMA transfer configuration for memory to memory transfers.

#define
LDMA_TRANSFER_CFG_MEMORY_LOOP (loopCnt)

Generic DMA transfer configuration for looped memory to memory transfers.

#define
LDMA_TRANSFER_CFG_PERIPHERAL (signal)

Generic DMA transfer configuration for memory to/from peripheral transfers.

#define
LDMA_TRANSFER_CFG_PERIPHERAL_LOOP (signal, loopCnt)

Generic DMA transfer configuration for looped memory to/from peripheral transfers.

#define
LDMA_DESCRIPTOR_SINGLE_M2M_WORD (src, dest, count)

DMA descriptor initializer for single memory to memory word transfer.

#define
LDMA_DESCRIPTOR_SINGLE_M2M_HALF (src, dest, count)

DMA descriptor initializer for single memory to memory half-word transfer.

#define
LDMA_DESCRIPTOR_SINGLE_M2M_BYTE (src, dest, count)

DMA descriptor initializer for single memory to memory byte transfer.

#define
LDMA_DESCRIPTOR_LINKABS_M2M_WORD (src, dest, count)

DMA descriptor initializer for linked memory to memory word transfer.

#define
LDMA_DESCRIPTOR_LINKABS_M2M_HALF (src, dest, count)

DMA descriptor initializer for linked memory to memory half-word transfer.

#define
LDMA_DESCRIPTOR_LINKABS_M2M_BYTE (src, dest, count)

DMA descriptor initializer for linked memory to memory byte transfer.

#define
LDMA_DESCRIPTOR_LINKREL_M2M_WORD (src, dest, count, linkjmp)

DMA descriptor initializer for linked memory to memory word transfer.

#define
LDMA_DESCRIPTOR_LINKREL_M2M_HALF (src, dest, count, linkjmp)

DMA descriptor initializer for linked memory to memory half-word transfer.

#define
LDMA_DESCRIPTOR_LINKREL_M2M_BYTE (src, dest, count, linkjmp)

DMA descriptor initializer for linked memory to memory byte transfer.

#define
LDMA_DESCRIPTOR_SINGLE_P2M_BYTE (src, dest, count)

DMA descriptor initializer for byte transfers from a peripheral to memory.

#define
LDMA_DESCRIPTOR_SINGLE_P2P_BYTE (src, dest, count)

DMA descriptor initializer for byte transfers from a peripheral to a peripheral.

#define
LDMA_DESCRIPTOR_SINGLE_M2P_BYTE (src, dest, count)

DMA descriptor initializer for byte transfers from memory to a peripheral.

#define
LDMA_DESCRIPTOR_LINKREL_P2M_BYTE (src, dest, count, linkjmp)

DMA descriptor initializer for byte transfers from a peripheral to memory.

#define
LDMA_DESCRIPTOR_LINKREL_P2M_WORD (src, dest, count, linkjmp)

DMA descriptor initializer for word transfers from a peripheral to memory.

#define
LDMA_DESCRIPTOR_LINKREL_M2P_BYTE (src, dest, count, linkjmp)

DMA descriptor initializer for byte transfers from memory to a peripheral.

#define
LDMA_DESCRIPTOR_SINGLE_WRITE (value, address)

DMA descriptor initializer for Immediate WRITE transfer.

#define
LDMA_DESCRIPTOR_LINKABS_WRITE (value, address)

DMA descriptor initializer for Immediate WRITE transfer.

#define
LDMA_DESCRIPTOR_LINKREL_WRITE (value, address, linkjmp)

DMA descriptor initializer for Immediate WRITE transfer.

#define
LDMA_DESCRIPTOR_SINGLE_SYNC (set, clr, matchValue, matchEnable)

DMA descriptor initializer for SYNC transfer.

#define
LDMA_DESCRIPTOR_LINKABS_SYNC (set, clr, matchValue, matchEnable)

DMA descriptor initializer for SYNC transfer.

#define
LDMA_DESCRIPTOR_LINKREL_SYNC (set, clr, matchValue, matchEnable, linkjmp)

DMA descriptor initializer for SYNC transfer.

Enumeration Documentation#

LDMA_CtrlBlockSize_t#

LDMA_CtrlBlockSize_t

Controls the number of unit data transfers per arbitration cycle, providing a means to balance DMA channels' load on the controller.

Enumerator
ldmaCtrlBlockSizeUnit1

One transfer per arbitration.

ldmaCtrlBlockSizeUnit2

Two transfers per arbitration.

ldmaCtrlBlockSizeUnit3

Three transfers per arbitration.

ldmaCtrlBlockSizeUnit4

Four transfers per arbitration.

ldmaCtrlBlockSizeUnit6

Six transfers per arbitration.

ldmaCtrlBlockSizeUnit8

Eight transfers per arbitration.

ldmaCtrlBlockSizeUnit16

16 transfers per arbitration.

ldmaCtrlBlockSizeUnit32

32 transfers per arbitration.

ldmaCtrlBlockSizeUnit64

64 transfers per arbitration.

ldmaCtrlBlockSizeUnit128

128 transfers per arbitration.

ldmaCtrlBlockSizeUnit256

256 transfers per arbitration.

ldmaCtrlBlockSizeUnit512

512 transfers per arbitration.

ldmaCtrlBlockSizeUnit1024

1024 transfers per arbitration.

ldmaCtrlBlockSizeAll

Lock arbitration during transfer.


Definition at line 127 of file platform/emlib/inc/em_ldma.h

LDMA_CtrlStructType_t#

LDMA_CtrlStructType_t

DMA structure type.

Enumerator
ldmaCtrlStructTypeXfer

TRANSFER transfer type.

ldmaCtrlStructTypeSync

SYNCHRONIZE transfer type.

ldmaCtrlStructTypeWrite

WRITE transfer type.


Definition at line 145 of file platform/emlib/inc/em_ldma.h

LDMA_CtrlReqMode_t#

LDMA_CtrlReqMode_t

DMA transfer block or cycle selector.

Enumerator
ldmaCtrlReqModeBlock

Each DMA request trigger transfer of one block.

ldmaCtrlReqModeAll

A DMA request trigger transfer of a complete cycle.


Definition at line 152 of file platform/emlib/inc/em_ldma.h

LDMA_CtrlSrcInc_t#

LDMA_CtrlSrcInc_t

Source address increment unit size.

Enumerator
ldmaCtrlSrcIncOne

Increment source address by one unit data size.

ldmaCtrlSrcIncTwo

Increment source address by two unit data sizes.

ldmaCtrlSrcIncFour

Increment source address by four unit data sizes.

ldmaCtrlSrcIncNone

Do not increment source address.


Definition at line 158 of file platform/emlib/inc/em_ldma.h

LDMA_CtrlSize_t#

LDMA_CtrlSize_t

DMA transfer unit size.

Enumerator
ldmaCtrlSizeByte

Each unit transfer is a byte.

ldmaCtrlSizeHalf

Each unit transfer is a half-word.

ldmaCtrlSizeWord

Each unit transfer is a word.


Definition at line 166 of file platform/emlib/inc/em_ldma.h

LDMA_CtrlDstInc_t#

LDMA_CtrlDstInc_t

Destination address increment unit size.

Enumerator
ldmaCtrlDstIncOne

Increment destination address by one unit data size.

ldmaCtrlDstIncTwo

Increment destination address by two unit data sizes.

ldmaCtrlDstIncFour

Increment destination address by four unit data sizes.

ldmaCtrlDstIncNone

Do not increment destination address.


Definition at line 173 of file platform/emlib/inc/em_ldma.h

LDMA_CtrlSrcAddrMode_t#

LDMA_CtrlSrcAddrMode_t

Source addressing mode.

Enumerator
ldmaCtrlSrcAddrModeAbs

Address fetched from a linked structure is absolute.

ldmaCtrlSrcAddrModeRel

Address fetched from a linked structure is relative.


Definition at line 181 of file platform/emlib/inc/em_ldma.h

LDMA_CtrlDstAddrMode_t#

LDMA_CtrlDstAddrMode_t

Destination addressing mode.

Enumerator
ldmaCtrlDstAddrModeAbs

Address fetched from a linked structure is absolute.

ldmaCtrlDstAddrModeRel

Address fetched from a linked structure is relative.


Definition at line 187 of file platform/emlib/inc/em_ldma.h

LDMA_LinkMode_t#

LDMA_LinkMode_t

DMA link load address mode.

Enumerator
ldmaLinkModeAbs

Link address is an absolute address value.

ldmaLinkModeRel

Link address is a two's complement relative address.


Definition at line 193 of file platform/emlib/inc/em_ldma.h

LDMA_CfgArbSlots_t#

LDMA_CfgArbSlots_t

Insert extra arbitration slots to increase channel arbitration priority.

Enumerator
ldmaCfgArbSlotsAs1

One arbitration slot selected.

ldmaCfgArbSlotsAs2

Two arbitration slots selected.

ldmaCfgArbSlotsAs4

Four arbitration slots selected.

ldmaCfgArbSlotsAs8

Eight arbitration slots selected.


Definition at line 199 of file platform/emlib/inc/em_ldma.h

LDMA_CfgSrcIncSign_t#

LDMA_CfgSrcIncSign_t

Source address increment sign.

Enumerator
ldmaCfgSrcIncSignPos

Increment source address.

ldmaCfgSrcIncSignNeg

Decrement source address.


Definition at line 207 of file platform/emlib/inc/em_ldma.h

LDMA_CfgDstIncSign_t#

LDMA_CfgDstIncSign_t

Destination address increment sign.

Enumerator
ldmaCfgDstIncSignPos

Increment destination address.

ldmaCfgDstIncSignNeg

Decrement destination address.


Definition at line 213 of file platform/emlib/inc/em_ldma.h

LDMA_PeripheralSignal_t#

LDMA_PeripheralSignal_t

Peripherals that can trigger LDMA transfers.

Enumerator
ldmaPeripheralSignal_NONE

No peripheral selected for DMA triggering.

ldmaPeripheralSignal_LDMAXBAR_PRSREQ0

Trigger on PRS REQ0.

ldmaPeripheralSignal_LDMAXBAR_PRSREQ1

Trigger on PRS REQ1.

ldmaPeripheralSignal_TIMER0_CC0

Trigger on TIMER0_CC0.

ldmaPeripheralSignal_TIMER0_CC1

Trigger on TIMER0_CC1.

ldmaPeripheralSignal_TIMER0_CC2

Trigger on TIMER0_CC2.

ldmaPeripheralSignal_TIMER0_UFOF

Trigger on TIMER0_UFOF.

ldmaPeripheralSignal_TIMER1_CC0

Trigger on TIMER1_CC0.

ldmaPeripheralSignal_TIMER1_CC1

Trigger on TIMER1_CC1.

ldmaPeripheralSignal_TIMER1_CC2

Trigger on TIMER1_CC2.

ldmaPeripheralSignal_TIMER1_UFOF

Trigger on TIMER1_UFOF.

ldmaPeripheralSignal_USART0_RXDATAV

Trigger on USART0_RXDATAV.

ldmaPeripheralSignal_USART0_RXDATAVRIGHT

Trigger on USART0_RXDATAVRIGHT.

ldmaPeripheralSignal_USART0_TXBL

Trigger on USART0_TXBL.

ldmaPeripheralSignal_USART0_TXBLRIGHT

Trigger on USART0_TXBLRIGHT.

ldmaPeripheralSignal_USART0_TXEMPTY

Trigger on USART0_TXEMPTY.

ldmaPeripheralSignal_I2C0_RXDATAV

Trigger on I2C0_RXDATAV.

ldmaPeripheralSignal_I2C0_TXBL

Trigger on I2C0_TXBL.

ldmaPeripheralSignal_I2C1_RXDATAV

Trigger on I2C1_RXDATAV.

ldmaPeripheralSignal_I2C1_TXBL

Trigger on I2C1_TXBL.

ldmaPeripheralSignal_IADC0_IADC_SCAN

Trigger on IADC0_IADC_SCAN.

ldmaPeripheralSignal_IADC0_IADC_SINGLE

Trigger on IADC0_IADC_SINGLE.

ldmaPeripheralSignal_MSC_WDATA

Trigger on MSC_WDATA.

ldmaPeripheralSignal_TIMER2_CC0

Trigger on TIMER2_CC0.

ldmaPeripheralSignal_TIMER2_CC1

Trigger on TIMER2_CC1.

ldmaPeripheralSignal_TIMER2_CC2

Trigger on TIMER2_CC2.

ldmaPeripheralSignal_TIMER2_UFOF

Trigger on TIMER2_UFOF.

ldmaPeripheralSignal_TIMER3_CC0

Trigger on TIMER3_CC0.

ldmaPeripheralSignal_TIMER3_CC1

Trigger on TIMER3_CC1.

ldmaPeripheralSignal_TIMER3_CC2

Trigger on TIMER3_CC2.

ldmaPeripheralSignal_TIMER3_UFOF

Trigger on TIMER3_UFOF.

ldmaPeripheralSignal_TIMER4_CC0

Trigger on TIMER4_CC0.

ldmaPeripheralSignal_TIMER4_CC1

Trigger on TIMER4_CC1.

ldmaPeripheralSignal_TIMER4_CC2

Trigger on TIMER4_CC2.

ldmaPeripheralSignal_TIMER4_UFOF

Trigger on TIMER4_UFOF.

ldmaPeripheralSignal_VDAC0CH0REQ

Trigger on VDAC0_CH0REQ.

ldmaPeripheralSignal_VDAC0CH1REQ

Trigger on VDAC0_CH1REQ.

ldmaPeripheralSignal_VDAC1CH0REQ

Trigger on VDAC1_CH0REQ.

ldmaPeripheralSignal_VDAC1CH1REQ

Trigger on VDAC1_CH1REQ.

ldmaPeripheralSignal_EUSART0_RXFL

Trigger on EUSART0_RXFL.

ldmaPeripheralSignal_EUSART0_TXFL

Trigger on EUSART0_TXFL.

ldmaPeripheralSignal_EUSART1_RXFL

Trigger on EUSART1_RXFL.

ldmaPeripheralSignal_EUSART1_TXFL

Trigger on EUSART1_TXFL.


Definition at line 253 of file platform/emlib/inc/em_ldma.h

Function Documentation#

LDMA_DeInit#

void LDMA_DeInit (void )

De-initialize the LDMA controller.

Parameters
N/A

LDMA interrupts are disabled and the LDMA clock is stopped.


Definition at line 80 of file platform/emlib/src/em_ldma.c

LDMA_EnableChannelRequest#

void LDMA_EnableChannelRequest (int ch, bool enable)

Enable or disable an LDMA channel request.

Parameters
[in]ch

LDMA channel to enable or disable requests.

[in]enable

If 'true', the request will be enabled. If 'false', the request will be disabled.

Use this function to enable or disable an LDMA channel request. This will prevent the LDMA from proceeding after its current transaction if disabled.


Definition at line 117 of file platform/emlib/src/em_ldma.c

LDMA_Init#

void LDMA_Init (const LDMA_Init_t * init)

Initialize the LDMA controller.

Parameters
[in]init

A pointer to the initialization structure used to configure the LDMA.

This function will disable all the LDMA channels and enable the LDMA bus clock in the CMU. This function will also enable the LDMA IRQ in the NVIC and set the LDMA IRQ priority to a user-configurable priority. The LDMA interrupt priority is configured using the LDMA_Init_t structure.

Note

  • Since this function enables the LDMA IRQ, always add a custom LDMA_IRQHandler to the application to handle any interrupts from LDMA.


Definition at line 142 of file platform/emlib/src/em_ldma.c

LDMA_StartTransfer#

void LDMA_StartTransfer (int ch, const LDMA_TransferCfg_t * transfer, const LDMA_Descriptor_t * descriptor)

Start a DMA transfer.

Parameters
[in]ch

A DMA channel.

[in]transfer

The initialization structure used to configure the transfer.

[in]descriptor

The transfer descriptor, which can be an array of descriptors linked together. Each descriptor's fields stored in RAM will be loaded into the certain hardware registers at the proper time to perform the DMA transfer.


Definition at line 226 of file platform/emlib/src/em_ldma.c

LDMA_StopTransfer#

void LDMA_StopTransfer (int ch)

Stop a DMA transfer.

Parameters
[in]ch

A DMA channel to stop.

Note

  • The DMA will complete the current AHB burst transfer before stopping.


Definition at line 403 of file platform/emlib/src/em_ldma.c

LDMA_TransferDone#

bool LDMA_TransferDone (int ch)

Check if a DMA transfer has completed.

Parameters
[in]ch

A DMA channel to check.

Returns

  • True if transfer has completed, false if not.


Definition at line 432 of file platform/emlib/src/em_ldma.c

LDMA_TransferRemainingCount#

uint32_t LDMA_TransferRemainingCount (int ch)

Get the number of items remaining in a transfer.

Parameters
[in]ch

The channel number of the transfer to check.

Note

  • This function does not take into account that a DMA transfer with a chain of linked transfers might be ongoing. It will only check the count for the current transfer.

Returns

  • A number of items remaining in the transfer.


Definition at line 471 of file platform/emlib/src/em_ldma.c

LDMA_ChannelEnabled#

bool LDMA_ChannelEnabled (int ch)

Check if a certain channel is enabled.

Parameters
[in]ch

LDMA channel to check.

Returns

  • return true if the LDMA channel is enabled and false if the channel is not enabled.


Definition at line 2690 of file platform/emlib/inc/em_ldma.h

LDMA_IntClear#

void LDMA_IntClear (uint32_t flags)

Clear one or more pending LDMA interrupts.

Parameters
[in]flags

Pending LDMA interrupt sources to clear. Use one or more valid interrupt flags for the LDMA module. The flags are LDMA_IFC_ERROR and one done flag for each channel.


Definition at line 2713 of file platform/emlib/inc/em_ldma.h

LDMA_IntDisable#

void LDMA_IntDisable (uint32_t flags)

Disable one or more LDMA interrupts.

Parameters
[in]flags

LDMA interrupt sources to disable. Use one or more valid interrupt flags for LDMA module. The flags are LDMA_IEN_ERROR and one done flag for each channel.


Definition at line 2731 of file platform/emlib/inc/em_ldma.h

LDMA_IntEnable#

void LDMA_IntEnable (uint32_t flags)

Enable one or more LDMA interrupts.

Parameters
[in]flags

LDMA interrupt sources to enable. Use one or more valid interrupt flags for LDMA module. The flags are LDMA_IEN_ERROR and one done flag for each channel.

Note

  • Depending on the use, a pending interrupt may already be set prior to enabling the interrupt. To ignore a pending interrupt, consider using LDMA_IntClear() prior to enabling the interrupt.


Definition at line 2750 of file platform/emlib/inc/em_ldma.h

LDMA_IntGet#

uint32_t LDMA_IntGet (void )

Get pending LDMA interrupt flags.

Parameters
N/A

Note

  • Event bits are not cleared by the use of this function.

Returns

  • LDMA interrupt sources pending. Returns one or more valid interrupt flags for LDMA module. The flags are LDMA_IF_ERROR and one flag for each LDMA channel.


Definition at line 2767 of file platform/emlib/inc/em_ldma.h

LDMA_IntGetEnabled#

uint32_t LDMA_IntGetEnabled (void )

Get enabled and pending LDMA interrupt flags.

Parameters
N/A

Useful for handling more interrupt sources in the same interrupt handler.

Note

  • Interrupt flags are not cleared by the use of this function.

Returns

  • Pending and enabled LDMA interrupt sources Return value is the bitwise AND of

    • the enabled interrupt sources in LDMA_IEN and

    • the pending interrupt flags LDMA_IF


Definition at line 2786 of file platform/emlib/inc/em_ldma.h

LDMA_IntSet#

void LDMA_IntSet (uint32_t flags)

Set one or more pending LDMA interrupts.

Parameters
[in]flags

LDMA interrupt sources to set to pending. Use one or more valid interrupt flags for LDMA module. The flags are LDMA_IFS_ERROR and one done flag for each LDMA channel.


Definition at line 2803 of file platform/emlib/inc/em_ldma.h

Macro Definition Documentation#

LDMA_DESCRIPTOR_NON_EXTEND_SIZE_WORD#

#define LDMA_DESCRIPTOR_NON_EXTEND_SIZE_WORD
Value:
4

Size in words of a non-extended DMA descriptor.


Definition at line 1083 of file platform/emlib/inc/em_ldma.h

LDMA_DESCRIPTOR_EXTEND_SIZE_WORD#

#define LDMA_DESCRIPTOR_EXTEND_SIZE_WORD
Value:
7

Size in words of an extended DMA descriptor.


Definition at line 1086 of file platform/emlib/inc/em_ldma.h

LDMA_DESCRIPTOR_MAX_XFER_SIZE#

#define LDMA_DESCRIPTOR_MAX_XFER_SIZE
Value:
(((_LDMA_CH_CTRL_XFERCNT_MASK >> _LDMA_CH_CTRL_XFERCNT_SHIFT) + 1))

Maximum transfer size possible per descriptor.


Definition at line 1089 of file platform/emlib/inc/em_ldma.h

LDMA_DESCRIPTOR_LINKABS_ADDR_TO_LINKADDR#

#define LDMA_DESCRIPTOR_LINKABS_ADDR_TO_LINKADDR
Value:
(addr)

Converts a LDMA_Descriptor_t pointer to the value suitable to write to the linkAddr field of a LDMA_Descriptor_t.


Definition at line 1092 of file platform/emlib/inc/em_ldma.h

LDMA_DESCRIPTOR_LINKABS_LINKADDR_TO_ADDR#

#define LDMA_DESCRIPTOR_LINKABS_LINKADDR_TO_ADDR
Value:
(linkAddr)

Converts a LDMA_Descriptor_t linkAddr field value back to a LDMA_Descriptor_t pointer.


Definition at line 1095 of file platform/emlib/inc/em_ldma.h

LDMA_INIT_DEFAULT#

#define LDMA_INIT_DEFAULT
Value:
{ \
.ldmaInitCtrlNumFixed = _LDMA_CTRL_NUMFIXED_DEFAULT,/* Fixed priority arbitration.*/ \
.ldmaInitCtrlSyncPrsClrEn = 0, /* No PRS Synctrig clear enable*/ \
.ldmaInitCtrlSyncPrsSetEn = 0, /* No PRS Synctrig set enable. */ \
.ldmaInitIrqPriority = 3 /* IRQ priority level 3. */ \
}

Default DMA initialization structure.


Definition at line 1102 of file platform/emlib/inc/em_ldma.h

LDMA_TRANSFER_CFG_MEMORY#

#define LDMA_TRANSFER_CFG_MEMORY
Value:
{ \
0, 0, 0, 0, 0, \
false, false, ldmaCfgArbSlotsAs1, \
ldmaCfgSrcIncSignPos, ldmaCfgDstIncSignPos, 0 \
}

Generic DMA transfer configuration for memory to memory transfers.


Definition at line 1123 of file platform/emlib/inc/em_ldma.h

LDMA_TRANSFER_CFG_MEMORY_LOOP#

#define LDMA_TRANSFER_CFG_MEMORY_LOOP
Value:
{ \
0, 0, 0, 0, 0, \
false, false, ldmaCfgArbSlotsAs1, \
ldmaCfgSrcIncSignPos, ldmaCfgDstIncSignPos, \
loopCnt \
}

Generic DMA transfer configuration for looped memory to memory transfers.


Definition at line 1145 of file platform/emlib/inc/em_ldma.h

LDMA_TRANSFER_CFG_PERIPHERAL#

#define LDMA_TRANSFER_CFG_PERIPHERAL
Value:
{ \
signal, 0, 0, 0, 0, \
false, false, ldmaCfgArbSlotsAs1, \
ldmaCfgSrcIncSignPos, ldmaCfgDstIncSignPos, 0 \
}

Generic DMA transfer configuration for memory to/from peripheral transfers.


Definition at line 1167 of file platform/emlib/inc/em_ldma.h

LDMA_TRANSFER_CFG_PERIPHERAL_LOOP#

#define LDMA_TRANSFER_CFG_PERIPHERAL_LOOP
Value:
{ \
signal, 0, 0, 0, 0, \
false, false, ldmaCfgArbSlotsAs1, \
ldmaCfgSrcIncSignPos, ldmaCfgDstIncSignPos, loopCnt \
}

Generic DMA transfer configuration for looped memory to/from peripheral transfers.


Definition at line 1188 of file platform/emlib/inc/em_ldma.h

LDMA_DESCRIPTOR_SINGLE_M2M_WORD#

#define LDMA_DESCRIPTOR_SINGLE_M2M_WORD
Value:
{ \
.xfer = \
{ \
.structType = ldmaCtrlStructTypeXfer, \
.structReq = 1, \
.xferCnt = (count) - 1, \
.byteSwap = 0, \
.blockSize = ldmaCtrlBlockSizeUnit1, \
.doneIfs = 1, \
.reqMode = ldmaCtrlReqModeAll, \
.decLoopCnt = 0, \
.ignoreSrec = 0, \
.srcInc = ldmaCtrlSrcIncOne, \
.size = ldmaCtrlSizeWord, \
.dstInc = ldmaCtrlDstIncOne, \
.srcAddrMode = ldmaCtrlSrcAddrModeAbs, \
.dstAddrMode = ldmaCtrlDstAddrModeAbs, \
.srcAddr = (uint32_t)(src), \
.dstAddr = (uint32_t)(dest), \
.linkMode = 0, \
.link = 0, \
.linkAddr = 0 \
} \
}

DMA descriptor initializer for single memory to memory word transfer.


Definition at line 1203 of file platform/emlib/inc/em_ldma.h

LDMA_DESCRIPTOR_SINGLE_M2M_HALF#

#define LDMA_DESCRIPTOR_SINGLE_M2M_HALF
Value:
{ \
.xfer = \
{ \
.structType = ldmaCtrlStructTypeXfer, \
.structReq = 1, \
.xferCnt = (count) - 1, \
.byteSwap = 0, \
.blockSize = ldmaCtrlBlockSizeUnit1, \
.doneIfs = 1, \
.reqMode = ldmaCtrlReqModeAll, \
.decLoopCnt = 0, \
.ignoreSrec = 0, \
.srcInc = ldmaCtrlSrcIncOne, \
.size = ldmaCtrlSizeHalf, \
.dstInc = ldmaCtrlDstIncOne, \
.srcAddrMode = ldmaCtrlSrcAddrModeAbs, \
.dstAddrMode = ldmaCtrlDstAddrModeAbs, \
.srcAddr = (uint32_t)(src), \
.dstAddr = (uint32_t)(dest), \
.linkMode = 0, \
.link = 0, \
.linkAddr = 0 \
} \
}

DMA descriptor initializer for single memory to memory half-word transfer.


Definition at line 1274 of file platform/emlib/inc/em_ldma.h

LDMA_DESCRIPTOR_SINGLE_M2M_BYTE#

#define LDMA_DESCRIPTOR_SINGLE_M2M_BYTE
Value:
{ \
.xfer = \
{ \
.structType = ldmaCtrlStructTypeXfer, \
.structReq = 1, \
.xferCnt = (count) - 1, \
.byteSwap = 0, \
.blockSize = ldmaCtrlBlockSizeUnit1, \
.doneIfs = 1, \
.reqMode = ldmaCtrlReqModeAll, \
.decLoopCnt = 0, \
.ignoreSrec = 0, \
.srcInc = ldmaCtrlSrcIncOne, \
.size = ldmaCtrlSizeByte, \
.dstInc = ldmaCtrlDstIncOne, \
.srcAddrMode = ldmaCtrlSrcAddrModeAbs, \
.dstAddrMode = ldmaCtrlDstAddrModeAbs, \
.srcAddr = (uint32_t)(src), \
.dstAddr = (uint32_t)(dest), \
.linkMode = 0, \
.link = 0, \
.linkAddr = 0 \
} \
}

DMA descriptor initializer for single memory to memory byte transfer.


Definition at line 1345 of file platform/emlib/inc/em_ldma.h

LDMA_DESCRIPTOR_LINKABS_M2M_WORD#

#define LDMA_DESCRIPTOR_LINKABS_M2M_WORD
Value:
{ \
.xfer = \
{ \
.structType = ldmaCtrlStructTypeXfer, \
.structReq = 1, \
.xferCnt = (count) - 1, \
.byteSwap = 0, \
.blockSize = ldmaCtrlBlockSizeUnit1, \
.doneIfs = 0, \
.reqMode = ldmaCtrlReqModeAll, \
.decLoopCnt = 0, \
.ignoreSrec = 0, \
.srcInc = ldmaCtrlSrcIncOne, \
.size = ldmaCtrlSizeWord, \
.dstInc = ldmaCtrlDstIncOne, \
.srcAddrMode = ldmaCtrlSrcAddrModeAbs, \
.dstAddrMode = ldmaCtrlDstAddrModeAbs, \
.srcAddr = (uint32_t)(src), \
.dstAddr = (uint32_t)(dest), \
.linkMode = ldmaLinkModeAbs, \
.link = 1, \
.linkAddr = 0 /* Must be set runtime ! */ \
} \
}

DMA descriptor initializer for linked memory to memory word transfer.

Link address must be an absolute address. Note

  • The linkAddr member of the transfer descriptor is not initialized. linkAddr must be initialized by using the proper bits right-shift to get the correct bits from the absolute address. LDMA_DESCRIPTOR_LINKABS_ADDR_TO_LINKADDR macro should be used for that operation: 

    desc.linkAddr = LDMA_DESCRIPTOR_LINKABS_ADDR_TO_LINKADDR(&next_desc);

    The opposite bit shift (left) must be done with LDMA_DESCRIPTOR_LINKABS_ADDR_TO_LINKADDR if linkAddr is read.


Definition at line 1427 of file platform/emlib/inc/em_ldma.h

LDMA_DESCRIPTOR_LINKABS_M2M_HALF#

#define LDMA_DESCRIPTOR_LINKABS_M2M_HALF
Value:
{ \
.xfer = \
{ \
.structType = ldmaCtrlStructTypeXfer, \
.structReq = 1, \
.xferCnt = (count) - 1, \
.byteSwap = 0, \
.blockSize = ldmaCtrlBlockSizeUnit1, \
.doneIfs = 0, \
.reqMode = ldmaCtrlReqModeAll, \
.decLoopCnt = 0, \
.ignoreSrec = 0, \
.srcInc = ldmaCtrlSrcIncOne, \
.size = ldmaCtrlSizeHalf, \
.dstInc = ldmaCtrlDstIncOne, \
.srcAddrMode = ldmaCtrlSrcAddrModeAbs, \
.dstAddrMode = ldmaCtrlDstAddrModeAbs, \
.srcAddr = (uint32_t)(src), \
.dstAddr = (uint32_t)(dest), \
.linkMode = ldmaLinkModeAbs, \
.link = 1, \
.linkAddr = 0 /* Must be set runtime ! */ \
} \
}

DMA descriptor initializer for linked memory to memory half-word transfer.

Link address must be an absolute address. Note

  • The linkAddr member of the transfer descriptor is not initialized. linkAddr must be initialized by using the proper bits right-shift to get the correct bits from the absolute address. LDMA_DESCRIPTOR_LINKABS_ADDR_TO_LINKADDR macro should be used for that operation: 

    desc.linkAddr = LDMA_DESCRIPTOR_LINKABS_ADDR_TO_LINKADDR(&next_desc);

    The opposite bit shift (left) must be done with LDMA_DESCRIPTOR_LINKABS_ADDR_TO_LINKADDR if linkAddr is read.


Definition at line 1520 of file platform/emlib/inc/em_ldma.h

LDMA_DESCRIPTOR_LINKABS_M2M_BYTE#

#define LDMA_DESCRIPTOR_LINKABS_M2M_BYTE
Value:
{ \
.xfer = \
{ \
.structType = ldmaCtrlStructTypeXfer, \
.structReq = 1, \
.xferCnt = (count) - 1, \
.byteSwap = 0, \
.blockSize = ldmaCtrlBlockSizeUnit1, \
.doneIfs = 0, \
.reqMode = ldmaCtrlReqModeAll, \
.decLoopCnt = 0, \
.ignoreSrec = 0, \
.srcInc = ldmaCtrlSrcIncOne, \
.size = ldmaCtrlSizeByte, \
.dstInc = ldmaCtrlDstIncOne, \
.srcAddrMode = ldmaCtrlSrcAddrModeAbs, \
.dstAddrMode = ldmaCtrlDstAddrModeAbs, \
.srcAddr = (uint32_t)(src), \
.dstAddr = (uint32_t)(dest), \
.linkMode = ldmaLinkModeAbs, \
.link = 1, \
.linkAddr = 0 /* Must be set runtime ! */ \
} \
}

DMA descriptor initializer for linked memory to memory byte transfer.

Link address must be an absolute address. Note

  • The linkAddr member of the transfer descriptor is not initialized. linkAddr must be initialized by using the proper bits right-shift to get the correct bits from the absolute address. LDMA_DESCRIPTOR_LINKABS_ADDR_TO_LINKADDR macro should be used for that operation: 

    desc.linkAddr = LDMA_DESCRIPTOR_LINKABS_ADDR_TO_LINKADDR(&next_desc);

    The opposite bit shift (left) must be done with LDMA_DESCRIPTOR_LINKABS_ADDR_TO_LINKADDR if linkAddr is read.


Definition at line 1613 of file platform/emlib/inc/em_ldma.h

LDMA_DESCRIPTOR_LINKREL_M2M_WORD#

#define LDMA_DESCRIPTOR_LINKREL_M2M_WORD
Value:
{ \
.xfer = \
{ \
.structType = ldmaCtrlStructTypeXfer, \
.structReq = 1, \
.xferCnt = (count) - 1, \
.byteSwap = 0, \
.blockSize = ldmaCtrlBlockSizeUnit1, \
.doneIfs = 0, \
.reqMode = ldmaCtrlReqModeAll, \
.decLoopCnt = 0, \
.ignoreSrec = 0, \
.srcInc = ldmaCtrlSrcIncOne, \
.size = ldmaCtrlSizeWord, \
.dstInc = ldmaCtrlDstIncOne, \
.srcAddrMode = ldmaCtrlSrcAddrModeAbs, \
.dstAddrMode = ldmaCtrlDstAddrModeAbs, \
.srcAddr = (uint32_t)(src), \
.dstAddr = (uint32_t)(dest), \
.linkMode = ldmaLinkModeRel, \
.link = 1, \
.linkAddr = (linkjmp) * LDMA_DESCRIPTOR_NON_EXTEND_SIZE_WORD \
} \
}

DMA descriptor initializer for linked memory to memory word transfer.

Link address is a relative address. Note

  • The linkAddr member of the transfer descriptor is initialized to 4 (regular descriptor) or 7 (extended descriptor), assuming that the next descriptor immediately follows this descriptor (in memory).


Definition at line 1706 of file platform/emlib/inc/em_ldma.h

LDMA_DESCRIPTOR_LINKREL_M2M_HALF#

#define LDMA_DESCRIPTOR_LINKREL_M2M_HALF
Value:
{ \
.xfer = \
{ \
.structType = ldmaCtrlStructTypeXfer, \
.structReq = 1, \
.xferCnt = (count) - 1, \
.byteSwap = 0, \
.blockSize = ldmaCtrlBlockSizeUnit1, \
.doneIfs = 0, \
.reqMode = ldmaCtrlReqModeAll, \
.decLoopCnt = 0, \
.ignoreSrec = 0, \
.srcInc = ldmaCtrlSrcIncOne, \
.size = ldmaCtrlSizeHalf, \
.dstInc = ldmaCtrlDstIncOne, \
.srcAddrMode = ldmaCtrlSrcAddrModeAbs, \
.dstAddrMode = ldmaCtrlDstAddrModeAbs, \
.srcAddr = (uint32_t)(src), \
.dstAddr = (uint32_t)(dest), \
.linkMode = ldmaLinkModeRel, \
.link = 1, \
.linkAddr = (linkjmp) * LDMA_DESCRIPTOR_NON_EXTEND_SIZE_WORD \
} \
}

DMA descriptor initializer for linked memory to memory half-word transfer.

Link address is a relative address. Note

  • The linkAddr member of the transfer descriptor is initialized to 4 (regular descriptor) or 7 (extended descriptor), assuming that the next descriptor immediately follows this descriptor (in memory).


Definition at line 1799 of file platform/emlib/inc/em_ldma.h

LDMA_DESCRIPTOR_LINKREL_M2M_BYTE#

#define LDMA_DESCRIPTOR_LINKREL_M2M_BYTE
Value:
{ \
.xfer = \
{ \
.structType = ldmaCtrlStructTypeXfer, \
.structReq = 1, \
.xferCnt = (count) - 1, \
.byteSwap = 0, \
.blockSize = ldmaCtrlBlockSizeUnit1, \
.doneIfs = 0, \
.reqMode = ldmaCtrlReqModeAll, \
.decLoopCnt = 0, \
.ignoreSrec = 0, \
.srcInc = ldmaCtrlSrcIncOne, \
.size = ldmaCtrlSizeByte, \
.dstInc = ldmaCtrlDstIncOne, \
.srcAddrMode = ldmaCtrlSrcAddrModeAbs, \
.dstAddrMode = ldmaCtrlDstAddrModeAbs, \
.srcAddr = (uint32_t)(src), \
.dstAddr = (uint32_t)(dest), \
.linkMode = ldmaLinkModeRel, \
.link = 1, \
.linkAddr = (linkjmp) * LDMA_DESCRIPTOR_NON_EXTEND_SIZE_WORD \
} \
}

DMA descriptor initializer for linked memory to memory byte transfer.

Link address is a relative address. Note

  • The linkAddr member of the transfer descriptor is initialized to 4 (regular descriptor) or 7 (extended descriptor), assuming that the next descriptor immediately follows this descriptor (in memory).


Definition at line 1892 of file platform/emlib/inc/em_ldma.h

LDMA_DESCRIPTOR_SINGLE_P2M_BYTE#

#define LDMA_DESCRIPTOR_SINGLE_P2M_BYTE
Value:
{ \
.xfer = \
{ \
.structType = ldmaCtrlStructTypeXfer, \
.structReq = 0, \
.xferCnt = (count) - 1, \
.byteSwap = 0, \
.blockSize = ldmaCtrlBlockSizeUnit1, \
.doneIfs = 1, \
.reqMode = ldmaCtrlReqModeBlock, \
.decLoopCnt = 0, \
.ignoreSrec = 0, \
.srcInc = ldmaCtrlSrcIncNone, \
.size = ldmaCtrlSizeByte, \
.dstInc = ldmaCtrlDstIncOne, \
.srcAddrMode = ldmaCtrlSrcAddrModeAbs, \
.dstAddrMode = ldmaCtrlDstAddrModeAbs, \
.srcAddr = (uint32_t)(src), \
.dstAddr = (uint32_t)(dest), \
.linkMode = 0, \
.link = 0, \
.linkAddr = 0 \
} \
}

DMA descriptor initializer for byte transfers from a peripheral to memory.


Definition at line 1974 of file platform/emlib/inc/em_ldma.h

LDMA_DESCRIPTOR_SINGLE_P2P_BYTE#

#define LDMA_DESCRIPTOR_SINGLE_P2P_BYTE
Value:
{ \
.xfer = \
{ \
.structType = ldmaCtrlStructTypeXfer, \
.structReq = 0, \
.xferCnt = (count) - 1, \
.byteSwap = 0, \
.blockSize = ldmaCtrlBlockSizeUnit1, \
.doneIfs = 1, \
.reqMode = ldmaCtrlReqModeBlock, \
.decLoopCnt = 0, \
.ignoreSrec = 0, \
.srcInc = ldmaCtrlSrcIncNone, \
.size = ldmaCtrlSizeByte, \
.dstInc = ldmaCtrlDstIncNone, \
.srcAddrMode = ldmaCtrlSrcAddrModeAbs, \
.dstAddrMode = ldmaCtrlDstAddrModeAbs, \
.srcAddr = (uint32_t)(src), \
.dstAddr = (uint32_t)(dest), \
.linkMode = 0, \
.link = 0, \
.linkAddr = 0 \
} \
}

DMA descriptor initializer for byte transfers from a peripheral to a peripheral.


Definition at line 2045 of file platform/emlib/inc/em_ldma.h

LDMA_DESCRIPTOR_SINGLE_M2P_BYTE#

#define LDMA_DESCRIPTOR_SINGLE_M2P_BYTE
Value:
{ \
.xfer = \
{ \
.structType = ldmaCtrlStructTypeXfer, \
.structReq = 0, \
.xferCnt = (count) - 1, \
.byteSwap = 0, \
.blockSize = ldmaCtrlBlockSizeUnit1, \
.doneIfs = 1, \
.reqMode = ldmaCtrlReqModeBlock, \
.decLoopCnt = 0, \
.ignoreSrec = 0, \
.srcInc = ldmaCtrlSrcIncOne, \
.size = ldmaCtrlSizeByte, \
.dstInc = ldmaCtrlDstIncNone, \
.srcAddrMode = ldmaCtrlSrcAddrModeAbs, \
.dstAddrMode = ldmaCtrlDstAddrModeAbs, \
.srcAddr = (uint32_t)(src), \
.dstAddr = (uint32_t)(dest), \
.linkMode = 0, \
.link = 0, \
.linkAddr = 0 \
} \
}

DMA descriptor initializer for byte transfers from memory to a peripheral.


Definition at line 2078 of file platform/emlib/inc/em_ldma.h

LDMA_DESCRIPTOR_LINKREL_P2M_BYTE#

#define LDMA_DESCRIPTOR_LINKREL_P2M_BYTE
Value:
{ \
.xfer = \
{ \
.structType = ldmaCtrlStructTypeXfer, \
.structReq = 0, \
.xferCnt = (count) - 1, \
.byteSwap = 0, \
.blockSize = ldmaCtrlBlockSizeUnit1, \
.doneIfs = 1, \
.reqMode = ldmaCtrlReqModeBlock, \
.decLoopCnt = 0, \
.ignoreSrec = 0, \
.srcInc = ldmaCtrlSrcIncNone, \
.size = ldmaCtrlSizeByte, \
.dstInc = ldmaCtrlDstIncOne, \
.srcAddrMode = ldmaCtrlSrcAddrModeAbs, \
.dstAddrMode = ldmaCtrlDstAddrModeAbs, \
.srcAddr = (uint32_t)(src), \
.dstAddr = (uint32_t)(dest), \
.linkMode = ldmaLinkModeRel, \
.link = 1, \
.linkAddr = (linkjmp) * LDMA_DESCRIPTOR_NON_EXTEND_SIZE_WORD \
} \
}

DMA descriptor initializer for byte transfers from a peripheral to memory.


Definition at line 2158 of file platform/emlib/inc/em_ldma.h

LDMA_DESCRIPTOR_LINKREL_P2M_WORD#

#define LDMA_DESCRIPTOR_LINKREL_P2M_WORD
Value:
{ \
.xfer = \
{ \
.structType = ldmaCtrlStructTypeXfer, \
.structReq = 0, \
.xferCnt = (count) - 1, \
.byteSwap = 0, \
.blockSize = ldmaCtrlBlockSizeUnit1, \
.doneIfs = 1, \
.reqMode = ldmaCtrlReqModeBlock, \
.decLoopCnt = 0, \
.ignoreSrec = 0, \
.srcInc = ldmaCtrlSrcIncNone, \
.size = ldmaCtrlSizeWord, \
.dstInc = ldmaCtrlDstIncOne, \
.srcAddrMode = ldmaCtrlSrcAddrModeAbs, \
.dstAddrMode = ldmaCtrlDstAddrModeAbs, \
.srcAddr = (uint32_t)(src), \
.dstAddr = (uint32_t)(dest), \
.linkMode = ldmaLinkModeRel, \
.link = 1, \
.linkAddr = (linkjmp) * LDMA_DESCRIPTOR_NON_EXTEND_SIZE_WORD \
} \
}

DMA descriptor initializer for word transfers from a peripheral to memory.


Definition at line 2239 of file platform/emlib/inc/em_ldma.h

LDMA_DESCRIPTOR_LINKREL_M2P_BYTE#

#define LDMA_DESCRIPTOR_LINKREL_M2P_BYTE
Value:
{ \
.xfer = \
{ \
.structType = ldmaCtrlStructTypeXfer, \
.structReq = 0, \
.xferCnt = (count) - 1, \
.byteSwap = 0, \
.blockSize = ldmaCtrlBlockSizeUnit1, \
.doneIfs = 1, \
.reqMode = ldmaCtrlReqModeBlock, \
.decLoopCnt = 0, \
.ignoreSrec = 0, \
.srcInc = ldmaCtrlSrcIncOne, \
.size = ldmaCtrlSizeByte, \
.dstInc = ldmaCtrlDstIncNone, \
.srcAddrMode = ldmaCtrlSrcAddrModeAbs, \
.dstAddrMode = ldmaCtrlDstAddrModeAbs, \
.srcAddr = (uint32_t)(src), \
.dstAddr = (uint32_t)(dest), \
.linkMode = ldmaLinkModeRel, \
.link = 1, \
.linkAddr = (linkjmp) * LDMA_DESCRIPTOR_NON_EXTEND_SIZE_WORD \
} \
}

DMA descriptor initializer for byte transfers from memory to a peripheral.


Definition at line 2320 of file platform/emlib/inc/em_ldma.h

LDMA_DESCRIPTOR_SINGLE_WRITE#

#define LDMA_DESCRIPTOR_SINGLE_WRITE
Value:
{ \
.wri = \
{ \
.structType = ldmaCtrlStructTypeWrite, \
.structReq = 1, \
.xferCnt = 0, \
.byteSwap = 0, \
.blockSize = 0, \
.doneIfs = 1, \
.reqMode = 0, \
.decLoopCnt = 0, \
.ignoreSrec = 0, \
.srcInc = 0, \
.size = 0, \
.dstInc = 0, \
.srcAddrMode = 0, \
.dstAddrMode = 0, \
.immVal = (value), \
.dstAddr = (uint32_t)(address), \
.linkMode = 0, \
.link = 0, \
.linkAddr = 0 \
} \
}

DMA descriptor initializer for Immediate WRITE transfer.


Definition at line 2399 of file platform/emlib/inc/em_ldma.h

LDMA_DESCRIPTOR_LINKABS_WRITE#

#define LDMA_DESCRIPTOR_LINKABS_WRITE
Value:
{ \
.wri = \
{ \
.structType = ldmaCtrlStructTypeWrite, \
.structReq = 1, \
.xferCnt = 0, \
.byteSwap = 0, \
.blockSize = 0, \
.doneIfs = 0, \
.reqMode = 0, \
.decLoopCnt = 0, \
.ignoreSrec = 0, \
.srcInc = 0, \
.size = 0, \
.dstInc = 0, \
.srcAddrMode = 0, \
.dstAddrMode = 0, \
.immVal = (value), \
.dstAddr = (uint32_t)(address), \
.linkMode = ldmaLinkModeAbs, \
.link = 1, \
.linkAddr = 0 /* Must be set runtime ! */ \
} \
}

DMA descriptor initializer for Immediate WRITE transfer.

Link address must be an absolute address. Note

  • The linkAddr member of the transfer descriptor is not initialized. linkAddr must be initialized by using the proper bits right-shift to get the correct bits from the absolute address. LDMA_DESCRIPTOR_LINKABS_ADDR_TO_LINKADDR should be used for that operation: 

    desc.linkAddr = LDMA_DESCRIPTOR_LINKABS_ADDR_TO_LINKADDR(&next_desc);

    The opposite bit shift (left) must be done with LDMA_DESCRIPTOR_LINKABS_ADDR_TO_LINKADDR if linkAddr is read.


Definition at line 2442 of file platform/emlib/inc/em_ldma.h

LDMA_DESCRIPTOR_LINKREL_WRITE#

#define LDMA_DESCRIPTOR_LINKREL_WRITE
Value:
{ \
.wri = \
{ \
.structType = ldmaCtrlStructTypeWrite, \
.structReq = 1, \
.xferCnt = 0, \
.byteSwap = 0, \
.blockSize = 0, \
.doneIfs = 0, \
.reqMode = 0, \
.decLoopCnt = 0, \
.ignoreSrec = 0, \
.srcInc = 0, \
.size = 0, \
.dstInc = 0, \
.srcAddrMode = 0, \
.dstAddrMode = 0, \
.immVal = (value), \
.dstAddr = (uint32_t)(address), \
.linkMode = ldmaLinkModeRel, \
.link = 1, \
.linkAddr = (linkjmp) * LDMA_DESCRIPTOR_NON_EXTEND_SIZE_WORD \
} \
}

DMA descriptor initializer for Immediate WRITE transfer.


Definition at line 2479 of file platform/emlib/inc/em_ldma.h

LDMA_DESCRIPTOR_SINGLE_SYNC#

#define LDMA_DESCRIPTOR_SINGLE_SYNC
Value:
{ \
.sync = \
{ \
.structType = ldmaCtrlStructTypeSync, \
.structReq = 1, \
.xferCnt = 0, \
.byteSwap = 0, \
.blockSize = 0, \
.doneIfs = 1, \
.reqMode = 0, \
.decLoopCnt = 0, \
.ignoreSrec = 0, \
.srcInc = 0, \
.size = 0, \
.dstInc = 0, \
.srcAddrMode = 0, \
.dstAddrMode = 0, \
.syncSet = (set), \
.syncClr = (clr), \
.matchVal = (matchValue), \
.matchEn = (matchEnable), \
.linkMode = 0, \
.link = 0, \
.linkAddr = 0 \
} \
}

DMA descriptor initializer for SYNC transfer.


Definition at line 2513 of file platform/emlib/inc/em_ldma.h

LDMA_DESCRIPTOR_LINKABS_SYNC#

#define LDMA_DESCRIPTOR_LINKABS_SYNC
Value:
{ \
.sync = \
{ \
.structType = ldmaCtrlStructTypeSync, \
.structReq = 1, \
.xferCnt = 0, \
.byteSwap = 0, \
.blockSize = 0, \
.doneIfs = 0, \
.reqMode = 0, \
.decLoopCnt = 0, \
.ignoreSrec = 0, \
.srcInc = 0, \
.size = 0, \
.dstInc = 0, \
.srcAddrMode = 0, \
.dstAddrMode = 0, \
.syncSet = (set), \
.syncClr = (clr), \
.matchVal = (matchValue), \
.matchEn = (matchEnable), \
.linkMode = ldmaLinkModeAbs, \
.link = 1, \
.linkAddr = 0 /* Must be set runtime ! */ \
} \
}

DMA descriptor initializer for SYNC transfer.

Link address must be an absolute address. Note

  • The linkAddr member of the transfer descriptor is not initialized. linkAddr must be initialized by using the proper bits right-shift to get the correct bits from the absolute address. LDMA_DESCRIPTOR_LINKABS_ADDR_TO_LINKADDR should be used for that operation: 

    desc.linkAddr = LDMA_DESCRIPTOR_LINKABS_ADDR_TO_LINKADDR(&next_desc);

    The opposite bit shift (left) must be done with LDMA_DESCRIPTOR_LINKABS_ADDR_TO_LINKADDR if linkAddr is read.


Definition at line 2560 of file platform/emlib/inc/em_ldma.h

LDMA_DESCRIPTOR_LINKREL_SYNC#

#define LDMA_DESCRIPTOR_LINKREL_SYNC
Value:
{ \
.sync = \
{ \
.structType = ldmaCtrlStructTypeSync, \
.structReq = 1, \
.xferCnt = 0, \
.byteSwap = 0, \
.blockSize = 0, \
.doneIfs = 0, \
.reqMode = 0, \
.decLoopCnt = 0, \
.ignoreSrec = 0, \
.srcInc = 0, \
.size = 0, \
.dstInc = 0, \
.srcAddrMode = 0, \
.dstAddrMode = 0, \
.syncSet = (set), \
.syncClr = (clr), \
.matchVal = (matchValue), \
.matchEn = (matchEnable), \
.linkMode = ldmaLinkModeRel, \
.link = 1, \
.linkAddr = (linkjmp) * LDMA_DESCRIPTOR_NON_EXTEND_SIZE_WORD \
} \
}

DMA descriptor initializer for SYNC transfer.


Definition at line 2601 of file platform/emlib/inc/em_ldma.h