LDMA - Linked DMA#

Linked Direct Memory Access (LDMA) Peripheral API.


Introduction#

LDMA API functions provide full support for the LDMA peripheral.

LDMA supports these LDMA transfer types:

  • Memory to memory.

  • Memory to peripheral.

  • Peripheral to memory.

  • Peripheral to peripheral.

  • Constant value to memory.

LDMA supports linked lists of LDMA descriptors allowing:

  • Circular and ping-pong buffer transfers.

  • Scatter-gather transfers.

  • Looped transfers.

LDMA has some advanced features:

  • Intra-channel synchronization (SYNC), allowing hardware events to pause and restart a LDMA sequence.

  • Immediate-write (WRI), allowing LDMA to write a constant anywhere in the memory map.

  • Complex flow control allowing if-else constructs.

Basic understanding of LDMA controller is assumed. Please refer to the reference manual for further details. The LDMA examples described in the reference manual are particularly helpful in understanding LDMA operations.

In order to use the LDMA controller, the initialization function sl_hal_ldma_init() must have been executed once (normally during system initialization).

LDMA transfers are initialized by a call to sl_hal_ldma_init_transfer(), transfer properties are controlled by the contents of sl_hal_ldma_transfer_init_t and sl_hal_ldma_descriptor_t structure parameters. The LDMA transfers can then be initiated by calling sl_hal_ldma_start_transfer(). The sl_hal_ldma_descriptor_t structure parameter may be a pointer to an array of descriptors, descriptors in array should be linked together as needed.

Transfer and descriptor initialization macros are provided for the most common transfer types. Due to the flexibility of LDMA peripheral, only a small subset of all possible initializer macros are provided, users should create new ones when needed.


Example#

A simple memory to memory transfer:

{
  // Enable bus clock.
  sl_clock_manager_enable_bus_clock(SL_BUS_CLOCK_LDMA0);

  // Two buffers used in the memory-to-memory transfers.
  static volatile uint32_t src[4];
  static volatile uint32_t dst[4];

  static const sl_hal_ldma_transfer_init_t transferCfg = SL_HAL_LDMA_TRANSFER_CFG_MEMORY();
  static const sl_hal_ldma_descriptor_t desc = SL_HAL_LDMA_DESCRIPTOR_SINGLE_M2M(SL_HAL_LDMA_CTRL_SIZE_WORD, src, dst, 4);

  // Initialize the LDMA with default values.
  sl_hal_ldma_init_t initCfg = SL_HAL_LDMA_INIT_DEFAULT;
  sl_hal_ldma_init(LDMA0, &initCfg);

  // Start the memory transfer.
  uint8_t channel = 0;
  sl_hal_ldma_init_transfer(LDMA0, channel, &transferCfg, &desc);
  sl_hal_ldma_start_transfer(LDMA0, channel);

   while (!sl_hal_ldma_transfer_is_done(LDMA0, channel)) {
     // Wait until the transfer is over.
   }
}

A linked list of three memory-to-memory transfers:

{
  // Enable bus clock.
  sl_clock_manager_enable_bus_clock(SL_BUS_CLOCK_LDMA0);

  // Two buffers used in the memory-to-memory transfers.
  static volatile uint32_t src[12];
  static volatile uint32_t dst[12];

  // A transfer consisting of 3 descriptors linked together and each descriptor
  // transfers 4 words from the source to the destination.
  static const sl_hal_ldma_transfer_init_t transferCfg = SL_HAL_LDMA_TRANSFER_CFG_MEMORY();
  static const sl_hal_ldma_descriptor_t descList[] =
  {
    SL_HAL_LDMA_DESCRIPTOR_LINKREL_M2M(SL_HAL_LDMA_CTRL_SIZE_WORD, src, dst, 4, 1),
    SL_HAL_LDMA_DESCRIPTOR_LINKREL_M2M(SL_HAL_LDMA_CTRL_SIZE_WORD, src + 4, dst + 4, 4, 1),
    SL_HAL_LDMA_DESCRIPTOR_SINGLE_M2M(SL_HAL_LDMA_CTRL_SIZE_WORD, src + 8, dst + 8, 4)
  };

  // Initialize the LDMA with default values.
  sl_hal_ldma_init_t initCfg = SL_HAL_LDMA_INIT_DEFAULT;
  sl_hal_ldma_init(LDMA0, &initCfg);

  // Start the linked memory transfer.
  uint8_t channel = 0;
  sl_hal_ldma_init_transfer(LDMA0, channel, &transferCfg, descList);
  sl_hal_ldma_start_transfer(LDMA0, channel);

   while (!sl_hal_ldma_transfer_is_done(LDMA0, channel)) {
     // Wait until the transfer is over.
   }
}

LDMA from serial port peripheral to memory:

{
  // Enable bus clock.
  sl_clock_manager_enable_bus_clock(SL_BUS_CLOCK_LDMA0);

  // Two buffer used in the transfer from EUSART0.
  static volatile uint8_t dst[4];

  // The LDMA transfer should be triggered by the EUSART0 RX data available signal.
  static const sl_hal_ldma_transfer_init_t eusart0RxTransfer =
  SL_HAL_LDMA_TRANSFER_CFG_PERIPHERAL(SL_HAL_LDMA_PERIPHERAL_SIGNAL_EUSART0_RXFL);

  // Transfer 4 bytes from the EUSART0 RX FIFO to memory.
  static const sl_hal_ldma_descriptor_t eusart0RxDesc =
  SL_HAL_LDMA_DESCRIPTOR_SINGLE_P2M(SL_HAL_LDMA_CTRL_SIZE_BYTE,  // Transfer size
                                  &EUSART0->RXDATA,              // Peripheral address
                                  dst,                           // Destination (SRAM)
                                  4);                            // Number of byte transfers

  // Initialize the LDMA with default values.
  sl_hal_ldma_init_t initCfg = SL_HAL_LDMA_INIT_DEFAULT;
  sl_hal_ldma_init(LDMA0, &initCfg);

  // Start the peripheral transfer which is triggered by the EUSART0
  // peripheral RXFL signal.
  uint8_t channel = 0;
  sl_hal_ldma_init_transfer(LDMA0, channel, &eusart0RxTransfer, &eusart0RxDesc);
  sl_hal_ldma_start_transfer(LDMA0, channel);

   while (!sl_hal_ldma_transfer_is_done(LDMA0, channel)) {
     // Wait until the transfer is over.
   }
}

Ping-pong LDMA from serial port peripheral to memory:

{
  // Enable bus clock.
  sl_clock_manager_enable_bus_clock(SL_BUS_CLOCK_LDMA0);

  // Two buffers used in the ping-pong transfer from EUSART0.
  static volatile uint8_t buffer0[5];
  static volatile uint8_t buffer1[5];

  // The LDMA transfer should be triggered by the EUSART0 RX data available signal.
  static const sl_hal_ldma_transfer_init_t eusart0RxTransfer =
  SL_HAL_LDMA_TRANSFER_CFG_PERIPHERAL(SL_HAL_LDMA_PERIPHERAL_SIGNAL_EUSART0_RXFL);

  // Both descriptors transfer 5 bytes from the EUSART0 RX data register into
  // one of the buffers. Note that the first descriptor uses a relative address
  // of 1 to link to the next descriptor, while the last descriptor uses a
  // relative address of -1 to link to the first descriptor.
  static const sl_hal_ldma_descriptor_t rxLoopDesc[] =
  {
    SL_HAL_LDMA_DESCRIPTOR_LINKREL_P2M(SL_HAL_LDMA_CTRL_SIZE_BYTE, &EUSART0->RXDATA, buffer0, 5, 1),
    SL_HAL_LDMA_DESCRIPTOR_LINKREL_P2M(SL_HAL_LDMA_CTRL_SIZE_BYTE, &EUSART0->RXDATA, buffer1, 5, -1)
  };

  // Initialize the LDMA with default values.
  sl_hal_ldma_init_t initCfg = SL_HAL_LDMA_INIT_DEFAULT;
  sl_hal_ldma_init(LDMA0, &initCfg);

  // Start the peripheral transfer which is triggered by the EUSART0
  // peripheral RXFL signal.
  uint8_t channel = 0;
  sl_hal_ldma_init_transfer(LDMA0, channel, &eusart0RxTransfer, rxLoopDesc);
  sl_hal_ldma_start_transfer(LDMA0, channel);
}

Note

  • LDMA peripheral module does not implement LDMA interrupt handler. A template for an LDMA IRQ handler is included here as an example. For series 2, a single IRQ handler is shared by all channels.

    void LDMA_IRQHandler(void)
    {
      //Get all pending and enabled interrupts.
      uint32_t pending = sl_hal_ldma_get_enabled_pending_interrupts(LDMA);
    
      while (pending & LDMA_IF_ERROR) {
        // Loop here on an LDMA error to enable debugging.
      }
    
      // Iterate over all LDMA channels.
      for (uint32_t channel = 0; channel < DMA_CHAN_COUNT; channel++) {
        uint32_t mask = 0x1 << channel;
        if (pending & mask) {
          // Clear interrupt flag.
          sl_hal_ldma_clear_interrupts(LDMA, mask);
    
          // Do more stuff here, execute callbacks, etc.
        }
      }
    }
    
  • For series 3, every channel has its own IRQ handler. Here is an example handler for channel 0.

    void LDMA0_CHNL0_IRQHandler(void)
    {
      // Get all pending and enabled interrupts.
      uint32_t pending = sl_hal_ldma_get_enabled_pending_interrupts(LDMA0);
    
      while (pending & LDMA_IF_ERROR0) {
        // Loop here on an LDMA error to enable debugging.
      }
    
      if (pending & LDMA_IF_DONE0) {
        // Clear interrupt flag.
        sl_hal_ldma_clear_interrupts(LDMA0, LDMA_IF_DONE0);
    
        // Do more stuff here, execute callbacks, etc.
      }
    }
    

Modules#

sl_hal_ldma_descriptor_t

sl_hal_ldma_init_t

sl_hal_ldma_transfer_init_t

Enumerations#

enum
SL_HAL_LDMA_CTRL_BLOCK_SIZE_UNIT_1 = _LDMA_CH_CTRL_BLOCKSIZE_UNIT1
SL_HAL_LDMA_CTRL_BLOCK_SIZE_UNIT_2 = _LDMA_CH_CTRL_BLOCKSIZE_UNIT2
SL_HAL_LDMA_CTRL_BLOCK_SIZE_UNIT_3 = _LDMA_CH_CTRL_BLOCKSIZE_UNIT3
SL_HAL_LDMA_CTRL_BLOCK_SIZE_UNIT_4 = _LDMA_CH_CTRL_BLOCKSIZE_UNIT4
SL_HAL_LDMA_CTRL_BLOCK_SIZE_UNIT_6 = _LDMA_CH_CTRL_BLOCKSIZE_UNIT6
SL_HAL_LDMA_CTRL_BLOCK_SIZE_UNIT_8 = _LDMA_CH_CTRL_BLOCKSIZE_UNIT8
SL_HAL_LDMA_CTRL_BLOCK_SIZE_UNIT_16 = _LDMA_CH_CTRL_BLOCKSIZE_UNIT16
SL_HAL_LDMA_CTRL_BLOCK_SIZE_UNIT_32 = _LDMA_CH_CTRL_BLOCKSIZE_UNIT32
SL_HAL_LDMA_CTRL_BLOCK_SIZE_UNIT_64 = _LDMA_CH_CTRL_BLOCKSIZE_UNIT64
SL_HAL_LDMA_CTRL_BLOCK_SIZE_UNIT_128 = _LDMA_CH_CTRL_BLOCKSIZE_UNIT128
SL_HAL_LDMA_CTRL_BLOCK_SIZE_UNIT_256 = _LDMA_CH_CTRL_BLOCKSIZE_UNIT256
SL_HAL_LDMA_CTRL_BLOCK_SIZE_UNIT_512 = _LDMA_CH_CTRL_BLOCKSIZE_UNIT512
SL_HAL_LDMA_CTRL_BLOCK_SIZE_UNIT_1024 = _LDMA_CH_CTRL_BLOCKSIZE_UNIT1024
SL_HAL_LDMA_CTRL_BLOCK_SIZE_ALL = _LDMA_CH_CTRL_BLOCKSIZE_ALL
}

Controls the number of unit data transfers per arbitration cycle, providing a means to balance LDMA channels' load on the controller.

enum
SL_HAL_LDMA_CTRL_STRUCT_TYPE_XFER = _LDMA_CH_CTRL_STRUCTTYPE_TRANSFER
SL_HAL_LDMA_CTRL_STRUCT_TYPE_SYNC = _LDMA_CH_CTRL_STRUCTTYPE_SYNCHRONIZE
SL_HAL_LDMA_CTRL_STRUCT_TYPE_WRITE = _LDMA_CH_CTRL_STRUCTTYPE_WRITE
}

LDMA structure type.

enum
SL_HAL_LDMA_CTRL_REQ_MODE_BLOCK = _LDMA_CH_CTRL_REQMODE_BLOCK
SL_HAL_LDMA_CTRL_REQ_MODE_ALL = _LDMA_CH_CTRL_REQMODE_ALL
}

LDMA transfer block or cycle selector.

enum
SL_HAL_LDMA_CTRL_SRC_INC_ONE = _LDMA_CH_CTRL_SRCINC_ONE
SL_HAL_LDMA_CTRL_SRC_INC_TWO = _LDMA_CH_CTRL_SRCINC_TWO
SL_HAL_LDMA_CTRL_SRC_INC_FOUR = _LDMA_CH_CTRL_SRCINC_FOUR
SL_HAL_LDMA_CTRL_SRC_INC_NONE = _LDMA_CH_CTRL_SRCINC_NONE
}

Source address increment unit size.

enum
SL_HAL_LDMA_CTRL_SIZE_BYTE = _LDMA_CH_CTRL_SIZE_BYTE
SL_HAL_LDMA_CTRL_SIZE_HALF = _LDMA_CH_CTRL_SIZE_HALFWORD
SL_HAL_LDMA_CTRL_SIZE_WORD = _LDMA_CH_CTRL_SIZE_WORD
}

LDMA transfer unit size.

enum
SL_HAL_LDMA_CTRL_DST_INC_ONE = _LDMA_CH_CTRL_DSTINC_ONE
SL_HAL_LDMA_CTRL_DST_INC_TWO = _LDMA_CH_CTRL_DSTINC_TWO
SL_HAL_LDMA_CTRL_DST_INC_FOUR = _LDMA_CH_CTRL_DSTINC_FOUR
SL_HAL_LDMA_CTRL_DST_INC_NONE = _LDMA_CH_CTRL_DSTINC_NONE
}

Destination address increment unit size.

enum
SL_HAL_LDMA_CTRL_SRC_ADDR_MODE_ABS = _LDMA_CH_CTRL_SRCMODE_ABSOLUTE
SL_HAL_LDMA_CTRL_SRC_ADDR_MODE_REL = _LDMA_CH_CTRL_SRCMODE_RELATIVE
}

Source addressing mode.

enum
SL_HAL_LDMA_CTRL_DST_ADDR_MODE_ABS = _LDMA_CH_CTRL_DSTMODE_ABSOLUTE
SL_HAL_LDMA_CTRL_DST_ADDR_MODE_REL = _LDMA_CH_CTRL_DSTMODE_RELATIVE
}

Destination addressing mode.

enum
SL_HAL_LDMA_LINK_MODE_ABS = _LDMA_CH_LINK_LINKMODE_ABSOLUTE
SL_HAL_LDMA_LINK_MODE_REL = _LDMA_CH_LINK_LINKMODE_RELATIVE
}

LDMA link load address mode.

enum
SL_HAL_LDMA_CFG_ARBSLOTS_ONE = _LDMA_CH_CFG_ARBSLOTS_ONE
SL_HAL_LDMA_CFG_ARBSLOTS_TWO = _LDMA_CH_CFG_ARBSLOTS_TWO
SL_HAL_LDMA_CFG_ARBSLOTS_FOUR = _LDMA_CH_CFG_ARBSLOTS_FOUR
SL_HAL_LDMA_CFG_ARBSLOTS_EIGHT = _LDMA_CH_CFG_ARBSLOTS_EIGHT
}

Insert extra arbitration slots to increase channel arbitration priority.

enum
SL_HAL_LDMA_CFG_SRC_INC_SIGN_POS = _LDMA_CH_CFG_SRCINCSIGN_POSITIVE
SL_HAL_LDMA_CFG_SRC_INC_SIGN_NEG = _LDMA_CH_CFG_SRCINCSIGN_NEGATIVE
}

Source address increment sign.

enum
SL_HAL_LDMA_CFG_DST_INC_SIGN_POS = _LDMA_CH_CFG_DSTINCSIGN_POSITIVE
SL_HAL_LDMA_CFG_DST_INC_SIGN_NEG = _LDMA_CH_CFG_DSTINCSIGN_NEGATIVE
}

Destination address increment sign.

enum
SL_HAL_LDMA_PERIPHERAL_SIGNAL_NONE = LDMAXBAR_CH_REQSEL_SOURCESEL_NONE
SL_HAL_LDMA_PERIPHERAL_SIGNAL_LDMAXBAR_PRSREQ0 = LDMAXBAR_CH_REQSEL_SIGSEL_LDMAXBARPRSREQ0 | LDMAXBAR_CH_REQSEL_SOURCESEL_LDMAXBAR
SL_HAL_LDMA_PERIPHERAL_SIGNAL_LDMAXBAR_PRSREQ1 = LDMAXBAR_CH_REQSEL_SIGSEL_LDMAXBARPRSREQ1 | LDMAXBAR_CH_REQSEL_SOURCESEL_LDMAXBAR
SL_HAL_LDMA_PERIPHERAL_SIGNAL_TIMER0_CC0 = LDMAXBAR_CH_REQSEL_SIGSEL_TIMER0CC0 | LDMAXBAR_CH_REQSEL_SOURCESEL_TIMER0
SL_HAL_LDMA_PERIPHERAL_SIGNAL_TIMER0_CC1 = LDMAXBAR_CH_REQSEL_SIGSEL_TIMER0CC1 | LDMAXBAR_CH_REQSEL_SOURCESEL_TIMER0
SL_HAL_LDMA_PERIPHERAL_SIGNAL_TIMER0_CC2 = LDMAXBAR_CH_REQSEL_SIGSEL_TIMER0CC2 | LDMAXBAR_CH_REQSEL_SOURCESEL_TIMER0
SL_HAL_LDMA_PERIPHERAL_SIGNAL_TIMER0_UFOF = LDMAXBAR_CH_REQSEL_SIGSEL_TIMER0UFOF | LDMAXBAR_CH_REQSEL_SOURCESEL_TIMER0
SL_HAL_LDMA_PERIPHERAL_SIGNAL_TIMER1_CC0 = LDMAXBAR_CH_REQSEL_SIGSEL_TIMER1CC0 | LDMAXBAR_CH_REQSEL_SOURCESEL_TIMER1
SL_HAL_LDMA_PERIPHERAL_SIGNAL_TIMER1_CC1 = LDMAXBAR_CH_REQSEL_SIGSEL_TIMER1CC1 | LDMAXBAR_CH_REQSEL_SOURCESEL_TIMER1
SL_HAL_LDMA_PERIPHERAL_SIGNAL_TIMER1_CC2 = LDMAXBAR_CH_REQSEL_SIGSEL_TIMER1CC2 | LDMAXBAR_CH_REQSEL_SOURCESEL_TIMER1
SL_HAL_LDMA_PERIPHERAL_SIGNAL_TIMER1_UFOF = LDMAXBAR_CH_REQSEL_SIGSEL_TIMER1UFOF | LDMAXBAR_CH_REQSEL_SOURCESEL_TIMER1
SL_HAL_LDMA_PERIPHERAL_SIGNAL_USART0_RXDATAV = LDMAXBAR_CH_REQSEL_SIGSEL_USART0RXDATAV | LDMAXBAR_CH_REQSEL_SOURCESEL_USART0
SL_HAL_LDMA_PERIPHERAL_SIGNAL_USART0_RXDATAVRIGHT = LDMAXBAR_CH_REQSEL_SIGSEL_USART0RXDATAVRIGHT | LDMAXBAR_CH_REQSEL_SOURCESEL_USART0
SL_HAL_LDMA_PERIPHERAL_SIGNAL_USART0_TXBL = LDMAXBAR_CH_REQSEL_SIGSEL_USART0TXBL | LDMAXBAR_CH_REQSEL_SOURCESEL_USART0
SL_HAL_LDMA_PERIPHERAL_SIGNAL_USART0_TXBLRIGHT = LDMAXBAR_CH_REQSEL_SIGSEL_USART0TXBLRIGHT | LDMAXBAR_CH_REQSEL_SOURCESEL_USART0
SL_HAL_LDMA_PERIPHERAL_SIGNAL_USART0_TXEMPTY = LDMAXBAR_CH_REQSEL_SIGSEL_USART0TXEMPTY | LDMAXBAR_CH_REQSEL_SOURCESEL_USART0
SL_HAL_LDMA_PERIPHERAL_SIGNAL_TIMER2_CC0 = LDMAXBAR_CH_REQSEL_SIGSEL_TIMER2CC0 | LDMAXBAR_CH_REQSEL_SOURCESEL_TIMER2
SL_HAL_LDMA_PERIPHERAL_SIGNAL_TIMER2_CC1 = LDMAXBAR_CH_REQSEL_SIGSEL_TIMER2CC1 | LDMAXBAR_CH_REQSEL_SOURCESEL_TIMER2
SL_HAL_LDMA_PERIPHERAL_SIGNAL_TIMER2_CC2 = LDMAXBAR_CH_REQSEL_SIGSEL_TIMER2CC2 | LDMAXBAR_CH_REQSEL_SOURCESEL_TIMER2
SL_HAL_LDMA_PERIPHERAL_SIGNAL_TIMER2_UFOF = LDMAXBAR_CH_REQSEL_SIGSEL_TIMER2UFOF | LDMAXBAR_CH_REQSEL_SOURCESEL_TIMER2
SL_HAL_LDMA_PERIPHERAL_SIGNAL_TIMER3_CC0 = LDMAXBAR_CH_REQSEL_SIGSEL_TIMER3CC0 | LDMAXBAR_CH_REQSEL_SOURCESEL_TIMER3
SL_HAL_LDMA_PERIPHERAL_SIGNAL_TIMER3_CC1 = LDMAXBAR_CH_REQSEL_SIGSEL_TIMER3CC1 | LDMAXBAR_CH_REQSEL_SOURCESEL_TIMER3
SL_HAL_LDMA_PERIPHERAL_SIGNAL_TIMER3_CC2 = LDMAXBAR_CH_REQSEL_SIGSEL_TIMER3CC2 | LDMAXBAR_CH_REQSEL_SOURCESEL_TIMER3
SL_HAL_LDMA_PERIPHERAL_SIGNAL_TIMER3_UFOF = LDMAXBAR_CH_REQSEL_SIGSEL_TIMER3UFOF | LDMAXBAR_CH_REQSEL_SOURCESEL_TIMER3
SL_HAL_LDMA_PERIPHERAL_SIGNAL_LCD = LDMAXBAR_CH_REQSEL_SIGSEL_LCD | LDMAXBAR_CH_REQSEL_SOURCESEL_LCD
SL_HAL_LDMA_PERIPHERAL_SIGNAL_TIMER4_CC0 = LDMAXBAR_CH_REQSEL_SIGSEL_TIMER4CC0 | LDMAXBAR_CH_REQSEL_SOURCESEL_TIMER4
SL_HAL_LDMA_PERIPHERAL_SIGNAL_TIMER4_CC1 = LDMAXBAR_CH_REQSEL_SIGSEL_TIMER4CC1 | LDMAXBAR_CH_REQSEL_SOURCESEL_TIMER4
SL_HAL_LDMA_PERIPHERAL_SIGNAL_TIMER4_CC2 = LDMAXBAR_CH_REQSEL_SIGSEL_TIMER4CC2 | LDMAXBAR_CH_REQSEL_SOURCESEL_TIMER4
SL_HAL_LDMA_PERIPHERAL_SIGNAL_TIMER4_UFOF = LDMAXBAR_CH_REQSEL_SIGSEL_TIMER4UFOF | LDMAXBAR_CH_REQSEL_SOURCESEL_TIMER4
SL_HAL_LDMA_PERIPHERAL_SIGNAL_VDAC0CH0REQ = LDMAXBAR_CH_REQSEL_SIGSEL_VDAC0CH0_REQ | LDMAXBAR_CH_REQSEL_SOURCESEL_VDAC0
SL_HAL_LDMA_PERIPHERAL_SIGNAL_VDAC0CH1REQ = LDMAXBAR_CH_REQSEL_SIGSEL_VDAC0CH1_REQ | LDMAXBAR_CH_REQSEL_SOURCESEL_VDAC0
SL_HAL_LDMA_PERIPHERAL_SIGNAL_I2C0_RXDATAV = LDMAXBAR_CH_REQSEL_SIGSEL_I2C0RXDATAV | LDMAXBAR_CH_REQSEL_SOURCESEL_I2C0
SL_HAL_LDMA_PERIPHERAL_SIGNAL_I2C0_TXBL = LDMAXBAR_CH_REQSEL_SIGSEL_I2C0TXBL | LDMAXBAR_CH_REQSEL_SOURCESEL_I2C0
SL_HAL_LDMA_PERIPHERAL_SIGNAL_I2C1_RXDATAV = LDMAXBAR_CH_REQSEL_SIGSEL_I2C1RXDATAV | LDMAXBAR_CH_REQSEL_SOURCESEL_I2C1
SL_HAL_LDMA_PERIPHERAL_SIGNAL_I2C1_TXBL = LDMAXBAR_CH_REQSEL_SIGSEL_I2C1TXBL | LDMAXBAR_CH_REQSEL_SOURCESEL_I2C1
SL_HAL_LDMA_PERIPHERAL_SIGNAL_IADC0_IADC_SCAN = LDMAXBAR_CH_REQSEL_SIGSEL_IADC0IADC_SCAN | LDMAXBAR_CH_REQSEL_SOURCESEL_IADC0
SL_HAL_LDMA_PERIPHERAL_SIGNAL_IADC0_IADC_SINGLE = LDMAXBAR_CH_REQSEL_SIGSEL_IADC0IADC_SINGLE | LDMAXBAR_CH_REQSEL_SOURCESEL_IADC0
SL_HAL_LDMA_PERIPHERAL_SIGNAL_MSC_WDATA = LDMAXBAR_CH_REQSEL_SIGSEL_MSCWDATA | LDMAXBAR_CH_REQSEL_SOURCESEL_MSC
SL_HAL_LDMA_PERIPHERAL_SIGNAL_EUSART0_RXFL = LDMAXBAR_CH_REQSEL_SIGSEL_EUSART0RXFL | LDMAXBAR_CH_REQSEL_SOURCESEL_EUSART0
SL_HAL_LDMA_PERIPHERAL_SIGNAL_EUSART0_TXFL = LDMAXBAR_CH_REQSEL_SIGSEL_EUSART0TXFL | LDMAXBAR_CH_REQSEL_SOURCESEL_EUSART0
SL_HAL_LDMA_PERIPHERAL_SIGNAL_EUSART1_RXFL = LDMAXBAR_CH_REQSEL_SIGSEL_EUSART1RXFL | LDMAXBAR_CH_REQSEL_SOURCESEL_EUSART1
SL_HAL_LDMA_PERIPHERAL_SIGNAL_EUSART1_TXFL = LDMAXBAR_CH_REQSEL_SIGSEL_EUSART1TXFL | LDMAXBAR_CH_REQSEL_SOURCESEL_EUSART1
SL_HAL_LDMA_PERIPHERAL_SIGNAL_EUSART2_RXFL = LDMAXBAR_CH_REQSEL_SIGSEL_EUSART2RXFL | LDMAXBAR_CH_REQSEL_SOURCESEL_EUSART2
SL_HAL_LDMA_PERIPHERAL_SIGNAL_EUSART2_TXFL = LDMAXBAR_CH_REQSEL_SIGSEL_EUSART2TXFL | LDMAXBAR_CH_REQSEL_SOURCESEL_EUSART2
SL_HAL_LDMA_PERIPHERAL_SIGNAL_LESENSE_BUFDATAV = LDMAXBAR_CH_REQSEL_SIGSEL_LESENSEFIFO | LDMAXBAR_CH_REQSEL_SOURCESEL_LESENSE
}

Peripherals that can trigger LDMA transfers.

Functions#

void
sl_hal_ldma_init(LDMA_TypeDef *ldma, const sl_hal_ldma_init_t *init)

Initialize an extended LDMA transfer.

void
sl_hal_ldma_init_transfer(LDMA_TypeDef *ldma, uint32_t channel, const sl_hal_ldma_transfer_init_t *transfer_init, const sl_hal_ldma_descriptor_t *descriptor)

Initialize a LDMA transfer.

void
sl_hal_ldma_start_transfer(LDMA_TypeDef *ldma, uint32_t channel)

Start a LDMA transfer.

void
sl_hal_ldma_stop_transfer(LDMA_TypeDef *ldma, uint32_t channel)

Stop a LDMA transfer.

bool
sl_hal_ldma_transfer_is_done(LDMA_TypeDef *ldma, uint32_t channel)

Check if a LDMA transfer has completed.

uint32_t
sl_hal_ldma_transfer_remaining_count(LDMA_TypeDef *ldma, uint32_t channel)

Get the number of items remaining in a transfer.

void
sl_hal_ldma_enable(LDMA_TypeDef *ldma)

Enable LDMA.

void
sl_hal_ldma_enable_channel(LDMA_TypeDef *ldma, uint32_t channel)

Enable LDMA channel.

void
sl_hal_ldma_disable(LDMA_TypeDef *ldma)

Disable LDMA.

void
sl_hal_ldma_disable_channel(LDMA_TypeDef *ldma, uint32_t channel)

Disable LDMA channel.

uint32_t
sl_hal_ldma_get_status(LDMA_TypeDef *ldma)

Gets LDMA STATUS register value.

bool
sl_hal_ldma_channel_is_enabled(LDMA_TypeDef *ldma, uint32_t channel)

Check if a certain channel is enabled.

void
sl_hal_ldma_enable_channel_request(LDMA_TypeDef *ldma, uint32_t channel)

Enable an LDMA channel request.

void
sl_hal_ldma_disable_channel_request(LDMA_TypeDef *ldma, uint32_t channel)

Disable an LDMA channel request.

void
sl_hal_ldma_clear_interrupts(LDMA_TypeDef *ldma, uint32_t flags)

Clear one or more pending LDMA interrupts for LDMA channels 0 to 15.

void
sl_hal_ldma_disable_interrupts(LDMA_TypeDef *ldma, uint32_t flags)

Disable one or more LDMA interrupts for LDMA channels 0 to 15.

void
sl_hal_ldma_enable_interrupts(LDMA_TypeDef *ldma, uint32_t flags)

Enable one or more LDMA interrupts for LDMA channels 0 to 15.

uint32_t

Get pending LDMA interrupt flags for LDMA channels 0 to 15.

void
sl_hal_ldma_set_interrupts(LDMA_TypeDef *ldma, uint32_t flags)

Set one or more pending LDMA interrupts for LDMA channels 0 to 15.

uint32_t

Get enabled and pending LDMA interrupt flags for LDMA channels 0 to 15.

Macros#

#define
SL_HAL_LDMA_DESCRIPTOR_NON_EXTEND_SIZE_WORD 4

Size in words of a non-extended LDMA descriptor.

#define
SL_HAL_LDMA_DESCRIPTOR_EXTEND_SIZE_WORD 7

Size in words of an extended LDMA descriptor.

#define
SL_HAL_LDMA_DESCRIPTOR_MAX_XFER_SIZE ((_LDMA_CH_CTRL_XFERCNT_MASK >> _LDMA_CH_CTRL_XFERCNT_SHIFT) + 1)

Maximum transfer size possible per descriptor.

#define
SL_HAL_LDMA_DESCRIPTOR_LINKABS_ADDR_TO_LINKADDR (addr)

Converts a sl_hal_ldma_descriptor_t pointer to the value suitable to write to the link_addr field of a sl_hal_ldma_descriptor_t.

#define
SL_HAL_LDMA_DESCRIPTOR_LINKABS_LINKADDR_TO_ADDR (link_addr)

Converts a sl_hal_ldma_descriptor_t link_addr field value back to a sl_hal_ldma_descriptor_t pointer.

#define
SL_HAL_LDMA_CFG_BUS_PORT_DEFAULT

Default value for BUS PORT for sl_hal_ldma_transfer_init_t struct initializer.

#define
SL_HAL_LDMA_INIT_DEFAULT undefined

Default LDMA initialization structure.

#define
SL_HAL_LDMA_TRANSFER_CFG_MEMORY ()

Generic LDMA transfer configuration for memory to memory transfers.

#define
SL_HAL_LDMA_TRANSFER_CFG_MEMORY_LOOP (loop_count)

Generic LDMA transfer configuration for looped memory to memory transfers.

#define
SL_HAL_LDMA_TRANSFER_CFG_PERIPHERAL (signal)

Generic LDMA transfer configuration for memory to/from peripheral transfers.

#define
SL_HAL_LDMA_TRANSFER_CFG_PERIPHERAL_LOOP (signal, loop_count)

Generic LDMA transfer configuration for looped memory to/from peripheral transfers.

#define
SL_HAL_LDMA_DESCRIPTOR_SINGLE_M2M (transfer_size, src, dest, count)

LDMA descriptor initializer for single memory to memory transfer.

#define
SL_HAL_LDMA_DESCRIPTOR_SINGLE_P2M (transfer_size, src, dest, count)

LDMA descriptor initializer for single peripheral to memory transfer.

#define
SL_HAL_LDMA_DESCRIPTOR_SINGLE_P2P (transfer_size, src, dest, count)

LDMA descriptor initializer for single peripheral to peripheral transfer.

#define
SL_HAL_LDMA_DESCRIPTOR_SINGLE_M2P (transfer_size, src, dest, count)

LDMA descriptor initializer for single memory to peripheral transfer.

#define
SL_HAL_LDMA_DESCRIPTOR_LINKABS_M2M (transfer_size, src, dest, count)

LDMA descriptor initializer for linked memory to memory transfer.

#define
SL_HAL_LDMA_DESCRIPTOR_LINKABS_P2M (transfer_size, src, dest, count)

LDMA descriptor initializer for linked peripheral to memory transfer.

#define
SL_HAL_LDMA_DESCRIPTOR_LINKABS_M2P (transfer_size, src, dest, count)

LDMA descriptor initializer for linked memory to peripheral word transfer.

#define
SL_HAL_LDMA_DESCRIPTOR_LINKABS_P2P (transfer_size, src, dest, count)

LDMA descriptor initializer for linked peripheral to peripheral word transfer.

#define
SL_HAL_LDMA_DESCRIPTOR_LINKREL_M2M (transfer_size, src, dest, count, link_jump)

LDMA descriptor initializer for linked peripheral to peripheral word transfer.

#define
SL_HAL_LDMA_DESCRIPTOR_LINKREL_P2M (transfer_size, src, dest, count, link_jump)

LDMA descriptor initializer for linked peripheral to memory transfer.

#define
SL_HAL_LDMA_DESCRIPTOR_LINKREL_M2P (transfer_size, src, dest, count, link_jump)

LDMA descriptor initializer for linked memory to peripheral transfer.

#define
SL_HAL_LDMA_DESCRIPTOR_LINKREL_P2P (transfer_size, src, dest, count, link_jump)

LDMA descriptor initializer for linked peripheral to peripheral transfer.

#define
SL_HAL_LDMA_DESCRIPTOR_SINGLE_WRITE (value, address)

LDMA descriptor initializer for Immediate WRITE transfer.

#define
SL_HAL_LDMA_DESCRIPTOR_LINKABS_WRITE (value, address)

LDMA descriptor initializer for Immediate WRITE transfer.

#define
SL_HAL_LDMA_DESCRIPTOR_LINKREL_WRITE (value, address, link_jump)

LDMA descriptor initializer for Immediate WRITE transfer.

#define
SL_HAL_LDMA_DESCRIPTOR_SINGLE_SYNC (set, clr, match_value, match_enable)

LDMA descriptor initializer for SYNC transfer.

#define
SL_HAL_LDMA_DESCRIPTOR_LINKABS_SYNC (set, clr, match_value, match_enable)

LDMA descriptor initializer for SYNC transfer.

#define
SL_HAL_LDMA_DESCRIPTOR_LINKREL_SYNC (set, clr, match_value, match_enable, link_jump)

LDMA descriptor initializer for SYNC transfer.

Enumeration Documentation#

sl_hal_ldma_ctrl_block_size_t#

sl_hal_ldma_ctrl_block_size_t

Controls the number of unit data transfers per arbitration cycle, providing a means to balance LDMA channels' load on the controller.

Enumerator
SL_HAL_LDMA_CTRL_BLOCK_SIZE_UNIT_1

One transfer per arbitration.

SL_HAL_LDMA_CTRL_BLOCK_SIZE_UNIT_2

Two transfers per arbitration.

SL_HAL_LDMA_CTRL_BLOCK_SIZE_UNIT_3

Three transfers per arbitration.

SL_HAL_LDMA_CTRL_BLOCK_SIZE_UNIT_4

Four transfers per arbitration.

SL_HAL_LDMA_CTRL_BLOCK_SIZE_UNIT_6

Six transfers per arbitration.

SL_HAL_LDMA_CTRL_BLOCK_SIZE_UNIT_8

Eight transfers per arbitration.

SL_HAL_LDMA_CTRL_BLOCK_SIZE_UNIT_16

16 transfers per arbitration.

SL_HAL_LDMA_CTRL_BLOCK_SIZE_UNIT_32

32 transfers per arbitration.

SL_HAL_LDMA_CTRL_BLOCK_SIZE_UNIT_64

64 transfers per arbitration.

SL_HAL_LDMA_CTRL_BLOCK_SIZE_UNIT_128

128 transfers per arbitration.

SL_HAL_LDMA_CTRL_BLOCK_SIZE_UNIT_256

256 transfers per arbitration.

SL_HAL_LDMA_CTRL_BLOCK_SIZE_UNIT_512

512 transfers per arbitration.

SL_HAL_LDMA_CTRL_BLOCK_SIZE_UNIT_1024

1024 transfers per arbitration.

SL_HAL_LDMA_CTRL_BLOCK_SIZE_ALL

Lock arbitration during transfer.


sl_hal_ldma_ctrl_struct_type_t#

sl_hal_ldma_ctrl_struct_type_t

LDMA structure type.

Enumerator
SL_HAL_LDMA_CTRL_STRUCT_TYPE_XFER

TRANSFER transfer type.

SL_HAL_LDMA_CTRL_STRUCT_TYPE_SYNC

SYNCHRONIZE transfer type.

SL_HAL_LDMA_CTRL_STRUCT_TYPE_WRITE

WRITE transfer type.


sl_hal_ldma_ctrl_req_mode_t#

sl_hal_ldma_ctrl_req_mode_t

LDMA transfer block or cycle selector.

Enumerator
SL_HAL_LDMA_CTRL_REQ_MODE_BLOCK

Each LDMA request trigger transfer of one block.

SL_HAL_LDMA_CTRL_REQ_MODE_ALL

A LDMA request trigger transfer of a complete cycle.


sl_hal_ldma_ctrl_src_inc_t#

sl_hal_ldma_ctrl_src_inc_t

Source address increment unit size.

Enumerator
SL_HAL_LDMA_CTRL_SRC_INC_ONE

Increment source address by one unit data size.

SL_HAL_LDMA_CTRL_SRC_INC_TWO

Increment source address by two unit data sizes.

SL_HAL_LDMA_CTRL_SRC_INC_FOUR

Increment source address by four unit data sizes.

SL_HAL_LDMA_CTRL_SRC_INC_NONE

Do not increment source address.


sl_hal_ldma_ctrl_size_t#

sl_hal_ldma_ctrl_size_t

LDMA transfer unit size.

Enumerator
SL_HAL_LDMA_CTRL_SIZE_BYTE

Each unit transfer is a byte.

SL_HAL_LDMA_CTRL_SIZE_HALF

Each unit transfer is a half-word.

SL_HAL_LDMA_CTRL_SIZE_WORD

Each unit transfer is a word.


sl_hal_ldma_ctrl_dst_inc_t#

sl_hal_ldma_ctrl_dst_inc_t

Destination address increment unit size.

Enumerator
SL_HAL_LDMA_CTRL_DST_INC_ONE

Increment destination address by one unit data size.

SL_HAL_LDMA_CTRL_DST_INC_TWO

Increment destination address by two unit data sizes.

SL_HAL_LDMA_CTRL_DST_INC_FOUR

Increment destination address by four unit data sizes.

SL_HAL_LDMA_CTRL_DST_INC_NONE

Do not increment destination address.


sl_hal_ldma_ctrl_src_addr_mode_t#

sl_hal_ldma_ctrl_src_addr_mode_t

Source addressing mode.

Enumerator
SL_HAL_LDMA_CTRL_SRC_ADDR_MODE_ABS

Address fetched from a linked structure is absolute.

SL_HAL_LDMA_CTRL_SRC_ADDR_MODE_REL

Address fetched from a linked structure is relative.


sl_hal_ldma_ctrl_dst_addr_mode_t#

sl_hal_ldma_ctrl_dst_addr_mode_t

Destination addressing mode.

Enumerator
SL_HAL_LDMA_CTRL_DST_ADDR_MODE_ABS

Address fetched from a linked structure is absolute.

SL_HAL_LDMA_CTRL_DST_ADDR_MODE_REL

Address fetched from a linked structure is relative.


sl_hal_ldma_link_mode_t#

sl_hal_ldma_link_mode_t

LDMA link load address mode.

Enumerator
SL_HAL_LDMA_LINK_MODE_ABS

Link address is an absolute address value.

SL_HAL_LDMA_LINK_MODE_REL

Link address is a two's complement relative address.


sl_hal_ldma_cfg_arb_slots_t#

sl_hal_ldma_cfg_arb_slots_t

Insert extra arbitration slots to increase channel arbitration priority.

Enumerator
SL_HAL_LDMA_CFG_ARBSLOTS_ONE

One arbitration slot selected.

SL_HAL_LDMA_CFG_ARBSLOTS_TWO

Two arbitration slots selected.

SL_HAL_LDMA_CFG_ARBSLOTS_FOUR

Four arbitration slots selected.

SL_HAL_LDMA_CFG_ARBSLOTS_EIGHT

Eight arbitration slots selected.


sl_hal_ldma_cfg_src_inc_sign_t#

sl_hal_ldma_cfg_src_inc_sign_t

Source address increment sign.

Enumerator
SL_HAL_LDMA_CFG_SRC_INC_SIGN_POS

Increment source address.

SL_HAL_LDMA_CFG_SRC_INC_SIGN_NEG

Decrement source address.


sl_hal_ldma_cfg_dst_inc_sign_t#

sl_hal_ldma_cfg_dst_inc_sign_t

Destination address increment sign.

Enumerator
SL_HAL_LDMA_CFG_DST_INC_SIGN_POS

Increment destination address.

SL_HAL_LDMA_CFG_DST_INC_SIGN_NEG

Decrement destination address.


sl_hal_ldma_peripheral_signal_t#

sl_hal_ldma_peripheral_signal_t

Peripherals that can trigger LDMA transfers.

Enumerator
SL_HAL_LDMA_PERIPHERAL_SIGNAL_NONE

No peripheral selected for LDMA triggering.

SL_HAL_LDMA_PERIPHERAL_SIGNAL_LDMAXBAR_PRSREQ0

Trigger on PRS REQ0.

SL_HAL_LDMA_PERIPHERAL_SIGNAL_LDMAXBAR_PRSREQ1

Trigger on PRS REQ1.

SL_HAL_LDMA_PERIPHERAL_SIGNAL_TIMER0_CC0

Trigger on TIMER0_CC0.

SL_HAL_LDMA_PERIPHERAL_SIGNAL_TIMER0_CC1

Trigger on TIMER0_CC1.

SL_HAL_LDMA_PERIPHERAL_SIGNAL_TIMER0_CC2

Trigger on TIMER0_CC2.

SL_HAL_LDMA_PERIPHERAL_SIGNAL_TIMER0_UFOF

Trigger on TIMER0_UFOF.

SL_HAL_LDMA_PERIPHERAL_SIGNAL_TIMER1_CC0

Trigger on TIMER1_CC0.

SL_HAL_LDMA_PERIPHERAL_SIGNAL_TIMER1_CC1

Trigger on TIMER1_CC1.

SL_HAL_LDMA_PERIPHERAL_SIGNAL_TIMER1_CC2

Trigger on TIMER1_CC2.

SL_HAL_LDMA_PERIPHERAL_SIGNAL_TIMER1_UFOF

Trigger on TIMER1_UFOF.

SL_HAL_LDMA_PERIPHERAL_SIGNAL_USART0_RXDATAV

Trigger on USART0_RXDATAV.

SL_HAL_LDMA_PERIPHERAL_SIGNAL_USART0_RXDATAVRIGHT

Trigger on USART0_RXDATAVRIGHT.

SL_HAL_LDMA_PERIPHERAL_SIGNAL_USART0_TXBL

Trigger on USART0_TXBL.

SL_HAL_LDMA_PERIPHERAL_SIGNAL_USART0_TXBLRIGHT

Trigger on USART0_TXBLRIGHT.

SL_HAL_LDMA_PERIPHERAL_SIGNAL_USART0_TXEMPTY

Trigger on USART0_TXEMPTY.

SL_HAL_LDMA_PERIPHERAL_SIGNAL_TIMER2_CC0

Trigger on TIMER2_CC0.

SL_HAL_LDMA_PERIPHERAL_SIGNAL_TIMER2_CC1

Trigger on TIMER2_CC1.

SL_HAL_LDMA_PERIPHERAL_SIGNAL_TIMER2_CC2

Trigger on TIMER2_CC2.

SL_HAL_LDMA_PERIPHERAL_SIGNAL_TIMER2_UFOF

Trigger on TIMER2_UFOF.

SL_HAL_LDMA_PERIPHERAL_SIGNAL_TIMER3_CC0

Trigger on TIMER3_CC0.

SL_HAL_LDMA_PERIPHERAL_SIGNAL_TIMER3_CC1

Trigger on TIMER3_CC1.

SL_HAL_LDMA_PERIPHERAL_SIGNAL_TIMER3_CC2

Trigger on TIMER3_CC2.

SL_HAL_LDMA_PERIPHERAL_SIGNAL_TIMER3_UFOF

Trigger on TIMER3_UFOF.

SL_HAL_LDMA_PERIPHERAL_SIGNAL_LCD
SL_HAL_LDMA_PERIPHERAL_SIGNAL_TIMER4_CC0

Trigger on TIMER4_CC0.

SL_HAL_LDMA_PERIPHERAL_SIGNAL_TIMER4_CC1

Trigger on TIMER4_CC1.

SL_HAL_LDMA_PERIPHERAL_SIGNAL_TIMER4_CC2

Trigger on TIMER4_CC2.

SL_HAL_LDMA_PERIPHERAL_SIGNAL_TIMER4_UFOF

Trigger on TIMER4_UFOF.

SL_HAL_LDMA_PERIPHERAL_SIGNAL_VDAC0CH0REQ

Trigger on VDAC0_CH0REQ.

SL_HAL_LDMA_PERIPHERAL_SIGNAL_VDAC0CH1REQ

Trigger on VDAC0_CH1REQ.

SL_HAL_LDMA_PERIPHERAL_SIGNAL_I2C0_RXDATAV

Trigger on I2C0_RXDATAV.

SL_HAL_LDMA_PERIPHERAL_SIGNAL_I2C0_TXBL

Trigger on I2C0_TXBL.

SL_HAL_LDMA_PERIPHERAL_SIGNAL_I2C1_RXDATAV

Trigger on I2C1_RXDATAV.

SL_HAL_LDMA_PERIPHERAL_SIGNAL_I2C1_TXBL

Trigger on I2C1_TXBL.

SL_HAL_LDMA_PERIPHERAL_SIGNAL_IADC0_IADC_SCAN

Trigger on IADC0_IADC_SCAN.

SL_HAL_LDMA_PERIPHERAL_SIGNAL_IADC0_IADC_SINGLE

Trigger on IADC0_IADC_SINGLE.

SL_HAL_LDMA_PERIPHERAL_SIGNAL_MSC_WDATA

Trigger on MSC_WDATA.

SL_HAL_LDMA_PERIPHERAL_SIGNAL_EUSART0_RXFL

Trigger on EUSART0_RXFL.

SL_HAL_LDMA_PERIPHERAL_SIGNAL_EUSART0_TXFL

Trigger on EUSART0_TXFL.

SL_HAL_LDMA_PERIPHERAL_SIGNAL_EUSART1_RXFL

Trigger on EUSART1_RXFL.

SL_HAL_LDMA_PERIPHERAL_SIGNAL_EUSART1_TXFL

Trigger on EUSART1_TXFL.

SL_HAL_LDMA_PERIPHERAL_SIGNAL_EUSART2_RXFL

Trigger on EUSART2_RXFL.

SL_HAL_LDMA_PERIPHERAL_SIGNAL_EUSART2_TXFL

Trigger on EUSART2_TXFL.

SL_HAL_LDMA_PERIPHERAL_SIGNAL_LESENSE_BUFDATAV

Trigger on LESENSEFIFO.


Function Documentation#

sl_hal_ldma_init#

void sl_hal_ldma_init (LDMA_TypeDef * ldma, const sl_hal_ldma_init_t * init)

Initialize an extended LDMA transfer.

Parameters
TypeDirectionArgument NameDescription
LDMA_TypeDef *[in]ldma

A LDMA peripheral module.

const sl_hal_ldma_init_t *[in]init

A pointer to the initialization structure used to configure the LDMA.

This function will disable all the LDMA channels. This function will also set the LDMA IRQ priority to a user-configurable priority. The LDMA interrupt priority is configured using the sl_hal_ldma__t structure.


sl_hal_ldma_init_transfer#

void sl_hal_ldma_init_transfer (LDMA_TypeDef * ldma, uint32_t channel, const sl_hal_ldma_transfer_init_t * transfer_init, const sl_hal_ldma_descriptor_t * descriptor)

Initialize a LDMA transfer.

Parameters
TypeDirectionArgument NameDescription
LDMA_TypeDef *[in]ldma

A LDMA peripheral module.

uint32_t[in]channel

A LDMA channel to stop.

const sl_hal_ldma_transfer_init_t *[in]transfer_init

The initialization structure used to configure the transfer.

const sl_hal_ldma_descriptor_t *[in]descriptor

The transfer descriptor, which can be an array of descriptors linked together. Each descriptor's fields stored in RAM will be loaded into the certain hardware registers at the proper time to perform the LDMA transfer.

Note

  • If the descriptor is allocated on the stack, its content may change unpredictably when the function exits. To prevent this, declare the descriptor as a static or global variable, or allocate memory for it using malloc. Ensure that the memory location of the descriptor remains stable until the LDMA transfer is complete, as the LDMA controller may load the descriptor at any time.


sl_hal_ldma_start_transfer#

void sl_hal_ldma_start_transfer (LDMA_TypeDef * ldma, uint32_t channel)

Start a LDMA transfer.

Parameters
TypeDirectionArgument NameDescription
LDMA_TypeDef *[in]ldma

A LDMA peripheral module.

uint32_t[in]channel

A DMA channel.


sl_hal_ldma_stop_transfer#

void sl_hal_ldma_stop_transfer (LDMA_TypeDef * ldma, uint32_t channel)

Stop a LDMA transfer.

Parameters
TypeDirectionArgument NameDescription
LDMA_TypeDef *[in]ldma

A LDMA peripheral module.

uint32_t[in]channel

A LDMA channel to stop.

Note

  • The LDMA will complete the current AHB burst transfer before stopping.


sl_hal_ldma_transfer_is_done#

bool sl_hal_ldma_transfer_is_done (LDMA_TypeDef * ldma, uint32_t channel)

Check if a LDMA transfer has completed.

Parameters
TypeDirectionArgument NameDescription
LDMA_TypeDef *[in]ldma

A LDMA peripheral module.

uint32_t[in]channel

A LDMA channel to check.

Returns

  • True if transfer has completed, false if not.


sl_hal_ldma_transfer_remaining_count#

uint32_t sl_hal_ldma_transfer_remaining_count (LDMA_TypeDef * ldma, uint32_t channel)

Get the number of items remaining in a transfer.

Parameters
TypeDirectionArgument NameDescription
LDMA_TypeDef *[in]ldma

A LDMA peripheral module.

uint32_t[in]channel

The channel number of the transfer to check.

Note

  • This function does not take into account that a LDMA transfer with a chain of linked transfers might be ongoing. It will only check the count for the current transfer.

Returns

  • A number of items remaining in the transfer.


sl_hal_ldma_enable#

void sl_hal_ldma_enable (LDMA_TypeDef * ldma)

Enable LDMA.

Parameters
TypeDirectionArgument NameDescription
LDMA_TypeDef *[in]ldma

A LDMA peripheral module.


sl_hal_ldma_enable_channel#

void sl_hal_ldma_enable_channel (LDMA_TypeDef * ldma, uint32_t channel)

Enable LDMA channel.

Parameters
TypeDirectionArgument NameDescription
LDMA_TypeDef *[in]ldma

A LDMA peripheral module.

uint32_t[in]channel

A LDMA channel.


sl_hal_ldma_disable#

void sl_hal_ldma_disable (LDMA_TypeDef * ldma)

Disable LDMA.

Parameters
TypeDirectionArgument NameDescription
LDMA_TypeDef *[in]ldma

A LDMA peripheral module.


sl_hal_ldma_disable_channel#

void sl_hal_ldma_disable_channel (LDMA_TypeDef * ldma, uint32_t channel)

Disable LDMA channel.

Parameters
TypeDirectionArgument NameDescription
LDMA_TypeDef *[in]ldma

A LDMA peripheral module.

uint32_t[in]channel

A LDMA channel.


sl_hal_ldma_get_status#

uint32_t sl_hal_ldma_get_status (LDMA_TypeDef * ldma)

Gets LDMA STATUS register value.

Parameters
TypeDirectionArgument NameDescription
LDMA_TypeDef *[in]ldma

A LDMA peripheral module.

Returns

  • Current STATUS register value.


sl_hal_ldma_channel_is_enabled#

bool sl_hal_ldma_channel_is_enabled (LDMA_TypeDef * ldma, uint32_t channel)

Check if a certain channel is enabled.

Parameters
TypeDirectionArgument NameDescription
LDMA_TypeDef *[in]ldma

A LDMA peripheral module.

uint32_t[in]channel

LDMA channel to check.

Returns

  • return true if the LDMA channel is enabled and false if the channel is not enabled.


sl_hal_ldma_enable_channel_request#

void sl_hal_ldma_enable_channel_request (LDMA_TypeDef * ldma, uint32_t channel)

Enable an LDMA channel request.

Parameters
TypeDirectionArgument NameDescription
LDMA_TypeDef *[in]ldma

A LDMA peripheral module.

uint32_t[in]channel

LDMA channel to enable requests.

Use this function to enable an LDMA channel request. This will prevent the LDMA from proceeding after its current transaction is disabled.


sl_hal_ldma_disable_channel_request#

void sl_hal_ldma_disable_channel_request (LDMA_TypeDef * ldma, uint32_t channel)

Disable an LDMA channel request.

Parameters
TypeDirectionArgument NameDescription
LDMA_TypeDef *[in]ldma

A LDMA peripheral module.

uint32_t[in]channel

LDMA channel to disable requests.

Use this function to disable an LDMA channel request. This will prevent the LDMA from proceeding after its current transaction is disabled.


sl_hal_ldma_clear_interrupts#

void sl_hal_ldma_clear_interrupts (LDMA_TypeDef * ldma, uint32_t flags)

Clear one or more pending LDMA interrupts for LDMA channels 0 to 15.

Parameters
TypeDirectionArgument NameDescription
LDMA_TypeDef *[in]ldma

A LDMA peripheral module.

uint32_t[in]flags

Pending LDMA interrupt sources to clear. Use one or more valid interrupt flags for the LDMA peripheral module. The flags are one LDMA_IF_ERRORx flag for each channel (x = a supported channel number) and one LDMA_IF_DONEx flag for each channel (x = a supported channel number). For series 2 devices, use LDMA_IF_ERROR and LDMA_IF_DONEx.

Note

  • For series 2 devices, there is only one LDMA_IF_ERROR shared across all channels. Use the appropriate flags to clear these interrupts.


sl_hal_ldma_disable_interrupts#

void sl_hal_ldma_disable_interrupts (LDMA_TypeDef * ldma, uint32_t flags)

Disable one or more LDMA interrupts for LDMA channels 0 to 15.

Parameters
TypeDirectionArgument NameDescription
LDMA_TypeDef *[in]ldma

A LDMA peripheral module.

uint32_t[in]flags

LDMA interrupt sources to disable. Use one or more valid interrupt flags for LDMA peripheral module. The flags are one LDMA_IEN_ERROR flag for all the channels and one LDMA_IEN_DONEx flag for each channel (x = a supported channel number).


sl_hal_ldma_enable_interrupts#

void sl_hal_ldma_enable_interrupts (LDMA_TypeDef * ldma, uint32_t flags)

Enable one or more LDMA interrupts for LDMA channels 0 to 15.

Parameters
TypeDirectionArgument NameDescription
LDMA_TypeDef *[in]ldma

A LDMA peripheral module.

uint32_t[in]flags

LDMA interrupt sources to enable. Use one or more valid interrupt flags for LDMA peripheral module. The flags are one LDMA_IEN_ERROR flag for all channels and one LDMA_IEN_DONEx flag for each channel (x = a supported channel number).

Note

  • Depending on the use, a pending interrupt may already be set before to enabling the interrupt. To ignore a pending interrupt, consider using sl_hal_ldma_clear_interrupts() prior to enabling the interrupt.


sl_hal_ldma_get_pending_interrupts#

uint32_t sl_hal_ldma_get_pending_interrupts (LDMA_TypeDef * ldma)

Get pending LDMA interrupt flags for LDMA channels 0 to 15.

Parameters
TypeDirectionArgument NameDescription
LDMA_TypeDef *[in]ldma

A LDMA peripheral module.

Note

  • Event bits are not cleared by the use of this function. For series 2 devices, there is only one LDMA_IF_ERROR shared across all channels. Use the appropriate flags to clear these interrupts.

Returns

  • Pending LDMA interrupt sources. Returns one or more valid interrupt flags for the LDMA module. The flags are one LDMA_IF_ERRORx flag for each channel (x = a supported channel number) and one LDMA_IF_DONEx flag for each channel (x = a supported channel number). For series 2 devices, use LDMA_IF_ERROR and LDMA_IF_DONEx.


sl_hal_ldma_set_interrupts#

void sl_hal_ldma_set_interrupts (LDMA_TypeDef * ldma, uint32_t flags)

Set one or more pending LDMA interrupts for LDMA channels 0 to 15.

Parameters
TypeDirectionArgument NameDescription
LDMA_TypeDef *[in]ldma

A LDMA peripheral module.

uint32_t[in]flags

LDMA interrupt sources to set to pending. Use one or more valid interrupt flags for LDMA peripheral module. The flags are one LDMA_IF_ERRORx flag for each channel (x = a supported channel number) and one LDMA_IF_DONEx flag for each channel (x = a supported channel number). For series 2 devices, use LDMA_IF_ERROR and LDMA_IF_DONEx.

Note

  • For series 2 devices, there is only one LDMA_IF_ERROR shared across all channels. Use the appropriate flags to clear these interrupts.


sl_hal_ldma_get_enabled_pending_interrupts#

uint32_t sl_hal_ldma_get_enabled_pending_interrupts (LDMA_TypeDef * ldma)

Get enabled and pending LDMA interrupt flags for LDMA channels 0 to 15.

Parameters
TypeDirectionArgument NameDescription
LDMA_TypeDef *[in]ldma

A LDMA peripheral module.

Useful for handling more interrupt sources in the same interrupt handler.

Note

  • Interrupt flags are not cleared by the use of this function.

Returns

  • Pending and enabled LDMA interrupt sources Return value is the bitwise AND of

    • the enabled interrupt sources in LDMA_IEN and

    • the pending interrupt flags LDMA_IF