enable_scan#

bool sl_hal_lesense_channel_descriptor_t::enable_scan

Set to enable scan channel CHx.

enable_pin#

bool sl_hal_lesense_channel_descriptor_t::enable_pin

Set to enable CHx pin.

enable_interrupt#

bool sl_hal_lesense_channel_descriptor_t::enable_interrupt

Enable/disable channel interrupts after configuring all the sensor channel parameters.

excitation_mode#

sl_hal_lesense_pin_excitation_phase_t sl_hal_lesense_channel_descriptor_t::excitation_mode

Configure channel pin mode for the excitation phase of the scan sequence.

Note: OPAOUT is only available on channels 2, 3, 4, and 5.

idle_mode#

sl_hal_lesense_pin_idle_mode_t sl_hal_lesense_channel_descriptor_t::idle_mode

Configure channel pin idle setup in LESENSE idle phase.

pin_alternate_excite#

bool sl_hal_lesense_channel_descriptor_t::pin_alternate_excite

Set to use alternate excite pin for excitation.

shift_register#

bool sl_hal_lesense_channel_descriptor_t::shift_register

Set to enable result from this channel being shifted into the decoder register.

invert_register#

bool sl_hal_lesense_channel_descriptor_t::invert_register

Set to invert result bit stored in the SCANRES register.

store_counter#

sl_hal_lesense_store_sample_data_t sl_hal_lesense_channel_descriptor_t::store_counter

Set to store counter value in the RAM (accessible via RESDATA) and make the comparison result available in the SCANRES register.

excitation_clock#

sl_hal_lesense_excitation_clock_t sl_hal_lesense_channel_descriptor_t::excitation_clock

Select clock used for the excitation timing.

sample_clock#

sl_hal_lesense_excitation_clock_t sl_hal_lesense_channel_descriptor_t::sample_clock

Select clock used for the sample delay timing.

excitation_time#

uint8_t sl_hal_lesense_channel_descriptor_t::excitation_time

Configure the excitation time.

Excitation will last excitation_time+1 excitation clock. cycles. Valid range: 0-63 (6 bits).

sample_delay#

uint8_t sl_hal_lesense_channel_descriptor_t::sample_delay

Configure the sample delay.

Sampling will occur after sample_delay+1 sample clock cycles. Valid range: 0-127 (7 bits) or 0-255 (8 bits) depending on device.

measure_delay#

uint16_t sl_hal_lesense_channel_descriptor_t::measure_delay

Configure the measure delay.

Sensor measuring is delayed for measDelay excitation clock cycles. Valid range: 0-127 (7 bits) or 0-1023 (10 bits) depending on device.

acmp_threshold#

uint16_t sl_hal_lesense_channel_descriptor_t::acmp_threshold

Configure the ACMP threshold or the DAC data.

If dac_channel0_data is set to SL_HAL_LESENSE_DAC_CH_DATA, acmp_threshold defines the 12-bit DAC data in the data register of DAC interface (DACn_CH0DATA). In this case, the valid range is: 0-4095 (12 bits). If dac_channel0_data is set to SL_HAL_LESENSE_DAC_THRES, acmp_threshold defines the 6-bit Vdd scaling factor of ACMP negative input (VDDLEVEL in ACMP_INPUTSEL register). In this case, the valid range is: 0-63 (6 bits).

sample_mode#

sl_hal_lesense_channel_sample_t sl_hal_lesense_channel_descriptor_t::sample_mode

Select if the ACMP output, the ADC output or the counter output should be used in comparison.

interrupt_mode#

sl_hal_lesense_channel_interrupt_t sl_hal_lesense_channel_descriptor_t::interrupt_mode

Configure the interrupt generation mode for the CHx interrupt flag.

count_threshold#

uint16_t sl_hal_lesense_channel_descriptor_t::count_threshold

Configure the decision threshold for the sensor data comparison. Valid range: 0-65535 (16 bits).

compare_mode#

sl_hal_lesense_compare_counter_t sl_hal_lesense_channel_descriptor_t::compare_mode

Select the mode for counter comparison.

evaluation_mode#

sl_hal_lesense_sensor_evaluation_t sl_hal_lesense_channel_descriptor_t::evaluation_mode

Select the sensor evaluation mode.

offset#

uint8_t sl_hal_lesense_channel_descriptor_t::offset

Offset for IADC/ACMP interaction.

ACMP: determines which port I/O pins on the external override interface to access. IADC: determines which IADC scanner channels is sampled.