I/O Stream UART#

I/O Stream UART.

Overview#

UART layer provides a set of standard APIs that can be used with all type of UART interface.

Initialization#

Each UART stream type provides its initalization with parameters specific to them. Note

Each UART stream requires a dedicated (L)DMA channel through DMADRV.

Configuration#

RX Buffer Size#

The SL_IOSTREAM_<Peripheral>_<Instance>_RX_BUFFER_SIZE parameter should be chosen based on the time it takes for the MCU to consume the RX buffer, otherwise flow control will have to be asserted to avoid data loss. If hardware flow control is unavailable, data will be dropped.

Let's assume that the MCU is able to call the IOStream Read function with a maximum delay of 1ms. We have:

(1) MaximumDelay = RXBufferSize * TimePerDatum

Where TimePerDatum is defined by (#startBits + #dataBits + #parityBits + #stopBits)/BaudRate.
With default settings, we have 1 start & stop bit, 8 data bits and no parity.

Rewriting (1), we have:

(2) MaximumDelay = RXBufferSize * 10/BaudRate <=> RXBufferSize = MaximumDelay*Baudrate/10

With a baudrate of 921,600 and a maximum consumption delay of 1ms, we have
a recommended RXBufferSize of:

(3) RXBufferSize = 0.001*921600/10 = 93Bytes
(1) MaximumDelay = RXBufferSize * TimePerDatum

Where TimePerDatum is defined by (#startBits + #dataBits + #parityBits + #stopBits)/BaudRate.
With default settings, we have 1 start & stop bit, 8 data bits and no parity.

Rewriting (1), we have:

(2) MaximumDelay = RXBufferSize * 10/BaudRate <=> RXBufferSize = MaximumDelay*Baudrate/10

With a baudrate of 921,600 and a maximum consumption delay of 1ms, we have
a recommended RXBufferSize of:

(3) RXBufferSize = 0.001*921600/10 = 93Bytes

This should ensure that flow control does not have to be asserted, slowing down the bus and if unavailable, that no data will be dropped.

Baudrate#

IOStream UART leverages the DMA in order consume data from the UART peripheral. When user reads data from IOStream, the internal reception buffer gets more room for receiving new data. However, this update process pauses the DMA, meaning that any new data coming from the bus will remain in the UART peripheral's FIFO. If too much data is received before the update can complete, hardware flow control will have be enforces, or data will be dropped if unavailable.

Measurements show that the DMA update executes in ~23.7us with -O3 optimization (-Os gives slightly worst performance of ~32.7us). With these, the following equations can be followed to understand the maximum baudrate supported by the current design, when no flow control is available:

The number of bytes received during the ring buffer update is given by:

(1) UpdateTime = FIFOSize * TimePerDatum

Where TimePerDatum is defined by (#startBits + #dataBits + #parityBits + #stopBits)/BaudRate.
With default settings, we have 1 start & stop bit, 8 data bits and no parity.
Rewriting (1), we have:

(2) UpdateTime = FIFOSize * 10/Baudrate

For USART, we have a FIFO of size 2. This means that for an update time of
23.7us, we have a max baudrate of:

(3) 23.7 = 2 * 10/Baudrate <=> Baudrate = 2*10/23.7 = 843,881Baud.
The number of bytes received during the ring buffer update is given by:

(1) UpdateTime = FIFOSize * TimePerDatum

Where TimePerDatum is defined by (#startBits + #dataBits + #parityBits + #stopBits)/BaudRate.
With default settings, we have 1 start & stop bit, 8 data bits and no parity.
Rewriting (1), we have:

(2) UpdateTime = FIFOSize * 10/Baudrate

For USART, we have a FIFO of size 2. This means that for an update time of
23.7us, we have a max baudrate of:

(3) 23.7 = 2 * 10/Baudrate <=> Baudrate = 2*10/23.7 = 843,881Baud.

The maximum "real" baudrate is then 460,800 Baud, otherwise hardware flow control will have to be asserted, or data will be dropped.

To achieve higher throughput without flow control assertion, users can use the EUSART peripheral, which boasts a 16Bytes FIFO, allow for baudrate of upwards of 921600 without data loss with no hardware flow control.