SiSDK Platform - CMSIS Device Version 5.2.0 (June 16, 2025) - Release Notes#
Simplicity SDK Platform Version 5.2.0
Simplicity SDK Version 2025.6.0
Release Summary#
Key Features | API Changes | Bug Fixes | Chip Enablement
Key Features#
FreeRTOS kernel upgraded to LTS version 11.1.0.
New
sl_main
component for device initialization sequence.Added Memory Protection and Attribute (MPA) Manager.
Added Peripheral HAL hardware abstraction library for Series 2 & 3 devices.
sl_gpio
components for GPIO enabled with production quality.New
common_token_manager
component for storing/retrieving tokens is added with evaluation quality.Added support for GCC Link Time Optimization (LTO).
API Changes#
Power/Clock Manager: New APIs for runtime clock changes and SYSCLK source control.
Clock Manager: oscillator calibration override via NVM3.
Memory Manager: Multi-heap operations.
Bug Fixes#
Fixes in Memory Manager.
Fixes in Pin Tool SPI support.
Fixes in IOStream.
Chip Enablement#
Added support for the EFR32BG29 and EFR32MG29 devices (Series 2).
Added support for the EFR32BG22L devices (EFR32BG22L122F352GM32).
Added support for the EFR32BG24L devices (EFR32BG24L010F768IM40 and EFR32BG24L210F768IM40)
Added support for the MGM260P devices (MGM260PD32VNA, MGM260PD32VNN, MGM260PD22VNA, MGM260PB32VNA, MGM260PB32VNN, MGM260PB22VNA)
Added support for the BGM260P devices (BGM260PB22VNA, BGM260PB32VNA)
Key Features#
New Features | Enhancements | Removed Features | Deprecated Features
New Features#
Upgraded FreeRTOS kernel to LTS version 11.1.0. The CMSIS OS2 layer and Segger SystemView components were also upgraded to support FreeRTOS 11.1.0.
Added the MPA Manager component to the SiSDK. The Memory Protection and Attribute Manager provides a service to configure a variety of memory regions with different qualifiers which are referred to as MPA manager attributes using the Memory Protection Unit (MPU). For example, it is possible to configure a memory region as read-only, non-executable, non-shareable or non-cacheable.
System Setup: Added a new
sl_main
component to manage the device initialization process. This component supports both baremetal and kernel-based applications, replacing thesl_system
component. More information is available in the component documentation. For RTOS applications, a migration guide is available. Baremetal applications will be migrated automatically using Simplicity Studio or the SLC CLI: thesl_system_compatibility
component will be added to the migrated projects.For RTOS applications, the initialization sequence is different and the
main()
function now operates within the context of an RTOS task.Power Manager and Clock Manager: Introduced new APIs to support advanced use cases involving runtime clock configuration changes.
Added
slx_power_manager_update_clock_info()
, an advanced Power Manager API that refreshes internal oscillator usage data by reading the current CMU clock tree. This is intended for scenarios where the system clock (SYSCLK) is modified at runtime, which is not typically recommended but required by some applications.Added
sl_clock_manager_get_sysclk_source()
andslx_clock_manager_set_sysclk_source()
to retrieve and configure the SYSCLK source oscillator.
Clock manager:
Added the
SL_CLOCK_MANAGER_CTUNE_MFG_HFXO_EN
option, allowing users to enable or disable the use of CTUNE values from Manufacturing tokens in the User Data page for LFXO and HFXO calibration.Added a new Clock Manager component,
clock_manager_oscillator_calibration_override
, which enables overriding default oscillator calibration values with those stored in NVM3. Currently, this feature supports the HFXO oscillator. The component provides new APIs to read, write, and delete HFXO oscillator override calibration values in NVM.
Peripheral HAL: Peripheral HAL is an alternative to EMLIB. Peripheral HAL supports Series 3 devices while EMLIB does not. HAL Peripheral also supports Series 2 devices. Note that for Series 2 devices, both EMLIB and Peripheral HAL components can co-exist in the same application (at the cost of increased code size). EMLIB components are not being deprecated and are still supported.
The following components and associated source files have been added: hal_acmp, hal_adc, hal_burtc, hal_dcdc_coulomb_counter, hal_emu, hal_eusart, hal_gpcrc, hal_iadc, hal_ldma, hal_leddrv, hal_letimer, hal_pcnt, hal_pixelrz, hal_prs, hal_sysrtc, hal_smu, hal_syscfg, hal_system, hal_timer, hal_usart and hal_wdog.
Refer to the documentation for more details.
Memory Manager: Added support for managing multiple heaps.
UARTDRV: Added a user callback parameter for the
UARTDRV_Transmit()
andUARTDRV_Receive()
functions.NVM3:
Enabled secure NVM3 write and read operations using the Host crypto engine instead of the SE crypto engine.
Users can use the
nvm3_registerCallback()
API to register a callback function, which is triggered when the NVM3 instance detects low memory conditions or a cache overflow. The callback allows the application to handle conditions such as freeing up memory by triggering repack. It is recommended that the callback be registered before calling any NVM3 APIs. Additionally, users can deregister the callback using thenvm3_deregisterCallback()
API.Users can query the cache size and memory information using the
nvm3_getMemInfo()
API. This API provides details about the current memory state, including available memory, cache status, and additional cache requirements.
Added support for GCC Link Time Optimization (LTO) (using the
toolchain_gcc_lto
component).
Enhancements#
Device Headers: Added instance macros LDMA_NUM, GPCRC_NUM and LDMAXBAR_NUM in Series 2 device headers.
Device Headers: Improved code quality in the startup and system files.
Device Headers: Added the
device_supports_wisun
provides
feature for FG23 and ZG23slcc
components variants with 512kB flash and 64kB RAM.The startup code now sets the MSPLIM register to help detect main stack overflows by triggering a UsageFault, including for non-TrustZone applications.
UARTDRV: Added an assertion to validate the baud rate before calculating ticks.
Updated the register operations for setting and clearing bits to use their corresponding alias for Series 2 devices and later to improve code size.
Removed Features#
Removed Feature | Was Deprecated? |
---|---|
The sl_memory.h file has been removed. |
Yes |
The sl_memory_region.h file has been removed. |
Yes |
The sl_memory_config.h file has been removed. |
Yes |
The emlib_core_debug_config.h file has been removed. |
Yes |
The device_init_nvic component and its associated files have been removed. The interrupt_manager component is available as a replacement. |
Yes |
The ram_interrupt_vector_init component and its associated files have been removed. The interrupt_manager component is available as a replacement. |
Yes |
The silabs_core_sl_malloc component and its associated files have been removed. The memory_manager component is available as a replacement. |
Yes |
The Power Manager has removed two features:
|
Yes |
The AWS software components is removed as it's a thirdparty and deprecated by it's author. | Yes |
Deprecated Features#
Deprecated Feature | Planned Removal Date |
---|---|
System Setup (sl_system) has been deprecated. The new System Setup component (sl_main ) should be used when starting a new project.
For existing projects:
|
June 16, 2026 |
The sl_memory component was deprecated and replaced with memory_manager_region .
|
June 16, 2026 |
Interrupt Manager: The SL_INTERRUPT_MANAGER_S2_INTERRUPTS_IN_RAM configuration has been deprecated in favor of the interrupt_manager_vector_table_in_ram component. Adding the component to a project will result in the same behavior as having SL_INTERRUPT_MANAGER_S2_INTERRUPTS_IN_RAM set to 1. Project upgrade to SiSDK 2025.6 thanks to Simplicity Studio or SLC CLI will automatically be updated. | June 16, 2026 |
API Changes#
New APIs | Modified APIs | Removed APIs | Deprecated APIs
New APIs#
New API Signature | Deprecated API replaced by this (if any) |
---|---|
void slx_power_manager_update_clock_info(void) | None |
sl_status_t sl_clock_manager_get_sysclk_source(sl_oscillator_t *oscillator) | None |
sl_status_t slx_clock_manager_set_sysclk_source(sl_oscillator_t oscillator)* | None |
sl_status_t sl_memory_heap_alloc(sl_memory_heap_t *heap, size_t size, sl_memory_block_type_t type, void **block) | None |
sl_status_t sl_memory_heap_alloc_advanced(sl_memory_heap_t *heap, size_t size, size_t align, sl_memory_block_type_t type, void **block) | None |
sl_status_t sl_memory_heap_free(sl_memory_heap_t *heap, void *block) | None |
sl_status_t sl_memory_heap_calloc(sl_memory_heap_t *heap, size_t item_count, size_t size, sl_memory_block_type_t type, void **block) | None |
sl_status_t sl_memory_heap_realloc(sl_memory_heap_t *heap, void *ptr, size_t size, void **block) | None |
sl_status_t sl_memory_heap_reserve_block(sl_memory_heap_t *heap, size_t size, size_t align, sl_memory_reservation_t *handle, void **block) | None |
sl_status_t sl_memory_heap_create_pool(sl_memory_heap_t *heap, size_t block_size, uint32_t block_count, sl_memory_pool_t *pool_handle) | None |
void sl_main_init(void) | None |
void sl_main_second_stage_init(void) | None |
void sl_main_kernel_start(void) | None |
bool sl_main_start_task_should_continue(void) | None |
void sl_main_process_action(void) | None |
sl_status_t sl_token_manager_init(void) | None |
sl_status_t sl_token_manager_get_data(uint32_t token, void *data, uint32_t length) | None |
sl_status_t sl_token_manager_set_data(uint32_t token, void *data, uint32_t length) | None |
sl_status_t sl_token_manager_get_partial_data(uint32_t token, void *data, uint32_t offset, uint32_t length) | None |
sl_status_t sl_token_manager_delete_dynamic_token(uint32_t token) | None |
sl_status_t sl_token_manager_increment_counter(uint32_t token) | None |
sl_status_t sl_token_manager_get_size(uint32_t token, uint32_t *size_out) | None |
sl_status_t sl_i2c_init(const sl_i2c_init_params_t *init_params, sl_i2c_handle_t *i2c_handle) | None |
sl_status_t sl_i2c_deinit(sl_i2c_handle_t i2c_handle) | None |
sl_status_t sl_i2c_set_frequency(sl_i2c_handle_t i2c_handle, sl_i2c_freq_mode_t freq_mode) | None |
sl_status_t sl_i2c_get_frequency(sl_i2c_handle_t i2c_handle, uint32_t *frequency) | None |
sl_status_t sl_i2c_set_follower_address(sl_i2c_handle_t i2c_handle, uint16_t follower_address) | None |
sl_status_t sl_i2c_configure_dma(sl_i2c_handle_t i2c_handle, sl_i2c_dma_channel_info_t dma_channel) | None |
sl_status_t sl_i2c_send_blocking(sl_i2c_handle_t i2c_handle, const uint8_t *tx_buffer, uint16_t tx_len, uint32_t timeout) | None |
sl_status_t sl_i2c_receive_blocking(sl_i2c_handle_t i2c_handle, uint8_t *rx_buffer, uint16_t rx_len, uint32_t timeout) | None |
sl_status_t sl_i2c_transfer(sl_i2c_handle_t i2c_handle, const uint8_t *tx_buffer, uint16_t tx_len, uint8_t *rx_buffer, uint16_t rx_len) | None |
sl_status_t sl_i2c_send_non_blocking(sl_i2c_handle_t i2c_handle, const uint8_t *tx_buffer, uint16_t tx_len, sl_i2c_irq_callback_t i2c_callback, void *context) | None |
sl_status_t sl_i2c_receive_non_blocking(sl_i2c_handle_t i2c_handle, uint8_t *rx_buffer, uint16_t rx_len, sl_i2c_irq_callback_t i2c_callback, void *context) | None |
Ecode_t DMADRV_AllocateChannelById(unsigned int channelId, void *capabilities) | None |
sl_status_t nvm3_registerCallback(nvm3_Handle_t *h, const nvm3_CallbackParams_t *callbackParams, nvm3_LowMemCallback_t lowMemCallback) | None |
sl_status_t nvm3_deregisterCallback(nvm3_Handle_t *h) | None |
sl_status_t nvm3_getMemInfo(nvm3_Handle_t *h, nvm3_MemInfo_t *memInfo) | None |
*API functions prefixed with slx_ are considered experimental and are intended for advanced use cases.
Modified APIs#
Old API | Modified |
---|---|
_CONCAT_2(first, second) | _SL_CONCAT_2(first, second) |
_CONCAT_3(first, second, third) | _SL_CONCAT_3(first, second, third) |
_CONCAT_4(first, second, third, fourth) | _SL_CONCAT_4(first, second, third, fourth) |
sl_iostream_t *sl_iostream_get_handle(char *name) | sl_iostream_t *sl_iostream_get_handle(const char *name) |
sl_status_t sl_gpio_set_slew_rate(sl_gpio_port_t port, uint8_t slewrate) | sl_status_t sl_gpio_set_slew_rate(const sl_gpio_t *gpio, uint8_t slewrate) |
sl_status_t sl_gpio_get_slew_rate(sl_gpio_port_t port, uint8_t *slewrate) | sl_status_t sl_gpio_get_slew_rate(const sl_gpio_t *gpio, uint8_t *slewrate) |
UARTDRV_Callback_t(struct UARTDRV_HandleData *handle, Ecode_t transferStatus, uint8_t *data, UARTDRV_Count_t transferCount) | UARTDRV_Callback_t(struct UARTDRV_HandleData *handle, Ecode_t transferStatus, uint8_t *data, UARTDRV_Count_t transferCount, void *userParam) |
UARTDRV_Transmit(UARTDRV_Handle_t handle, uint8_t *data, UARTDRV_Count_t count, UARTDRV_Callback_t callback) | UARTDRV_Transmit(UARTDRV_Handle_t handle, uint8_t *data, UARTDRV_Count_t count, UARTDRV_Callback_t callback, void *userParam) |
UARTDRV_Receive(UARTDRV_Handle_t handle, uint8_t *data, UARTDRV_Count_t count, UARTDRV_Callback_t callback) | UARTDRV_Receive(UARTDRV_Handle_t handle, uint8_t *data, UARTDRV_Count_t count, UARTDRV_Callback_t callback, void *userParam) |
sl_status_t sl_gpio_set_slew_rate(sl_gpio_port_t port, uint8_t slewrate) | sl_status_t sl_gpio_set_slew_rate(const sl_gpio_t *gpio, uint8_t slewrate) |
sl_status_t sl_gpio_get_slew_rate(sl_gpio_port_t port, uint8_t *slewrate) | sl_status_t sl_gpio_get_slew_rate(const sl_gpio_t *gpio, uint8_t *slewrate) |
Removed APIs#
Removed API Name | Was Deprecated? |
---|---|
void EMU_MemPwrDown(uint32_t blocks) | Yes |
void EMU_UpdateOscConfig(void) | Yes |
bool CORE_IrqIsBlocked(IRQn_Type irqN) | Yes |
void CORE_GetNvicEnabledMask(CORE_nvicMask_t *mask) | Yes |
bool CORE_GetNvicMaskDisableState(const CORE_nvicMask_t *mask) | Yes |
void CORE_EnterNvicMask(CORE_nvicMask_t *nvicState, const CORE_nvicMask_t *disable) | Yes |
void CORE_NvicDisableMask(const CORE_nvicMask_t *disable) | Yes |
void CORE_NvicEnableMask(const CORE_nvicMask_t *enable) | Yes |
void CORE_YieldNvicMask(const CORE_nvicMask_t *enable) | Yes |
void CORE_NvicMaskSetIRQ(IRQn_Type irqN, CORE_nvicMask_t *mask) | Yes |
void CORE_NvicMaskClearIRQ(IRQn_Type irqN, CORE_nvicMask_t *mask) | Yes |
bool CORE_NvicIRQDisabled(IRQn_Type irqN) | Yes |
void * CORE_GetNvicRamTableHandler(IRQn_Type irqN) | Yes |
void CORE_SetNvicRamTableHandler(IRQn_Type irqN, void *handler) | Yes |
void CORE_InitNvicVectorTable(uint32_t *sourceTable, uint32_t sourceSize, uint32_t *targetTable, uint32_t targetSize, void *defaultHandler, bool overwriteActive) | No |
void sl_system_init(void) | Yes |
void sl_system_kernel_start(void) | Yes |
void sl_device_init_nvic(void) | Yes |
void sl_ram_interrupt_vector_init(void) | Yes |
Deprecated APIs#
None.
Bug Fixes#
ID | Issue Description | GitHub / Salesforce Reference (if any) | Affected Software Variants, Hardware, Modes, Host Interfaces |
---|---|---|---|
Board Drivers | |||
1320271 | Microphone: Added an EM1 requirement when initializing the microphones to prevent chip from entering Low Energy modes. | None | Series 2 & 3 Devices |
CMSIS Devices Files | |||
1391130 |
Changed the license text in some CMSIS headers from MSLA to Zlib. (Affected headers are _dma_descriptor.h, _ldmaxbar_defines.h, _prs_signals.h). Removed MSLA license text from startup_.c source file as Apache 2.0 license text is already there. |
None | Series 2 Devices |
1356015 | Fixed a bug in the SystemHFRCODPLLClockGet function that caused incorrect frequency values being returned when the SYSTEM_NO_STATIC_MEMORY macro was defined. | None | Series 2 & 3 Devices |
Common | |||
1415010 | sl_core: Fixed an issue in CORE_SystemReset where sl_core does not compile when building for a Cortex-M0+ processor due to a missing bitfield in the AIRCR register. |
None | Cortex-M0+ processors |
1383487 | Toolchain: Fixed the CMSE option for CMake support with IAR compiler. This change consists in replacing specific CMSE toolchain options with a generic compiler option. | None | IAR CMake Projects |
1349599 | Linker: Changed permissions to READONLY for .rodata, .copy.table and .zero.table segments in the linker file to fix a warning (LOAD segment with RWX permissions). Removed the --no-warn-rwx-segments option from linker flags. |
None | Series 2 & 3 Devices |
1345860 | Pin Tool: Added missing support for USART/EUSART COPI (TX) and CIPO (RX) SPI signals. This fixes a bug where USART signals are not selectable in the Pin Tool user interface (for CPC Secondary - UART (USART) component for instance). | None | Series 2 & 3 Devices |
EMLIB | |||
1363972 | em_iadc: Added the positive vbat input | None | EFR32xG27 and EFR32xG29 Families |
1408207 | em_prs: Added the prsConsumerCORE_M33RXEV definition in the em_prs.h file | None | Series 2 Devices |
FreeRTOS | |||
1414796 | FreeRTOS: Fixed an issue where the default configuration file would overwrite the user-provided configuration file. | None | Series 2 & 3 Devices |
1374673 | FreeRTOS: Updated to recommend using the interrupt_manager component instead of the deprecated device_init_nvic component. | None | Series 2 & 3 Devices |
Services | |||
1371534 | Sleeptimer: Resolved an issue where timeout_ms could overflow by casting it to uint64_t . Additionally, moved the null check for the handle in sl_sleeptimer_stop_timer to occur before dereferencing. |
None | EFR32xG27 and EFR32xG29 Families |
1385086 | HFXO Manager: The IRQ priority has been reduced to CORE_ATOMIC_BASE_PRIORITY_LEVEL to avoid impacting the execution of customer time-critical code that uses priority levels above CORE_ATOMIC_BASE_PRIORITY_LEVEL. | None | Series 2 Devices |
1413417 | Clock Manager: Resolved a compilation warning in sl_clock_manager_hal_s2.c that occurred when building the Clock Manager outside of the Simplicity Studio or SLC environment. | None | Series 2 Devices |
1346413 | Memory Manager: Fixed heap corruption in sl_memory_realloc() when reducing an allocated block. | None | Series 2 & 3 Devices |
1354963 | Memory Manager: Resolved an issue with the statistics feature where the heap high watermark could overflow. The fix ensures the heap high watermark remains accurate. | None | Series 2 & 3 Devices |
1394833 | Memory Manager: Resolved an issue in heap usage calculation that caused inaccuracies in the reported usage. Also fixed a bug where the smallest free or allocated block could be incorrectly reported as SIZE_T_MAX. | None | Series 2 & 3 Devices |
1391237 | Memory Manager: Fixed a bug in sl_memory_delete_pool() that allowed deletion of a memory pool even when one or more blocks had not been freed. A runtime check has been added to ensure all active blocks are freed before the pool can be deleted. | None | Series 2 & 3 Devices |
1425220 | Memory Manager: Resolved an issue with the memory manager redirect component during SLC generation on Si917 devices. | None | SiW917 |
1383887 | sl_cos: Resolved issues reported by Coverity tool in sl_cos driver. | None | Series 2 |
1411549 | IOStream: Resolved an issue in the IOStream UART driver with software flow control that could cause corruption of the reception buffer. | None | Series 2 & 3 |
1411549 | IOStream: Fixed a rare issue in the UART driver that could lead to reception buffer corruption. | None | Series 2 & 3 |
1411549 | IOStream: Updated the recommended IOStream streams so they are now visible and can be uninstalled through the user interface. | None | Series 2 & 3 |
Chip Enablement#
Chip Family | OPNs / Boards / OPN Combinations |
---|---|
EFR32xG29 Family |
|
EFR32BG22L Family |
|
EFR32BG24L Family |
|
MGM260P Family |
|
BGM260P Family |
|
EFM32PG26 Family |
|
EFR32BG22 Family |
|
Application Example Changes#
New Examples | Modified Examples | Removed Examples | Deprecated Examples
New Examples#
Example Name | Description | Supported Software Variants (if applicable) | Supported Modes | Supported OPNs / Boards / OPN Combinations | Supported Host Interfaces |
---|---|---|---|---|---|
sht4x_i2cspm_baremetal. See readme (https://github.com/SiliconLabs/simplicity_sdk/tree/sisdk-2025.6/app/common/example/sht4x_i2cspm_baremetal/readme.md) |
This example project demonstrates how to use the I2C Simple Polled Master driver using the SHT4x Relative Humidity and Temperature Sensor in a bare-metal configuration. |
|
|||
sht4x_i2cspm_kernel_freertos. See readme (https://github.com/SiliconLabs/simplicity_sdk/tree/sisdk-2025.6/app/common/example/sht4x_i2cspm_kernel_freertos/readme.md) |
This example project demonstrates how to use the I2C Simple Polled Master driver using the SHT4X Relative Humidity and Temperature Sensor in a FreeRTOS kernel task. |
|
|||
sht4x_i2cspm_kernel_micriumos. See readme (https://github.com/SiliconLabs/simplicity_sdk/tree/sisdk-2025.6/app/common/example/sht4x_i2cspm_kernel_micriumos/readme.md) |
This example project demonstrates how to use the I2C Simple Polled Master driver using the SHT4X Relative Humidity and Temperature Sensor in a Micrium OS kernel task. |
|
|||
common_token_manager_baremetal. See readme (https://github.com/SiliconLabs/simplicity_sdk/tree/sisdk-2025.6/app/common/example/common_token_manager_baremetal/readme.md) |
This example project demonstrates use of the CTM interface. Using the command line interface, the user can write, read and delete tokens. |
|
|||
Example name. See readme (with link) |
Description of example. | List of supported software variants. |
|
|
interface-name |
Wi-Fi - Auto Join See README. |
Configure multiple SSIDs and trigger an automatic join process for them in order of priority. | Standard |
|
|
SPI |
Modified Examples#
None.
Removed Examples#
None.
Deprecated Examples#
None.
Known Issues and Limitations#
None.