Enhanced General-Purpose Input/Output (EGPIO) Low-Power Instance#

The enhanced general-purpose input/output (EGPIO) low-power instance on SiWx917 devices provides access to dedicated ultra-low-power (ULP) and ultra-ultra-low-power (UULP) GPIOs. These GPIOs are optimized for energy-efficient operation during sleep and retention modes, making them ideal for battery-powered and always-on applications.

Usage of Low-Power GPIO Instances#

ULP and UULP GPIOs enable event-driven wake-up from sleep while maintaining minimal system power consumption. They support interrupt-based wake-up, allowing the system to remain inactive until a relevant external event occurs.

ULP and UULP GPIO Features#

ULP and UULP GPIOs support low-power operation through the following capabilities:

• Operate independently of the high-performance (HP) GPIO domain.

• Function in low-power states such as PS2 (deep sleep) and PS1 (retention).

• Generate interrupt-based wake-up events to resume normal operation.

• Allow UULP GPIOs to trigger wake-up interrupts even when the microcontroller unit (MCU) is in retention or deep sleep.

• Powered by a dedicated low-frequency, always-on clock domain.

• Support configurable polarity for rising-edge or falling-edge detection.

• Optimized for low-leakage, low-frequency signaling.

These characteristics make them ideal for battery-powered IoT devices that require continuous event detection.

Why Use ULP and UULP GPIOs#

Use ULP and UULP GPIOs to reduce power consumption while still responding to external activity.

Key benefits include:

• Supporting sensor-driven wake-up without activating the main processing core.

• Enabling event-based processing during sleep states to minimize active time.

• Extending battery life in wearables, detectors, and always-on monitoring devices.

• Providing predictable wake behavior for time-critical event detection.

How ULP and UULP GPIOs Operate#

ULP and UULP GPIOs reside in power domains that remain active during sleep states. They can monitor pin transitions and trigger wake-up interrupts without requiring the HP domain or a running CPU clock.

Operational Highlights#

• ULP GPIOs operate when the MCU and peripherals enter low-power mode (PS2).

• UULP GPIOs remain operational in deeper retention or standby states.

Wake-up Behavior#

When a configured edge or level condition is detected:

1. The ULP or UULP GPIO asserts a wake-up interrupt.

2. The device transitions to the active state (PS4).

3. The registered application callback processes the event.

Low-Power Design Strategies#

To maximize power efficiency using ULP/UULP GPIOs in SiWx917-based applications:

• Use ULP GPIOs for periodic signal sampling or event-driven triggers.

• Configure interrupts for specific polarity detection to avoid false wake ups.

• Batch sensor readings to minimize MCU active duration.

• Maintain only critical pins active during deep sleep.

• Disable unused pins or peripherals before entering low-power modes.

Reconfiguring GPIOs Across Sleep and Wake Cycles#

When transitioning between power states, GPIO configurations might need to be reinitialized. To ensure consistent behavior, save and restore GPIO configuration settings before entering sleep and after waking.

Configuration Preservation Example#

// Save configuration before entering sleep
sl_gpio_get_configuration(&gpio_config);

// Transition to low-power mode
sl_si91x_power_manager_add_ps_requirement(POWER_STATE_TO_SWITCH);

// Restore configuration after wakeup
sl_gpio_set_configuration(gpio_config);

Tip: Re-register callbacks and reinitialize wake-up sources after each wake cycle.

ULP and UULP GPIO Example Project#

The WiSeConnect software development kit (SDK) includes ready-to-use example projects that demonstrate low-power GPIO usage:

• sl_si91x_ulp_gpio Example — Demonstrates ULP GPIO operation during transitions between PS4 and PS2 states.

Practical Usage Guidelines#

Instance Selection#

Handling Power-State Transitions#

• Configure GPIOs to store or restore state between PS4 → PS2 → PS4 transitions.

• Use RAM retention when preserving pin state is required.

• Disable unused pads to reduce leakage current.

Interrupt Configuration Practices#

• Select edge- or level-triggered interrupts based on sensor characteristics.

• Implement dedicated callbacks for wake-up events.

• Override weak platform callbacks in the SDK to implement application-specific logic.

Board-Level Considerations#

• Verify GPIO mappings using the SiWx917 evaluation board schematic.

• Confirm pin functionality when migrating between hardware revisions.

Best Practices#