Inter-Integrated Circuit (I²C) Appendix#

This appendix defines I²C terminology, expands acronyms, and provides examples and troubleshooting tips. Use it as a quick reference while developing with SiWx917 I²C peripherals.

Glossary#

  • I2C/I²C (Inter-Integrated Circuit) — A serial communication protocol used for connecting low-speed peripherals to processors and microcontrollers.

  • SDA (Serial Data line) — Bidirectional data line in I²C.

  • SCL (Serial Clock line) — Clock line that synchronizes transfers in I²C.

  • Leader — The device controlling the bus (also called controller).

  • Follower — The device responding to the leader (also called target).

  • DMA (Direct Memory Access) — Moves data between memory and peripherals without the involvement of the CPU.

  • FIFO (First-In, First-Out) — Buffer that outputs data in the order received.

  • ACK / NACK — Acknowledge / Not-acknowledge bits used for flow control and error signaling.

  • PSx (Power States) — Platform power modes; I²C availability depends on the state. See the Power Management section for details.

  • ULP (Ultra-Low-Power) — Subsystem/domain optimized for low power.

  • Callback — User function invoked by the driver when a specific event occurs (completion or error).

  • Event Flag / Semaphore — RTOS primitives for signaling between ISRs and tasks.

  • Simplicity Studio — Silicon Labs' integrated development environment (IDE) for embedded software development.

  • RTOS (Real-Time Operating System) — An operating system designed to serve real-time application requests.

  • Logic Analyzer — Tool to capture and inspect digital waveforms.

  • Peripheral — On-chip hardware block (e.g., I²C, SPI, UART) that communicates with the processor.

  • Power Manager — A Silicon Labs software component for managing power states, peripheral enablement, RAM retention, and wakeup sources.

  • RAM Retention — Preserving RAM contents across low-power states.

  • FIFO Threshold — Level at which FIFO generates an interrupt/event.

  • Instance — Specific I²C controller: I2C0, I2C1 (HP domain), I2C2 = ULP_I2C (ULP domain).

  • Component — A Simplicity Studio software module (e.g., ULP I²C component).

  • PS4 / PS3 / PS2 — Common power states referenced in this guide (see Clock & Power Management).

  • DEBUGINIT — Function to initialize debug logging I/O.

Acronyms#

Acronym

Definition

I2C/I²C

Inter-Integrated Circuit

SDA

Serial Data Line

SCL

Serial Clock Line

DMA

Direct Memory Access

FIFO

First-In, First-Out

ACK

Acknowledge

NACK

Not Acknowledge

ULP

Ultra-Low-Power

PS1/PS2/PS3/PS4

Power State 1/2/3/ 4

RTOS

Real-Time Operating System

GPIO

General-Purpose Input/Output

ADC

Analog-to-Digital Converter

UART

Universal Asynchronous Receiver/Transmitter

API

Application Programming Interface

SDK

Software Development Kit

SiWx917 / Si91x

Silicon Labs Wi-Fi / SoC families

SoC

System on Chip

IDE

Integrated Development Environment

Extended Examples#

Reference implementations from the WiSeConnect SDK:

These examples demonstrate how to implement I²C functionality in practical applications. Use them as reference implementations when building your own projects.

FAQ#

Q1: What’s the difference between I2C0, I2C1, and I2C2?#

  • I2C0 / I2C1 — High-performance (HP domain) instances. Support Standard (100 kbit/s), Fast (400 kbit/s), Fast-mode Plus (1 Mbit/s), and High-Speed (3.4 Mbit/s).

  • I2C2 (ULP_I2C) — Ultra-Low-Power domain instance. Supports Standard and Fast and is available in PS2 Active (see Clock & Power Management).

  • In the SDK, these map to sl_i2c_instance_t: SL_I2C0, SL_I2C1, and SL_I2C2 (alias SL_ULP_I2C).

Q2: How do I use I²C in low-power modes (PS2/PS1)?#

  • Use I2C2 (ULP I2C) for communication in PS2 or PS1.

  • Verify that the ULP I²C component is installed in Simplicity Studio.

  • Configure power states using the Power Manager component.

  • Reinitialize the peripheral after wakeup using sl_si91x_i2c_init().

Q3: What should I do before entering a sleep state?#

  • Ensure no transfer is in progress (wait for completion or cancel per your app logic).

  • If needed, deinitialize the instance cleanly with sl_i2c_driver_deinit(...).

  • Reinitialize with sl_i2c_driver_init(...) after wake if your application power-gates the peripheral or reconfigures clocks.

Q4: How do I recover from I²C errors or a stuck bus?#

  • Try a driver reset sequence: sl_i2c_driver_deinit(...) → sl_i2c_driver_init(...).

  • Inspect your callback/status for NACK, arbitration lost, or bus error and handle accordingly (retry with backoff, check wiring/pull-ups).

  • If the bus is held low by a device, a bus-clear (toggling SCL while SDA is low) may be required at the system level.

Q5: What status values should I expect from I²C APIs?#

The driver returns sl_i2c_status_t values. Common ones include:

Status

Meaning

SL_I2C_SUCCESS

Operation completed successfully

SL_I2C_NACK

Not-acknowledge received

SL_I2C_BUS_ERROR

Bus error detected

SL_I2C_DATA_TRANSFER_COMPLETE

Transfer complete

SL_I2C_IDLE

Controller is idle

Check the SDK header for the full list and bit definitions (sl_i2c_status_t enumeration in sl_si91x_i2c.h) - https://github.com/SiliconLabs/wiseconnect/blob/master/components/device/silabs/si91x/mcu/drivers/unified_api/inc/sl_si91x_i2c.h

Q6: How can I debug I²C communication issues?#

  • Use a logic analyzer to verify START/STOP, address, ACK/NACK, and clock stretching on the SDA/SCL lines.

  • Check pull-ups (SDA/SCL) and bus length — especially at Fast mode plus/High speed speeds.

  • In Simplicity Studio, use:

    • Peripheral configuration views to confirm instance/pinmux/speed.

    • Power analysis to ensure the instance is available in your power state.

    • RTOS-aware debugging to trace task/ISR interactions.

Q7: Where can I find example code?#