Bluetooth Feature Bitmap#

This section provides a reference to the Bluetooth feature bitmap in the boot configuration.

Macros#

#define
SL_SI91X_BT_BDR_MODE_ENABLE BIT(0)

BT Mode Enable.

#define
SL_SI91X_BT_BDR_MODE_LP_CHAIN_ENABLE BIT(1)

BT Mode LP Chain Enable.

#define
SL_SI91X_BT_PWR_CTRL_DISABLE BIT(2)

BT Power Control Disable.

#define
SL_SI91X_BT_EDR_3MBPS_DISABLE BIT(8)

BT EDR 3Mbps Feature Disable.

#define
SL_SI91X_BT_EDR_2MBPS_DISABLE BIT(9)

BT EDR 2Mbps Feature Disable.

#define
SL_SI91X_BT_5_SLOT_PACKETS_DISABLE BIT(10)

BT 5 Slot Packet Feature Disable.

#define
SL_SI91X_BT_3_SLOT_PACKETS_DISABLE BIT(11)

BT 3 Slot Packet Feature Disable.

#define
SL_SI91X_TA_BASED_ENCODER_ENABLE BIT(14)

TA based encoder.

#define
SL_SI91X_HFP_PROFILE_ENABLE BIT(15)

To enable HFP profile.

#define
SL_SI91X_A2DP_PROFILE_ENABLE BIT(23)

To enable A2DP profile.

#define
SL_SI91X_A2DP_SOURCE_ROLE_ENABLE BIT(24)

To enable A2DP Profile role as source/sink.

#define
SL_SI91X_A2DP_ACCELERATOR_MODE_ENABLE BIT(25)

To enable A2DP Accelerator mode.

#define
SL_SI91X_BT_BLE_CP_BUFF_SIZE BIT(27)

To enable Buffer Alignment for Test Mode.

#define
SL_SI91X_BT_ATT_OVER_CLASSIC_ACL BIT(29)

Note

  • Bit 28 is reserved

#define
SL_SI91X_BT_RF_TYPE BIT(30)

To bt rf type.

#define
SL_SI91X_ENABLE_BLE_PROTOCOL BIT(31)

To enable ble protocol.

Macro Definition Documentation#

SL_SI91X_BT_BDR_MODE_ENABLE#

#define SL_SI91X_BT_BDR_MODE_ENABLE
Value:
BIT(0)

BT Mode Enable.

Note

  • If this Bit sets, then our Controller will sends/receives the packets in 1Mbps mode. Else, Controller will be operable in both BR/EDR mode


SL_SI91X_BT_BDR_MODE_LP_CHAIN_ENABLE#

#define SL_SI91X_BT_BDR_MODE_LP_CHAIN_ENABLE
Value:
BIT(1)

BT Mode LP Chain Enable.


SL_SI91X_BT_PWR_CTRL_DISABLE#

#define SL_SI91X_BT_PWR_CTRL_DISABLE
Value:
BIT(2)

BT Power Control Disable.

Note

  • To make Fixed/Adaptive Power


SL_SI91X_BT_EDR_3MBPS_DISABLE#

#define SL_SI91X_BT_EDR_3MBPS_DISABLE
Value:
BIT(8)

BT EDR 3Mbps Feature Disable.

Note

  • Bit 3-7 are reserved

  • 3Mbps Disable means using 2Mbps DataRate


SL_SI91X_BT_EDR_2MBPS_DISABLE#

#define SL_SI91X_BT_EDR_2MBPS_DISABLE
Value:
BIT(9)

BT EDR 2Mbps Feature Disable.

@note2Mbps Disable means using 3Mbps DataRate


SL_SI91X_BT_5_SLOT_PACKETS_DISABLE#

#define SL_SI91X_BT_5_SLOT_PACKETS_DISABLE
Value:
BIT(10)

BT 5 Slot Packet Feature Disable.


SL_SI91X_BT_3_SLOT_PACKETS_DISABLE#

#define SL_SI91X_BT_3_SLOT_PACKETS_DISABLE
Value:
BIT(11)

BT 3 Slot Packet Feature Disable.


SL_SI91X_TA_BASED_ENCODER_ENABLE#

#define SL_SI91X_TA_BASED_ENCODER_ENABLE
Value:
BIT(14)

TA based encoder.

Note

  • Bits 12-13 bit are reserved

  • To Enable/Disable SBC Encoder in Firmware.This feature is not supported in the current release


SL_SI91X_HFP_PROFILE_ENABLE#

#define SL_SI91X_HFP_PROFILE_ENABLE
Value:
BIT(15)

To enable HFP profile.

Note

  • This feature is not supported in the current release


SL_SI91X_A2DP_PROFILE_ENABLE#

#define SL_SI91X_A2DP_PROFILE_ENABLE
Value:
BIT(23)

To enable A2DP profile.

Note

  • Bits 16 - 22 are reserved


SL_SI91X_A2DP_SOURCE_ROLE_ENABLE#

#define SL_SI91X_A2DP_SOURCE_ROLE_ENABLE
Value:
BIT(24)

To enable A2DP Profile role as source/sink.


SL_SI91X_A2DP_ACCELERATOR_MODE_ENABLE#

#define SL_SI91X_A2DP_ACCELERATOR_MODE_ENABLE
Value:
BIT(25)

To enable A2DP Accelerator mode.

Note

  • This feature is not supported in the current release


SL_SI91X_BT_BLE_CP_BUFF_SIZE#

#define SL_SI91X_BT_BLE_CP_BUFF_SIZE
Value:
BIT(27)

To enable Buffer Alignment for Test Mode.

Note

  • Bit 26 is reserved

  • To get 512 bytes from common pool, need to enable this, else 320 bytes will be fixed


SL_SI91X_BT_ATT_OVER_CLASSIC_ACL#

#define SL_SI91X_BT_ATT_OVER_CLASSIC_ACL
Value:
BIT(29)

Note

  • Bit 28 is reserved


SL_SI91X_BT_RF_TYPE#

#define SL_SI91X_BT_RF_TYPE
Value:
BIT(30)

To bt rf type.


SL_SI91X_ENABLE_BLE_PROTOCOL#

#define SL_SI91X_ENABLE_BLE_PROTOCOL
Value:
BIT(31)

To enable ble protocol.