Configuration Feature Bitmap#

SL_SI91X_FEAT_SLEEP_GPIO_SEL_BITMAP#

#define SL_SI91X_FEAT_SLEEP_GPIO_SEL_BITMAP

BIT(0)

To select wakeup indication to host. If it is disabled UULP_GPIO_3 is used as a wakeup indication to host. If it is enabled UULP_GPIO_0 is used as a wakeup indication to host.

SL_SI91X_FEAT_DVS_SEL_CONFIG_1#

#define SL_SI91X_FEAT_DVS_SEL_CONFIG_1

BIT(2)

DVS Dynamic Voltage Selection.

Note

• Bit 1 is reserved

• These bits are used for dynamic voltage selection Dynamic Voltage selection configuration 1

SL_SI91X_FEAT_DVS_SEL_CONFIG_2#

#define SL_SI91X_FEAT_DVS_SEL_CONFIG_2

BIT(3)

Dynamic Voltage selection configuration 2.

SL_SI91X_FEAT_DVS_SEL_CONFIG_3#

#define SL_SI91X_FEAT_DVS_SEL_CONFIG_3

BIT(4)

Dynamic Voltage selection configuration 3.

SL_SI91X_FEAT_DVS_SEL_CONFIG_4#

#define SL_SI91X_FEAT_DVS_SEL_CONFIG_4

BIT(5)

Dynamic Voltage selection configuration 4.

SL_SI91X_EXTERNAL_PMU_GOOD_TIME_100us#

#define SL_SI91X_EXTERNAL_PMU_GOOD_TIME_100us

BIT(6)

External PMU Selection.

Note

• These bits are used to select external PMU good time.1 to 15 means 100 usec to 1500 usec (in 100 usec granularity) 100us External PMU Good time

SL_SI91X_EXTERNAL_PMU_GOOD_TIME_200us#

#define SL_SI91X_EXTERNAL_PMU_GOOD_TIME_200us

BIT(7)

200us External PMU Good time

SL_SI91X_EXTERNAL_PMU_GOOD_TIME_300us#

#define SL_SI91X_EXTERNAL_PMU_GOOD_TIME_300us

(BIT(6) | BIT(7))

300us External PMU Good time

SL_SI91X_EXTERNAL_PMU_GOOD_TIME_400us#

#define SL_SI91X_EXTERNAL_PMU_GOOD_TIME_400us

BIT(8)

400us External PMU Good time

SL_SI91X_EXTERNAL_PMU_GOOD_TIME_500us#

#define SL_SI91X_EXTERNAL_PMU_GOOD_TIME_500us

(BIT(6) | BIT(8))

500us External PMU Good time

SL_SI91X_EXTERNAL_PMU_GOOD_TIME_600us#

#define SL_SI91X_EXTERNAL_PMU_GOOD_TIME_600us

(BIT(7) | BIT(8))

600us External PMU Good time

SL_SI91X_EXTERNAL_PMU_GOOD_TIME_700us#

#define SL_SI91X_EXTERNAL_PMU_GOOD_TIME_700us

(BIT(6) | BIT(7) | BIT(8))

700us External PMU Good time

SL_SI91X_EXTERNAL_PMU_GOOD_TIME_800us#

#define SL_SI91X_EXTERNAL_PMU_GOOD_TIME_800us

BIT(9)

800us External PMU Good time

SL_SI91X_EXTERNAL_PMU_GOOD_TIME_900us#

#define SL_SI91X_EXTERNAL_PMU_GOOD_TIME_900us

(BIT(6) | BIT(9))

900us External PMU Good time

SL_SI91X_EXTERNAL_PMU_GOOD_TIME_1000us#

#define SL_SI91X_EXTERNAL_PMU_GOOD_TIME_1000us

(BIT(7) | BIT(9))

1000us External PMU Good time

SL_SI91X_EXTERNAL_PMU_GOOD_TIME_1100us#

#define SL_SI91X_EXTERNAL_PMU_GOOD_TIME_1100us

(BIT(6) | BIT(7) | BIT(9))

1100us External PMU Good time

SL_SI91X_EXTERNAL_PMU_GOOD_TIME_1200us#

#define SL_SI91X_EXTERNAL_PMU_GOOD_TIME_1200us

(BIT(8) | BIT(9))

1200us External PMU Good time

SL_SI91X_EXTERNAL_PMU_GOOD_TIME_1300us#

#define SL_SI91X_EXTERNAL_PMU_GOOD_TIME_1300us

(BIT(6) | BIT(8) | BIT(9))

1300us External PMU Good time

SL_SI91X_EXTERNAL_PMU_GOOD_TIME_1400us#

#define SL_SI91X_EXTERNAL_PMU_GOOD_TIME_1400us

(BIT(7) | BIT(8) | BIT(9))

1400us External PMU Good time

SL_SI91X_EXTERNAL_PMU_GOOD_TIME_1500us#

#define SL_SI91X_EXTERNAL_PMU_GOOD_TIME_1500us

(BIT(6) | BIT(7) | BIT(8) | BIT(9))

1500us External PMU Good time

SL_SI91X_FEAT_EXTERNAL_LDO_SEL#

#define SL_SI91X_FEAT_EXTERNAL_LDO_SEL

BIT(10)

External LDO voltage selection.

Note

• These bits are used for External LDO selection External PMU : 1.In case of External PMU, User has to set EXTERNAL_PMU_GOOD_TIME_CONFIGURATION value to external PMU good time, If this is zero then it indicates using Internal PMU. 2. Incase of External PMU 1.0v or 1.05v, User has to set both the bits config_feature_bit_map[11] & config_feature_bit_map[10].

SL_SI91X_FEAT_EXTERNAL_LDO_VOL#

#define SL_SI91X_FEAT_EXTERNAL_LDO_VOL

BIT(11)

This field valid only if RSI_FEAT_EXTERNAL_LDO_SEL is enabled i.e BIT(10) is set.

If this bit set means 1.0V selected else 1.1V selected

SL_SI91X_FEAT_EAP_TLS_V1P0#

#define SL_SI91X_FEAT_EAP_TLS_V1P0

BIT(14)

Note

• Bit 12 -13 are reserved TLS version Enterprise security TLS version 1.0

SL_SI91X_FEAT_EAP_TLS_V1P2#

#define SL_SI91X_FEAT_EAP_TLS_V1P2

BIT(15)

Enterprise security TLS version 1.2.

SL_SI91X_FEAT_CONC_STA_AP_DYN_SWITCH_SEL#

#define SL_SI91X_FEAT_CONC_STA_AP_DYN_SWITCH_SEL

BIT(17)

Reserved bit.

Note

• Bit 16 is reserved

SL_SI91X_ULP_GPIO9_FOR_UART2_TX#

#define SL_SI91X_ULP_GPIO9_FOR_UART2_TX

BIT(18)

Bit to select ULP_GPIO_9 as UART2 port for device network processor debug prints. If this bit is not set, then by default UART2-TX GPIO_6 will be used.

Bit to disable MCS-5,6,7 data rates

SL_SI91X_FEAT_DISABLE_MCS_5_6_7_DATARATES#

#define SL_SI91X_FEAT_DISABLE_MCS_5_6_7_DATARATES

BIT(19)

Bit to disable Short-GI.

SL_SI91X_FEAT_DISABLE_SHORT_GI#

#define SL_SI91X_FEAT_DISABLE_SHORT_GI

BIT(20)

SL_SI91X_PTA_3WIRE_EN#

#define SL_SI91X_PTA_3WIRE_EN

BIT(21)

To enable PTA-3WIRE.

Note

• Should be set to enable and use the PTA 3 wire feature followed by available configurations

SL_SI91X_PTA_3WIRE_CONFIG_SEL#

#define SL_SI91X_PTA_3WIRE_CONFIG_SEL

(config_sel)

To choose PTA-3WIRE.

Note

• Configurability options for config selection among 1,2 & 3

• Bit 22 - 23 are used to set NUM_CONN_EVENTS

• 0 kept reserved for future. 3wire used at DUT as ULP_GPIO_0(Grant pin driven by DUT), ULP_GPIO_1(Request i/p pin for dut) and ULP_GPIO_6(Priority i/p pin for dut)

  Mode(KB)	BIT[23]	BIT[22]
  Reserved	0	0
  config1	0	1
  config2	1	0
  config3	1	1

SL_SI91X_XTAL_GOODTIME_1000us#

#define SL_SI91X_XTAL_GOODTIME_1000us

0

XTAL goodtime configurations.

Note

• These bits are used to select XTAL good time. These changes are available from Release 2.3.0 onward. Release prior to 2.3.0 these config_feature_bitmap[31:17] are reserved. Its only applicable for customers using chip not the device. Contact Support for more details Default value is 1000 us. 1000us XTAL Good Time

SL_SI91X_XTAL_GOODTIME_2000us#

#define SL_SI91X_XTAL_GOODTIME_2000us

BIT(24)

2000us XTAL Good Time

SL_SI91X_XTAL_GOODTIME_3000us#

#define SL_SI91X_XTAL_GOODTIME_3000us

BIT(25)

3000us XTAL Good Time

SL_SI91X_XTAL_GOODTIME_600us#

#define SL_SI91X_XTAL_GOODTIME_600us

(BIT(24) | BIT(25))

600us XTAL Good Time

SL_SI91X_ENABLE_ENHANCED_MAX_PSP#

#define SL_SI91X_ENABLE_ENHANCED_MAX_PSP

BIT(26)

Bit to enable Enhanced Max PSP.

SL_SI91X_ENABLE_DEBUG_BBP_TEST_PINS#

#define SL_SI91X_ENABLE_DEBUG_BBP_TEST_PINS

BIT(27)

Bit to enable BBP Test Pins.