Configuring a Linux Host#

Configuring a Linux Host with an EFR32-based NCP is relatively straightforward with application framework support in the EmberZNet SDK. In this case, the application framework support takes care of the necessary configuration of a typical Linux-based host to work with an EFR32-based NCP, and developers do not have to go through every detail in the preceding sections in this document in order to start implementing a host application. We still recommend that you become familiar with the information here, especially the SPI protocol transaction concepts and examples and timing requirements.

By default, the EmberZNet SDK selects an EZSP UART interface to communicate with the NCP. In EmberZNet 6.x, to enable SPI, you must remove the EZSP UART plugin from your project and replace it with the EZSP SPI plugin. In EmberZNet 7.x, you must remove the NCP UART Hardware Flow Control component from your project and replace it with the SPI NCP component. You may do this from the Plugins tab in Simplicity Studio’s Simplicity IDE. For more help on using Simplicity Studio and EmberZNet SDK, refer to QSG106: Getting Started with EmberZNet PRO if using EmberZNet 6.x, or Zigbee EmberZNet v7.x Quick-Start Guide for EmberZNet 7.x.

In EmberZNet 6.x, save the project and generate its files. After generating the project, you must edit the generated board header file to configure the hardware settings for the project. The board header file is located in the generated project folder and is named <projectname>_board.h. The following macros can optionally be defined in this board header to specify the hardware configuration for the SPI driver. To preserve these changes, do not overwrite this file if you need to generate project files again. In EmberZNet 7.x, the configuration for the SPI driver must be done through the Driver > SPI component configuration.

Note: Any macro not defined in the board header file will revert to the defaults values as shown here.

Macro

Default Value

#define NCP_SPI_DEVICE

"/dev/spidev0.0"

#define NCP_SPI_MODE

0

#define NCP_SPI_SPEED_HZ

(1024 * 1024) // 1 MHz

#define NCP_CHIP_SELECT_GPIO

"8"

#define NCP_HOST_INT_GPIO

"22"

#define NCP_RESET_GPIO

"23"

#define NCP_WAKE_GPIO

"24"

#define NCP_RESET_DELAY_US

26