VDAC - Voltage DAC

Description

Digital to Analog Voltage Converter (VDAC) Peripheral API.

This module contains functions to control the VDAC peripheral of Silicon Labs' 32-bit MCUs and SoCs. VDAC converts digital values to analog signals at up to 500 ksps with 12-bit accuracy. VDAC is designed for low energy consumption, but can also provide very good performance.

The following steps are necessary for basic operation:

Clock enable:

Initialize the VDAC with default settings and modify selected fields:

// Set prescaler to get 1 MHz VDAC clock frequency.
vdacInit. prescaler = VDAC_PrescaleCalc (1000000, true , 0); // function call for series 0/1
VDAC_Init (VDAC0, &vdacInit);
vdacChInit. enable = true ;
VDAC_InitChannel (VDAC0, &vdacChInit, 0);

Perform a conversion:

VDAC_ChannelOutputSet (VDAC0, 0, 250);
Note
The output stage of a VDAC channel consists of an on-chip operational amplifier (OPAMP) in the OPAMP module. This OPAMP is highly configurable; and to exploit the VDAC functionality fully, configure the OPAMP using the OPAMP API. Using the OPAMP API also loads OPAMP calibration values. The default (reset) settings of OPAMP is sufficient for many applications.

Data Structures

struct VDAC_Init_TypeDef
VDAC initialization structure, common for both channels.
struct VDAC_InitChannel_TypeDef
VDAC channel initialization structure.

Functions

void VDAC_ChannelOutputSet (VDAC_TypeDef *vdac, unsigned int channel, uint32_t value)
Set the output signal of a VDAC channel to a given value.
void VDAC_Enable (VDAC_TypeDef *vdac, unsigned int ch, bool enable)
Enable/disable the VDAC channel.
void VDAC_Init (VDAC_TypeDef *vdac, const VDAC_Init_TypeDef *init)
Initialize VDAC.
void VDAC_InitChannel (VDAC_TypeDef *vdac, const VDAC_InitChannel_TypeDef *init, unsigned int ch)
Initialize a VDAC channel.
void VDAC_SineModeStart (VDAC_TypeDef *vdac, bool start)
Start/stop Sinemode.
void VDAC_Channel0OutputSet (VDAC_TypeDef *vdac, uint32_t value)
Set the output signal of VDAC channel 0 to a given value.
void VDAC_Channel1OutputSet (VDAC_TypeDef *vdac, uint32_t value)
Set the output signal of VDAC channel 1 to a given value.
void VDAC_IntClear (VDAC_TypeDef *vdac, uint32_t flags)
Clear one or more pending VDAC interrupts.
void VDAC_IntDisable (VDAC_TypeDef *vdac, uint32_t flags)
Disable one or more VDAC interrupts.
void VDAC_IntEnable (VDAC_TypeDef *vdac, uint32_t flags)
Enable one or more VDAC interrupts.
uint32_t VDAC_IntGet (VDAC_TypeDef *vdac)
Get pending VDAC interrupt flags.
uint32_t VDAC_IntGetEnabled (VDAC_TypeDef *vdac)
Get enabled and pending VDAC interrupt flags.
void VDAC_IntSet (VDAC_TypeDef *vdac, uint32_t flags)
Set one or more pending VDAC interrupts from SW.
uint32_t VDAC_GetStatus (VDAC_TypeDef *vdac)
Get the VDAC Status register.
uint32_t VDAC_PrescaleCalc (VDAC_TypeDef *vdac, uint32_t vdacFreq)
Calculate the prescaler value used to determine VDAC clock.
void VDAC_Reset (VDAC_TypeDef *vdac)
Reset VDAC to same state that it was in after a hardwares reset.

Macros

#define VDAC_INIT_DEFAULT
Default configuration for VDAC initialization structure.
#define VDAC_INIT_SINE_GENERATION_MODE
Sine mode configuration for VDAC initialization structure.
#define VDAC_INITCHANNEL_DEFAULT
Default configuration for VDAC channel initialization structure.

Enumerations

enum VDAC_Refresh_TypeDef {
vdacRefresh2 = _VDAC_CFG_REFRESHPERIOD_CYCLES2,
vdacRefresh4 = _VDAC_CFG_REFRESHPERIOD_CYCLES4,
vdacRefresh8 = _VDAC_CFG_REFRESHPERIOD_CYCLES8,
vdacRefresh16 = _VDAC_CFG_REFRESHPERIOD_CYCLES16,
vdacRefresh32 = _VDAC_CFG_REFRESHPERIOD_CYCLES32,
vdacRefresh64 = _VDAC_CFG_REFRESHPERIOD_CYCLES64,
vdacRefresh128 = _VDAC_CFG_REFRESHPERIOD_CYCLES128,
vdacRefresh256 = _VDAC_CFG_REFRESHPERIOD_CYCLES256
}
Channel refresh period.
enum VDAC_TimerOverflow_TypeDef {
vdacCycles2 = _VDAC_CFG_TIMEROVRFLOWPERIOD_CYCLES2,
vdacCycles4 = _VDAC_CFG_TIMEROVRFLOWPERIOD_CYCLES4,
vdacCycles8 = _VDAC_CFG_TIMEROVRFLOWPERIOD_CYCLES8,
vdacCycles16 = _VDAC_CFG_TIMEROVRFLOWPERIOD_CYCLES16,
vdacCycles32 = _VDAC_CFG_TIMEROVRFLOWPERIOD_CYCLES32,
vdacCycles64 = _VDAC_CFG_TIMEROVRFLOWPERIOD_CYCLES64
}
Timer overflow period.
enum VDAC_Ref_TypeDef {
vdacRef1V25 = _VDAC_CFG_REFRSEL_V125,
vdacRef2V5 = _VDAC_CFG_REFRSEL_V25,
vdacRefAvdd = _VDAC_CFG_REFRSEL_VDD,
vdacRefExtPin = _VDAC_CFG_REFRSEL_EXT
}
Reference voltage for VDAC.
enum VDAC_RefreshSource_TypeDef {
vdacRefreshSrcNone = _VDAC_CH0CFG_REFRESHSOURCE_NONE,
vdacRefreshSrcRefreshTimer = _VDAC_CH0CFG_REFRESHSOURCE_REFRESHTIMER,
vdacRefreshSrcSyncPrs = _VDAC_CH0CFG_REFRESHSOURCE_SYNCPRS,
vdacRefreshSrcAsyncPrs = _VDAC_CH0CFG_REFRESHSOURCE_ASYNCPRS
}
Refresh source for VDAC.
enum VDAC_TrigMode_TypeDef {
vdacTrigModeNone = _VDAC_CH0CFG_TRIGMODE_NONE,
vdacTrigModeSw = _VDAC_CH0CFG_TRIGMODE_SW,
vdacTrigModeSyncPrs = _VDAC_CH0CFG_TRIGMODE_SYNCPRS,
vdacTrigModeLesense = _VDAC_CH0CFG_TRIGMODE_LESENSE,
vdacTrigModeInternalTimer = _VDAC_CH0CFG_TRIGMODE_INTERNALTIMER,
vdacTrigModeAsyncPrs = _VDAC_CH0CFG_TRIGMODE_ASYNCPRS
}
Channel conversion trigger mode.
enum VDAC_PowerMode_TypeDef {
vdacPowerModeHighPower = _VDAC_CH0CFG_POWERMODE_HIGHPOWER,
vdacPowerModeLowPower = _VDAC_CH0CFG_POWERMODE_LOWPOWER
}
Channel power mode.
enum VDAC_ChPortSel_t {
vdacChPortNone = _VDAC_OUTCTRL_ABUSPORTSELCH0_NONE,
vdacChPortA = _VDAC_OUTCTRL_ABUSPORTSELCH0_PORTA,
vdacChPortB = _VDAC_OUTCTRL_ABUSPORTSELCH0_PORTB,
vdacChPortC = _VDAC_OUTCTRL_ABUSPORTSELCH0_PORTC,
vdacChPortD = _VDAC_OUTCTRL_ABUSPORTSELCH0_PORTD
}
VDAC channel Abus port selection.

Function Documentation

VDAC_ChannelOutputSet()

void VDAC_ChannelOutputSet ( VDAC_TypeDef * vdac,
unsigned int channel,
uint32_t value
)

Set the output signal of a VDAC channel to a given value.

This function sets the output signal of a VDAC channel by writing value to the corresponding CHnDATA register.

Parameters
[in] vdac A pointer to the VDAC peripheral register block.
[in] channel A channel number to set the output of.
[in] value A value to write to the channel output register CHnDATA.

VDAC_Enable()

void VDAC_Enable ( VDAC_TypeDef * vdac,
unsigned int ch,
bool enable
)

Enable/disable the VDAC channel.

Parameters
[in] vdac A pointer to the VDAC peripheral register block.
[in] ch A channel to enable/disable.
[in] enable True to enable VDAC channel, false to disable.

VDAC_Init()

void VDAC_Init ( VDAC_TypeDef * vdac,
const VDAC_Init_TypeDef * init
)

Initialize VDAC.

Initializes the common parts for both channels. This function will also load calibration values from the Device Information (DI) page into the VDAC calibration register. To complete a VDAC setup, channel control configuration must also be done. See VDAC_InitChannel() .

Note
This function will disable both channels prior to configuration.
Parameters
[in] vdac A pointer to the VDAC peripheral register block.
[in] init A pointer to the VDAC initialization structure.

VDAC_InitChannel()

void VDAC_InitChannel ( VDAC_TypeDef * vdac,
const VDAC_InitChannel_TypeDef * init,
unsigned int ch
)

Initialize a VDAC channel.

Parameters
[in] vdac A pointer to the VDAC peripheral register block.
[in] init A pointer to the VDAC channel initialization structure.
[in] ch A channel number to initialize.

VDAC_SineModeStart()

void VDAC_SineModeStart ( VDAC_TypeDef * vdac,
bool start
)
inline

Start/stop Sinemode.

This function sends the sine mode start/stop signal to the DAC.

Parameters
[in] vdac Pointer to VDAC peripheral register block.
[in] start True to start the Sine mode, false to stop it.

VDAC_Channel0OutputSet()

void VDAC_Channel0OutputSet ( VDAC_TypeDef * vdac,
uint32_t value
)
inline

Set the output signal of VDAC channel 0 to a given value.

This function sets the output signal of VDAC channel 0 by writing value to the CH0DATA register.

Parameters
[in] vdac Pointer to VDAC peripheral register block.
[in] value Value to write to channel 0 output register CH0DATA.

VDAC_Channel1OutputSet()

void VDAC_Channel1OutputSet ( VDAC_TypeDef * vdac,
uint32_t value
)
inline

Set the output signal of VDAC channel 1 to a given value.

This function sets the output signal of VDAC channel 1 by writing value to the CH1DATA register.

Parameters
[in] vdac Pointer to VDAC peripheral register block.
[in] value Value to write to channel 1 output register CH1DATA.

VDAC_IntClear()

void VDAC_IntClear ( VDAC_TypeDef * vdac,
uint32_t flags
)
inline

Clear one or more pending VDAC interrupts.

Parameters
[in] vdac Pointer to VDAC peripheral register block.
[in] flags Pending VDAC interrupt source to clear. Use a bitwise logic OR combination of valid interrupt flags for the VDAC module (VDAC_IF_nnn).

VDAC_IntDisable()

void VDAC_IntDisable ( VDAC_TypeDef * vdac,
uint32_t flags
)
inline

Disable one or more VDAC interrupts.

Parameters
[in] vdac Pointer to VDAC peripheral register block.
[in] flags VDAC interrupt sources to disable. Use a bitwise logic OR combination of valid interrupt flags for the VDAC module (VDAC_IF_nnn).

VDAC_IntEnable()

void VDAC_IntEnable ( VDAC_TypeDef * vdac,
uint32_t flags
)
inline

Enable one or more VDAC interrupts.

Note
Depending on the use, a pending interrupt may already be set prior to enabling the interrupt. To ignore a pending interrupt, consider using VDAC_IntClear() prior to enabling the interrupt.
Parameters
[in] vdac Pointer to VDAC peripheral register block.
[in] flags VDAC interrupt sources to enable. Use a bitwise logic OR combination of valid interrupt flags for the VDAC module (VDAC_IF_nnn).

VDAC_IntGet()

uint32_t VDAC_IntGet ( VDAC_TypeDef * vdac )
inline

Get pending VDAC interrupt flags.

Note
The event bits are not cleared by the use of this function.
Parameters
[in] vdac Pointer to VDAC peripheral register block.
Returns
VDAC interrupt sources pending. Use a bitwise logic OR combination of valid interrupt flags for the VDAC module (VDAC_IF_nnn).

VDAC_IntGetEnabled()

uint32_t VDAC_IntGetEnabled ( VDAC_TypeDef * vdac )
inline

Get enabled and pending VDAC interrupt flags.

Useful for handling more interrupt sources in the same interrupt handler.

Parameters
[in] vdac Pointer to VDAC peripheral register block.
Note
Interrupt flags are not cleared by the use of this function.
Returns
Pending and enabled VDAC interrupt sources. The return value is the bitwise AND combination of
  • the OR combination of enabled interrupt sources in VDACx_IEN_nnn register (VDACx_IEN_nnn) and
  • the OR combination of valid interrupt flags of the VDAC module (VDACx_IF_nnn).

VDAC_IntSet()

void VDAC_IntSet ( VDAC_TypeDef * vdac,
uint32_t flags
)
inline

Set one or more pending VDAC interrupts from SW.

Parameters
[in] vdac Pointer to VDAC peripheral register block.
[in] flags VDAC interrupt sources to set to pending. Use a bitwise logic OR combination of valid interrupt flags for the VDAC module (VDAC_IF_nnn).

VDAC_GetStatus()

uint32_t VDAC_GetStatus ( VDAC_TypeDef * vdac )
inline

Get the VDAC Status register.

Parameters
[in] vdac Pointer to VDAC peripheral register block.
Returns
Current STATUS register value.

VDAC_PrescaleCalc()

uint32_t VDAC_PrescaleCalc ( VDAC_TypeDef * vdac,
uint32_t vdacFreq
)

Calculate the prescaler value used to determine VDAC clock.

The VDAC clock is given by the input clock divided by the prescaler+1.

VDAC_CLK = IN_CLK / (prescale + 1)

The maximum VDAC clock is 1 MHz.

Note
If the requested VDAC frequency is low and the maximum prescaler value can't adjust the actual VDAC frequency lower than requested, the maximum prescaler value is returned resulting in a higher VDAC frequency than requested.
Parameters
[in] vdac Pointer to VDAC peripheral register block.
[in] vdacFreq VDAC frequency target. The frequency will automatically be adjusted to be below maximum allowed VDAC clock.
Returns
A prescaler value to use for VDAC to achieve a clock value less than or equal to vdacFreq .

VDAC_Reset()

void VDAC_Reset ( VDAC_TypeDef * vdac )

Reset VDAC to same state that it was in after a hardwares reset.

Parameters
[in] vdac A pointer to the VDAC peripheral register block.

Macro Definition Documentation

VDAC_INIT_DEFAULT

#define VDAC_INIT_DEFAULT
Value:
{ \
_VDAC_CFG_WARMUPTIME_DEFAULT, /* Number of prescaled DAC_CLK for Vdac to warmup. */ \
false, /* Continue while debugging. */ \
true, /* On demand clock. */ \
false, /* DMA wake up. */ \
false, /* Bias keep warm. */ \
vdacRefresh8, /* Refresh every 8th cycle. */ \
vdacCycles2, /* Internal overflow every 8th cycle. */ \
0, /* No prescaling. */ \
vdacRef1V25, /* 1.25 V internal low noise reference. */ \
false, /* Do not reset prescaler on CH 0 start. */ \
false, /* Sine wave is stopped at the sample its currently outputting. */ \
false, /* Disable sine mode. */ \
false, /* Differential mode. */ \
}

Default configuration for VDAC initialization structure.

VDAC_INIT_SINE_GENERATION_MODE

#define VDAC_INIT_SINE_GENERATION_MODE
Value:
{ \
_VDAC_CFG_WARMUPTIME_DEFAULT, /* Number of prescaled DAC_CLK for Vdac to warmup. */ \
false, /* Continue while debugging. */ \
true, /* On demand clock. */ \
false, /* DMA wake up. */ \
false, /* Bias keep warm. */ \
vdacRefresh8, /* Refresh every 8th cycle. */ \
vdacCycles2, /* Internal overflow every 8th cycle. */ \
0, /* No prescaling. */ \
vdacRef1V25, /* 1.25 V internal low noise reference. */ \
false, /* Do not reset prescaler on CH 0 start. */ \
false, /* Sine wave is stopped at the sample its currently outputting. */ \
true, /* Enable sine mode. */ \
false, /* Differential mode. */ \
}

Sine mode configuration for VDAC initialization structure.

VDAC_INITCHANNEL_DEFAULT

#define VDAC_INITCHANNEL_DEFAULT
Value:
{ \
false, /* Leave channel disabled when initialization is done. */ \
false, /* Turn off between sample off conversions.*/ \
true, /* Enable High cap mode. */ \
0, /* FIFO data low watermark at 0. */ \
vdacRefreshSrcNone, /* Channel refresh source. */ \
vdacTrigModeSw, /* Conversion trigged by CH0DATA or COMBDATA write. */ \
vdacPowerModeHighPower, /* High power mode enabled. */ \
false, /* Continuous conversion mode. */ \
0, /* ABUS pin selected. */ \
vdacChPortNone, /* No Analog bus port selected. */ \
false, /* Output not shorted */ \
false, /* Alternative output disabled. */ \
true, /* Main output enabled. */ \
0, /* Hold out time. Previously called settle time */ \
}

Default configuration for VDAC channel initialization structure.

Enumeration Type Documentation

VDAC_Refresh_TypeDef

Channel refresh period.

Enumerator
vdacRefresh2

Refresh every 2 clock cycles.

vdacRefresh4

Refresh every 4 clock cycles.

vdacRefresh8

Refresh every 8 clock cycles.

vdacRefresh16

Refresh every 16 clock cycles.

vdacRefresh32

Refresh every 32 clock cycles.

vdacRefresh64

Refresh every 64 clock cycles.

vdacRefresh128

Refresh every 128 clock cycles.

vdacRefresh256

Refresh every 256 clock cycles.

VDAC_TimerOverflow_TypeDef

Timer overflow period.

Enumerator
vdacCycles2

Overflows every 2 clock cycles.

vdacCycles4

Overflows every 4 clock cycles.

vdacCycles8

Overflows every 8 clock cycles.

vdacCycles16

Overflows every 16 clock cycles.

vdacCycles32

Overflows every 32 clock cycles.

vdacCycles64

Overflows every 64 clock cycles.

VDAC_Ref_TypeDef

Reference voltage for VDAC.

Enumerator
vdacRef1V25

Internal 1.25 V band gap reference.

vdacRef2V5

Internal 2.5 V band gap reference.

vdacRefAvdd

AVDD reference.

vdacRefExtPin

External pin reference.

VDAC_RefreshSource_TypeDef

Refresh source for VDAC.

Enumerator
vdacRefreshSrcNone

No refresh source.

vdacRefreshSrcRefreshTimer

Refresh triggered by refresh timer overflow.

vdacRefreshSrcSyncPrs

Refresh triggered by sync PRS.

vdacRefreshSrcAsyncPrs

Refresh triggered by async PRS.

VDAC_TrigMode_TypeDef

Channel conversion trigger mode.

Enumerator
vdacTrigModeNone

No conversion trigger source selected.

vdacTrigModeSw

Channel is triggered by CHnDATA or COMBDATA write.

vdacTrigModeSyncPrs

Channel is triggered by Sync PRS input.

vdacTrigModeLesense

Channel is triggered by LESENSE.

vdacTrigModeInternalTimer

Channel is triggered by Internal Timer.

vdacTrigModeAsyncPrs

Channel is triggered by Async PRS input.

VDAC_PowerMode_TypeDef

Channel power mode.

Enumerator
vdacPowerModeHighPower

High power buffer mode.

vdacPowerModeLowPower

Low power buffer mode.

VDAC_ChPortSel_t

VDAC channel Abus port selection.

Enumerator
vdacChPortNone

No GPIO selected.


vdacChPortA

Port A selected.


vdacChPortB

Port B selected.


vdacChPortC

Port C selected.


vdacChPortD

Port D selected.