src#

void* DMA_CfgDescrSGAlt_TypeDef::src

Pointer to location to transfer data from.

dst#

void* DMA_CfgDescrSGAlt_TypeDef::dst

Pointer to location to transfer data to.

dstInc#

DMA_DataInc_TypeDef DMA_CfgDescrSGAlt_TypeDef::dstInc

Destination increment size for each DMA transfer.

srcInc#

DMA_DataInc_TypeDef DMA_CfgDescrSGAlt_TypeDef::srcInc

Source increment size for each DMA transfer.

size#

DMA_DataSize_TypeDef DMA_CfgDescrSGAlt_TypeDef::size

DMA transfer unit size.

arbRate#

DMA_ArbiterConfig_TypeDef DMA_CfgDescrSGAlt_TypeDef::arbRate

Arbitration rate, i.e., number of DMA transfers done before re-arbitration takes place.

nMinus1#

uint16_t DMA_CfgDescrSGAlt_TypeDef::nMinus1

Number of DMA transfers minus 1 to do.

Must be <= 1023.

hprot#

uint8_t DMA_CfgDescrSGAlt_TypeDef::hprot

HPROT signal state, refer to reference manual, DMA chapter for further details.

Normally set to 0 if protection is not an issue. The following bits are available:

• bit 0 - HPROT[1] control for source read accesses, privileged/non-privileged access.

• bit 3 - HPROT[1] control for destination write accesses, privileged/non-privileged access.

peripheral#

bool DMA_CfgDescrSGAlt_TypeDef::peripheral

Specify if a memory or peripheral scatter-gather DMA cycle.

Notice that this parameter should be the same for all alternate descriptors.

• true - this is a peripheral scatter-gather cycle.

• false - this is a memory scatter-gather cycle.