Watchdog initialization structure.

Public Attributes#

bool

Enable Watchdog when initialization completed.

bool

Counter keeps running during debug halt.

bool

Select WDOG clear source: False: Write to the clear bit will clear the WDOG counter True: Rising edge on the PRS Source 0 will clear the WDOG counter.

bool

Counter keeps running when in EM2.

bool

Counter keeps running when in EM3.

bool

Block EMU from entering EM4.

bool

When set, a PRS Source 0 missing event will trigger a WDOG reset.

bool

When set, a PRS Source 1 missing event will trigger a WDOG reset.

bool

Block SW from disabling LFRCO/LFXO oscillators.

Clock source to use for Watchdog.

Select warning time as % of the Watchdog timeout.

Select illegal window time as % of the Watchdog timeout.

bool

Disable Watchdog reset output if true.

Public Attribute Documentation#

enable#

bool WDOG_Init_TypeDef::enable

Enable Watchdog when initialization completed.


Definition at line 128 of file platform/emlib/inc/em_wdog.h

debugRun#

bool WDOG_Init_TypeDef::debugRun

Counter keeps running during debug halt.


Definition at line 131 of file platform/emlib/inc/em_wdog.h

clrSrc#

bool WDOG_Init_TypeDef::clrSrc

Select WDOG clear source: False: Write to the clear bit will clear the WDOG counter True: Rising edge on the PRS Source 0 will clear the WDOG counter.


Definition at line 139 of file platform/emlib/inc/em_wdog.h

em2Run#

bool WDOG_Init_TypeDef::em2Run

Counter keeps running when in EM2.


Definition at line 148 of file platform/emlib/inc/em_wdog.h

em3Run#

bool WDOG_Init_TypeDef::em3Run

Counter keeps running when in EM3.


Definition at line 151 of file platform/emlib/inc/em_wdog.h

em4Block#

bool WDOG_Init_TypeDef::em4Block

Block EMU from entering EM4.


Definition at line 154 of file platform/emlib/inc/em_wdog.h

prs0MissRstEn#

bool WDOG_Init_TypeDef::prs0MissRstEn

When set, a PRS Source 0 missing event will trigger a WDOG reset.


Definition at line 158 of file platform/emlib/inc/em_wdog.h

prs1MissRstEn#

bool WDOG_Init_TypeDef::prs1MissRstEn

When set, a PRS Source 1 missing event will trigger a WDOG reset.


Definition at line 161 of file platform/emlib/inc/em_wdog.h

lock#

bool WDOG_Init_TypeDef::lock

Block SW from disabling LFRCO/LFXO oscillators.

Block SW from modifying the configuration (a reset is needed to reconfigure).


Definition at line 170 of file platform/emlib/inc/em_wdog.h

perSel#

WDOG_PeriodSel_TypeDef WDOG_Init_TypeDef::perSel

Clock source to use for Watchdog.

Watchdog timeout period.


Definition at line 178 of file platform/emlib/inc/em_wdog.h

warnSel#

WDOG_WarnSel_TypeDef WDOG_Init_TypeDef::warnSel

Select warning time as % of the Watchdog timeout.


Definition at line 183 of file platform/emlib/inc/em_wdog.h

winSel#

WDOG_WinSel_TypeDef WDOG_Init_TypeDef::winSel

Select illegal window time as % of the Watchdog timeout.


Definition at line 189 of file platform/emlib/inc/em_wdog.h

resetDisable#

bool WDOG_Init_TypeDef::resetDisable

Disable Watchdog reset output if true.


Definition at line 195 of file platform/emlib/inc/em_wdog.h